LINER LT4180EGN-TRPBF Virtual remote sense controller Datasheet

Electrical Specifications Subject to Change
LT4180
Virtual Remote Sense
Controller
FEATURES
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DESCRIPTION
Tight Load Regulation with Highly Resistive Cables
without Requiring Remote Sense Wiring
Compatible with Isolated and Nonisolated Power
Supplies
±1% Internal Voltage Reference
5mA Sink Current Capability
Soft-Correct Reduces Turn-On Transients
Undervoltage and Overvoltage Protection
Pin-Programmable Dither Frequency
Optional Spread Spectrum Dither
Wide VIN Range: 3.1V to 50V
24-Pin SSOP Package
APPLICATIONS
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12V High Intensity Lamps
28V Industrial Systems
High Power (>40 Watts) CAT5 Cable Systems
Wiring Drop Cancellation for Notebook Computer
Battery Charging
AC and DC Adaptors
Well-Logging and Other Remote Instrumentation
Surveillance Equipment
The LT®4180 solves the problem of providing tight load
regulation over long, highly resistive cables without
requiring an additional pair of remote sense wires. This
Virtual Remote Sense™ device continuously interrogates
the line impedance and corrects the power supply output
voltage via its feedback loop to maintain a steady voltage
at the load regardless of current changes.
The LT4180 is a full-featured controller with 5mA optoisolator sink capability, under/overvoltage lockout,
soft-start and a ±1% internal voltage reference. The
Virtual Remote Sense feature set includes user-programmable dither frequency and optional spread spectrum
dither.
The LT4180 works with any topology and type of isolated
or nonisolated power supply, including DC/DC converters
and adjustable linear regulators.
The LT4180 is available in a 24-pin, SSOP package.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
Virtual Remote Sense is a trademark of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
TYPICAL APPLICATION
Isolated Power Supply with Virtual Remote Sense
RSENSE
VLOAD vs VWIRE
CAT5E CABLE
5.00
LINE
4.99
+
4.98
CL
RL
4.97
LINE
VLOAD (V)
SWITCHING
REGULATOR
VC
VIN
–
SENSE DIV0 DIV1 DIV2 SPREAD CHOLD1 CHOLD2 CHOLD3 CHOLD4
LT4180
ROSC
DRAIN
VIRTUAL REMOTE SENSE
COMP
COSC
OV
RUN FB
4.96
4.95
4.94
4.93
4.92
4180 TA01a
4.91
0
0.5
1
1.5
2
2.5
3
VWIRING (V)
4180 TAO1b
4180fp
1
LT4180
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
VIN ............................................................. –0.3V to 52V
SENSE.......................................................VIN – 0.3V to VIN
INTVCC, RUN, FB, OV, ROSC, OSC,
DIV0, DIV1, DIV2, SPREAD, CHOLD1,
CHOLD2, CHOLD3, CHOLD4, DRAIN, COMP,
GUARD2, GUARD3, GUARD4, VPP ............ –0.3V to 5.5V
VIN Pin Current.......................................................10mA
INTVCC Pin Current .............................................–10mA
COSC Pin Current..................................................3.3mA
Maximum Junction Temperature .......................... 125°C
Operating Junction Temperature Range (Note 2)
E-, I-Grades ....................................... –40°C to 125°C
MP-Grade .......................................... –55°C to 125°C
Storage Temperature Range .................. –65°C to 125°C
TOP VIEW
INTVCC
1
24 VIN
DRAIN
2
23 VPP
COMP
3
22 SENSE
CHOLD1
4
21 RUN
GUARD2
5
20 OV
CHOLD2
6
19 SPREAD
GUARD3
7
18 DIV0
CHOLD3
8
17 DIV1
GUARD4
9
16 DIV2
CHOLD4 10
15 OSC
FB 11
14 ROSC
GND 12
13 COSC
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
TJMAX = 150°C, θJA = 85°C/W
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT4180EGN#PBF
LT4180EGN#TRPBF
LT4180GN
24-Lead Narrow Plastic SSOP
–40°C to 125°C
LT4180IGN#PBF
LT4180IGN#TRPBF
LT4180GN
24-Lead Narrow Plastic SSOP
–40°C to 125°C
LT4180MPGN#PBF
LT4180MPGN#TRPBF
LT4180GN
24-Lead Narrow Plastic SSOP
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted.
SYMBOL
PARAMETER
VIN
Operating Supply Voltage
CONDITIONS
MIN
l
IVIN
Input Quiescent Current
ROSC Open, COSC Open, SENSE = VIN
VREF
Reference Voltage
VCHOLD2 = VCHOLD3 = 1.2V, Measured at CHOLD4
During Track ΔVOUT Clock Phase
ILIM
Open-Drain Current Limit
With FB = VREF + 200mV, OSC Stopped with Voltage
Feedback Loop Closed
VOL
DRAIN Low Voltage
VIN = 3V
VINTVCC
LDO Regulator Output Voltage
VIN = 5V
3.10
l
l
TYP
MAX
UNITS
50
V
mA
1
2
1.209
1.197
1.221
1.221
1.233
1.245
5
10
15
mA
0.3
V
3.15
V
V
V
4180fp
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LT4180
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
VINTVCC
LDO Regulator Output Voltage in
Dropout
VIN = 2.5V
2.2
VOV
Overvoltage Threshold
Rising
VOHYST
Overvoltage Input Hysteresis
VRISING – VFALLING
VRUN
Run Threshold
Falling
VRISING – VFALLING
TYP
MAX
UNITS
V
1.21
20
V
80
mV
1.21
VRHYST
Run Input Hysteresis
IFB
Input Bias Current
VOS
Current Amplifier Offset Voltage
VIN = 3.5V
VIN = 5V
VIN = 48V
A V(RATIO)
Current Amplifier Gain Ratio
A VL/A VH, A V Measured in V/V
Measured at SENSE with SENSE = VIN
V
20
80
mV
–0.2
0.2
μA
–4
–3
–4
4
3
4
mV
mV
mV
0.891
0.9
0.909
1
μA
10
10.3
V/V
ISENSE
Current Amplifier Input Bias Current
AV
ΔVFB Amplifier Gain
–1
ICHOLD1
Track/Hold Charging Current
Measured at CHOLD1 with VCHOLD1 = 1.2V
±60
μA
ICHOLD2
Track/Hold Charging Current
Measured at CHOLD2 with VCHOLD2 = 1.2V
±25
μA
ICHOLD3
Track/Hold Charging Current
Measured at CHOLD3 with VCHOLD3 = 1.2V
±25
μA
ICHOLD4
Track/Hold Charging Current
Measured at CHOLD4 with VCHOLD4 = 1.5V,
VCHOLD2 = 1V, VCHOLD3 = 1.2V
10
μA
Measured at CHOLD4 with VCHOLD4 = 1.5V,
VCHOLD2 = 1.4V, VCHOLD3 = 1.2V
–200
μA
9.7
ISC
Soft-Correct Current
Measured at CHOLD4
±1.5
μA
ILKG1
Track/Hold Leakage Current
Measured at CHOLD1 with VCHOLD1 = 1.2V
±1
μA
ILKG2
Track/Hold Leakage Current
Measured at CHOLD2 with VCHOLD2 = 1.2V
±1
μA
ILKG3
Track/Hold Leakage Current
Measured at CHOLD3 with VCHOLD3 = 1.2V
±1
μA
ILKG4
Track/Hold Leakage Current
Measured at CHOLD4 with VCHOLD4 = 1.2V
±1
μA
fOSC
Oscillator Frequency
ROSC = 20k, COSC = 1nF
230
kHz
gmFB
Voltage Error Amplifier
Transconductance
Measured from FB to COMP, VCOMP = 2V,
OSC Stopped with Voltage Feedback Loop Closed
110
μmho
gmIAMP
Current Amplifier Transconductance
Measured from SENSE to COMP, VCOMP = 2V,
OSC Stopped with Current Feedback Loop Closed
750
μmho
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2. The LT4180E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
170
200
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT4180I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT4180MP is guaranteed over the full –55°C to
125°C operating junction temperature range.
Note 3. Positive current is defined as flowing into a pin.
4180fp
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LT4180
TYPICAL PERFORMANCE CHARACTERISTICS
VREF vs Temperature
Oscillator Frequency
vs Temperature
INTVCC vs Temperature
1.2215
204.0
3.165
3.160
203.5
FREQUENCY (kHz)
1.2210
INTVCC (V)
VREF (V)
3.155
1.2205
1.2200
3.150
3.145
1.2195
5 25 45 65 85 105 125
TEMPERATURE (°C)
203.0
202.5
202.0
3.140
1.2190
–55 –35 –15
ROSC = 20k
COSC = 1nF
3.135
–55 –35 –15
4108 G01
201.5
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
5 25 45 65 85 105 125
TEMPERATURE (°C)
4108 G03
4108 G02
IDRAIN vs VDRAIN
Normal Timing
Spread Spectrum Timing
14
12
IDRAIN (mA)
10
500mV/DIV
CHOLD1
WITH 15k
PULL-DOWN
500mV/DIV
CHOLD1
WITH 15k
PULL-DOWN
2V/DIV
OSC
2V/DIV
OSC
8
6
4
2
5μs/DIV
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VDRAIN (V)
4180 G05
1μs/DIV
TRIGGERED ON CHOLD1
TRIGGERED ON OSC
Load Step in 12V Linear Application
Load Step in Buck Application
4180 G06
1
4180 G04
VLOAD vs VWIRE
5.00
RWIRE = 4Ω
CL = 100μF
4.99
4.97
VLOAD (V)
VOUT
2V/DIV
VSENSE
2V/DIV
VLOAD
2V/DIV
4.98
VLOAD
2V/DIV
4.96
ILOAD
500mA/DIV
4.95
ILOAD
200mA/DIV
4.94
1.2A
200mA
4.93
2ms/DIV
200mA TO 700mA LOAD TRANSIENT
100μF LOAD CAP
4.92
4.91
0
0.5
1
1.5
2
2.5
4180 G08
5ms/DIV
4180 G09
3
VWIRING (V)
4180 G07
4180fp
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LT4180
PIN FUNCTIONS
INTVCC (Pin 1): The LDO Output. A low ESR ceramic
capacitor provides decoupling and output compensation.
1μF or more should be used.
Virtual Remote Sense. This is a high current output capable
of driving opto-isolators. Other isolation methods may
also be used with this output.
DRAIN (Pin 2): Open-Drain of the Output Transistor. This
pin drives either the LED in an opto-isolator, or pulls down
on the regulator control pin.
DIV2 (Pin 16): Dither Division Ratio Programming Pin.
COMP (Pin 3): Gate of the Output Transistor. This pin allows
additional compensation. It must be left open if unused.
CHOLD1 (Pin 4): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD2 (Pin 5): Guard Ring Drive for CHOLD2.
CHOLD2 (Pin 6): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD3 (Pin 7): Guard Ring Drive for CHOLD3.
CHOLD3 (Pin 8): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD4 (Pin 9): Guard Ring Drive for CHOLD4.
CHOLD4 (Pin 10): Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
FB (Pin 11): Receives the feedback voltage from an external resistor divider across the main output. An (optional)
capacitor to ground may be added to eliminate high
frequency noise. The time constant for this RC network
should be no greater than 0.1 times the dither frequency.
For example, with fDITHER = 1kHz, τ = 0.1ms.
GND (Pin 12): Ground.
COSC (Pin 13): Oscillator Timing Capacitor. Oscillator frequency is set by this capacitor and ROSC. For best accuracy,
the minimum recommended capacitance is 100pF.
ROSC (Pin 14): Oscillator Timing Resistor. Oscillator
frequency is set by this resistor and COSC.
OSC (Pin 15): Oscillator Output. This output may be
used to synchronize the switching regulator to the
DIV1 (Pin 17): Dither Division Ratio Programming Pin.
DIV0 (Pin 18): Dither Division Ratio Programming Pin.
Use the following table to program the dither division
ratio (fOSC /fDITHER)
Table 1. Programming the Dither Division Ratio (fOSC /fDITHER)
DIV2
DIV1
DIV0
DIVISION RATIO
0
0
0
8
0
0
1
16
0
1
0
32
0
1
1
64
1
0
0
128
1
0
1
256
1
1
0
512
1
1
1
1024
For example, fDITHER = fOSC/128 with DIV2 = 1 and DIV1
= DIV0 = 0.
SPREAD (Pin 19): Spread Spectrum Enable Input. Dither
phasing is pseudo-randomly adjusted when SPREAD is
tied high.
OV (Pin 20): Overvoltage Comparator Input. This prevents
line drop correction when wiring drops would cause excessive switching power supply output voltage. Set OV
so VREG(MAX) ≤ 1.50VLOAD.
RUN (Pin 21): The RUN pin provides the user with an accurate means for sensing the input voltage and programming
the start-up threshold for the line drop corrector.
SENSE (Pin 22): Current Sense Input. This input connects
to the current sense resistor. Kelvin connect to RSENSE.
VPP (Pin 23): Connect this pin to INTVCC.
VIN (Pin 24): Main Supply Pin. VIN must be locally bypassed
to ground. Kelvin connect the current sense resistor to
this pin and minimize interconnect resistance.
4180fp
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LT4180
BLOCK DIAGRAM
1
24
VIN
22
SENSE
INTVCC
TRACK/
HOLD
TRACK_HI_I
CHOLD1
+
11
5
6
8
7
10
3
9
CHOLD2
TRACK/
HOLD
TRACK/
HOLD
SPREAD
+
–
+
GM2
–
INST
AMP
TRACK/
HOLD
DIV0
SPREAD
SPECTRUM
CLOCK
GENERATOR
FB_SELECT
CORRECTED _REF
TRACK_HI_FB
TRACK_LOW_FB
20
21
DIV2
18
17
16
TRACK_DELTA_FB
CHOLD4
COMP
CLK
MOD
GUARD4
OSC
2
DIV1
19
REF
CHOLD3
GUARD3
–
GM1
FB
GUARD2
TRIM
CIRCUIT
REF_OK
GND
BANDGAP REF
4
HI_GAIN
IAMP
LDO
12
–
+
23
VPP
OSC
DRAIN
15
RLIM
OV
+
OV
–
OVERVOLTAGE
RUN
–
UV
+
UNDERVOLTAGE
COSC
ROSC
14
13
4180 BD
4180fp
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LT4180
OPERATION
Voltage drops in wiring can produce considerable load
regulation errors in electrical systems (Figure 1). As
load current, IL , increases the voltage drop in the wiring
(IL • RW) increases and the voltage delivered to the system
(VL) drops. The traditional approach to solving this problem,
remote sensing, regulates the voltage at the load, increasing the power supply voltage (VOUT) to compensate for
voltage drops in the wiring. While remote sensing works
well, it does require an additional pair of wires to measure
at the load, which may not always be practical.
The LT4180 eliminates the need for a pair of remote sense
wires by creating a Virtual Remote Sense. Virtual remote
sensing is achieved by measuring the incremental change
in voltage that occurs with an incremental change in current
in the wiring (Figure 2). This measurement can then be
used to infer the total DC voltage drop in the wiring, which
can then be compensated for. The Virtual Remote Sense
takes over control of the power supply via the feedback
pin (VFB) of the power supply maintaining tight regulation
of load voltage, VL.
Figure 3 shows the timing diagram for virtual remote sensing (VRS). A new cycle begins when the power supply and
VRS close the loop around VOUT (regulate VOUT = H). Both
VOUT and IOUT slew and settle to a new value, and these
values are stored in the Virtual Remote Sense (track VOUT
high = L and track IOUT = L). The VOUT feedback loop is
opened and a new feedback loop is set up commanding the
power supply to deliver 90% of the previously measured
current (0.9IOUT). VOUT drops to a new value as the power
supply reaches a new steady state, and this information
is also stored in the Virtual Remote Sense. At this point,
the change in output voltage (ΔVOUT) for a –10% change
in output current has been measured and is stored in the
Virtual Remote Sense. This voltage is used during the
next VRS cycle to compensate for voltage drops due to
wiring resistance.
IL
POWER SUPPLY
IL
RW
+
+
VOUT POWER WIRING
–
SYSTEM
POWER SUPPLY
RW
+
VOUT
VL
–
VFB
+
POWER WIRING
–
SYSTEM
VL
–
4180 F01
REMOTE SENSE WIRING
VIRTUAL REMOTE
SENSE
4180 F02
Figure 1. Traditional Remote Sensing
Figure 2. Virtual Remote Sensing
VOUT
REGULATE VOUT
TRACK VOUT HIGH
TRACK IOUT
REGULATE IOUT LOW
TRACK VOUT LOW
TRACK ΔVOUT
4180 F03
Figure 3. Simplified Timing Diagram, Virtual Remote Sense
4180fp
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LT4180
APPLICATIONS INFORMATION
INTRODUCTION
DESIGN PROCEDURE
The LT4180 is designed to interface with a variety of power
supplies and regulators having either an external feedback
or control pin. In Figure 4, the regulator error amplifier
(which is a gm amplifier) is disabled by tying its inverting
input to ground. This converts the error amplifier into a
constant-current source which is then controlled by the
drain pin of the LT4180. This is the preferred method of
interfacing because it eliminates the regulator error amplifier from the control loop which simplifies compensation
and provides best control loop response.
The first step in the design procedure is to determine
whether the LT4180 will control a linear or switching supply/regulator. If using a switching power supply or regulator,
it is recommended that the supply be synchronized to the
LT4180 by connecting the OSC pin to the SYNC pin (or
equivalent) of the supply.
REGULATOR
+
–
LT4180
ITH OR
VC
Recommended values for ROSC are between 20k and 100k
(with 30.1k the optimum for best accuracy) and greater
than 100pF for COSC. COSC may be reduced to as low as
50pF, but oscillator frequency accuracy will be somewhat
degraded.
DRAIN
4180 F04
Figure 4. Nonisolated Regulator Interface
For proper operation, increasing control voltage should
correspond to increasing regulator output. For example,
in the case of a current mode switching power supply, the
control pin ITH should produce higher peak currents as
the ITH pin voltage is made more positive.
Isolated power supplies and regulators may also be used
by adding an opto-coupler (Figure 5). LT4180 output voltage INTVCC supplies power to the opto-coupler LED. In
situations where the control pin VC of the regulator may
exceed 5V, a cascode may be added to keep the DRAIN
pin of the LT4180 below 5V (Figure 6). Use a Low VT
MOSFET for the cascode transistor.
REGULATOR
+
–
VC
OPTO-COUPLER
If the power supply is synchronized to the LT4180, the
power supply switching frequency is determined by:
4
fOSC =
ROSC • COSC
INTVCC
The following example synchronizes a 250kHz switching
power supply to the LT4180. In this example, start with
ROSC = 30.1k:
COSC =
4
= 531pF
250kHz • 30 . 1k
This example uses 470pF. For 250kHz:
ROSC =
4
= 34 . 04k
250kHz • 470pF
The closest standard 1% value is 34k.
The next step is to determine the highest practical dither
frequency. This may be limited either by the response
time of the power supply or regulator, or by the propagation time of the wiring connecting the load to the power
supply or regulator.
LT4180
TO VC > 5V
DRAIN
COMP
4180 F05
LT4180
INTVCC
Figure 5. Isolated Power Supply Interface
DRAIN
4180 F06
Figure 6. Cascoded DRAIN Pin for Isolated Supplies
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LT4180
APPLICATIONS INFORMATION
First determine the settling time (to 1% of final value)
of the power supply. The settling time should be the
worst-case value (over the whole operating envelope: VIN,
ILOAD, etc.).
1
F1 =
Hz
2 • t SETTLING
Continuing this example, the dither frequency should be
less than 500Hz (limited by the power supply).
For example, if the power supply takes 1ms to settle
(worst-case) to within 1% of final value:
The nearest division ratio is 512 (set DIV0 = L, DIV1 =
DIV2 = H). Based on this division ratio, nominal dither
frequency will be:
f
250, 000
f DITHER = OSC =
= 488 Hz
512
DRATIO
F1 =
1
= 500Hz
2 • 1e – 3
Next, determine the propagation time of the wiring. In
order to ignore transmission line effects, the dither period
should be approximately twenty times longer than this.
This will limit dither frequency to:
VF
F2 =
Hz
20 • 1. 017ns /ft • L
Where VF is the velocity factor (or velocity of propagation),
and L is the length of the wiring (in feet).
With the dither frequency known, the division ratio can
be determined:
f
250, 000
DRATIO = OSC =
= 500
500
fDITHER
After the dither frequency is determined, the minimum
load decoupling capacitor can be determined. This load
capacitor must be sufficiently large to filter out the dither
signal at the load.
2.2
CLOAD =
R WIRE • 2 • f DITHER
For example, assume the load is connected to a power
supply with 1000ft of CAT5 cable. Nominal velocity of
propagation is approximately 70%.
Where CLOAD is the minimum load decoupling capacitance,
RWIRE is the minimum wiring resistance of one conductor of the wiring pair, and fDITHER is the minimum dither
frequency.
0.7
= 34 . 4 kHz
20 • 1. 017e – 9 • 1000
Continuing the example, our CAT5 cable has a maximum
9.38Ω/100m conductor resistance.
F2 =
The maximum dither frequency should not exceed F1 or
F2 (whichever is less):
fDITHER < min (F1, F2).
Maximum wiring resistance is:
RWIRE = 2 • 1000ft • 0.305m/ft • 0.0938Ω/m
RWIRE = 57.2Ω
4180fp
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LT4180
APPLICATIONS INFORMATION
With an oscillator tolerance of ±15%, the minimum
dither frequency is 414.8Hz, so the minimum decoupling
capacitance is:
CLOAD =
2.2
= 46 . 36µF
57 . 2 Ω • 2 • 414 . 8Hz
This is the minimum value. Select a nominal value to account for all factors which could reduce the nominal, such
as initial tolerance, voltage and temperature coefficients
and aging.
CHOLD Capacitor Selection and Compensation
With dither frequency determined, use the following equations to determine CHOLD values:
11 . 9nF
CHOLD1 =
fDITHER (kHz)
and
CHOLD2 = CHOLD3 =
2 . 5nF
fDITHER (kHz)
So, with a dither frequency of 488Hz:
CHOLD1 =
11 . 9nF
= 24 . 4nF
0 . 488kHz
and
CHOLD2 = CHOLD3 =
2 . 5nF
= 5 . 12nF
0 . 488(kHz)
NPO ceramic or other capacitors with low leakage and
dielectric absorption should be used for all hold capacitors.
is observed, decrease the value of the resistor until it
just disappears. If overshoot or ringing is not observed,
increase the value of the resistor until it is observed, then
slightly decrease the value of the resistor so that overshoot
and ringing disappear. Check for proper voltage drop correction and converter behavior (start-up, regulation etc.),
over the load range, and repeat the above procedure with a
smaller value of the compensation capacitor, if necessary.
Decrease CHOLD4 capacitance until VOUT exhibits slight
low frequency instability, then increase CHOLD4 slightly
from this value.
Setting Output Voltage, Undervoltage and Overvoltage
Thresholds
The RUN pin has accurate rising and falling thresholds
which may be used to determine when Virtual Remote Sense
operation begins. Undervoltage threshold should never
be set lower than the minimum operating voltage of the
LT4180 (3.1V).
The overvoltage threshold should be set slightly greater
than the highest voltage which will be produced by the
power supply or regulator:
VOUT(MAX) = VLOAD(MAX) + VWIRE(MAX)
VOUT(MAX) should never exceed 1.5 • VLOAD
Since the RUN and OV pins connect to MOSFET input
comparators, input bias currents are negligible and a common voltage divider can be used to set both thresholds
(Figure 7).
VIN
R1
LT4180
RUN
Set CHOLD4 to 1μF.
Start with a 47pF capacitor between the COMP and DRAIN
pins of the LT4180. Add an RC network in parallel with the
47pF capacitor. 10k and 10nF are good starting values.
Connect a DC load corresponding to full-scale load current and verify that VOUT produces a rounded squarewave
without any noticeable overshoot or ringing (similar to
the VOUT waveform in Figure 3). If overshoot or ringing
R2
FB
R3
OV
R4
4180 F07
Figure 7. Voltage Divider for Output Voltage, UVL and OVL
4180fp
10
LT4180
APPLICATIONS INFORMATION
The voltage divider resistors can be calculated from the
following equations:
V
1 . 22V
R T = OV , R4 =
200 μA
200 μA
Where RT is the total divider resistance and VOV is the
overvoltage set point.
Find the equivalent series resistance for R2 and R3 (RSERIES).
This resistance will determine the RUN voltage level.
⎛ 1 . 22 • R T ⎞
RSERIES = ⎜
⎟ − R4
⎝ VUVL ⎠
R1 = R T − RSERIES − R4
⎛
R4 ⎞
1 . 22 V − ⎜ VOUT(NOM) •
R T ⎟⎠
⎝
R3 =
VOUT(NOM)
RT
R2 = RSERIES − R3
Where VUVL is the RUN voltage and VOUT(NOM) is the
nominal output voltage desired.
For example, with VUVL = 4V, VOV = 7.5V and VOUT(NOM) = 5V,
RT =
7 . 5V
= 37 . 5 k
200μA
R4 =
1 . 22V
= 6 . 1k
200 μA
RSENSE SELECTION
Select the value of RSENSE so that it produces a 100mV voltage drop at maximum load current. For best accuracy, VIN
and SENSE should be Kelvin connected to this resistor.
Soft-Correct Operation
The LT4180 has a soft-correct function which insures
orderly start-up. When the RUN pin rising threshold is
first exceeded (indicating VIN has crossed its undervoltage
lockout threshold), power supply output voltage is set to a
value corresponding to zero wiring voltage drop (no correction for wiring). Over a period of time (determined by
CHOLD4), the power supply output voltage ramps up to
account for wiring voltage drops, providing best load-end
voltage regulation. A new soft-correct cycle is also initiated
whenever an overvoltage condition occurs.
5V
POWER SUPPLY
OUTPUT VOLTAGE
10Vw
POWER SUPPLY
INPUT VOLTAGE
200ms/DIV
4180 F08
Figure 8. Soft-Correct Operation, CHOLD4 = 1μF
⎛ 1 . 22V • 37 . 5k ⎞
RSERIES = ⎜
⎟⎠ − 6 . 1k = 5 . 34k
4V
⎝
R1 = 37 . 5 k − 5 . 3 4 k − 6 . 1k = 26 . 06 k
⎛ 5V • 6 . 1k ⎞
1 . 22 V − ⎜
⎝ 37 . 5 k ⎟⎠
= 3 . 05 k
R3 =
5V
37 . 5 k
R2 = RSERIES − R3 = 2 . 29 k
4180fp
11
LT4180
APPLICATIONS INFORMATION
switching supplies may be synchronized to the LT4180
(Figure 10). The OSC pin was designed so that it may
directly connect to most regulators, or drive opto-isolators
(for isolated power supplies).
Using Guard Rings
The LT4180 includes a total of four track/holds in the
Virtual Remote Sense path. For best accuracy, all leakage
sources on the CHOLD pins should be minimized.
At very low dither frequencies, the circuit board layout
may include guard rings which should be tied to their
respective guard ring drivers.
Spread Spectrum Operation
Virtual remote sensing relies on sampling techniques.
Because switching power supplies are commonly used,
the LT4180 uses a variety of techniques to minimize
potential interference (in the form of beat notes which
may occur between the dither frequency and power
supply switching frequency). Besides several types of
internal filtering, and the option for VRS/power supply synchronization, the LT4180 also provides spread
spectrum operation.
To better understand the purpose of guard rings, a simplified model of hold capacitor leakage (with and without
guard rings) is shown in Figure 9. Without guard rings,
a large difference voltage may exist between the hold
capacitor (Pin 1) node and adjacent conductors (Pin 2)
producing substantial leakage current through the leakage resistance (RLKG). By adding a guard ring driver with
approximately the same voltage as the voltage on the
hold capacitor node, the difference voltage across RLKG1
is reduced substantially thereby reducing leakage current
on the hold capacitor.
By enabling spread spectrum operation, low modulation index pseudo-random phasing is applied to
Virtual Remote Sense timing. This has the effect of
converting any remaining narrow-band interference into
broadband noise, reducing its effect.
Synchronization
Linear and switching power supplies and regulators may
be used with the LT4180. In most applications regulator
interference should be negligible. For those applications
where accurate control of interference spectrum is desirable, an oscillator output has been provided so that
Increasing Voltage Correction Range
Correction range may be slightly improved by regulating
INTVCC to 5V. This may be done by placing an LDO between
VIN and INTVCC. Contact Linear Technology Applications
for more information.
RLKG
1
RLKG1
2
WITHOUT
GUARD RING
1
WITH
GUARD RING
RLKG2
2
4180 F09
Figure 9. Simplified Leakage Models (with and without Guard Rings)
REGULATOR
SYNC
LT4180
OSC
4180 F10
Figure 10. Clock Interface for Synchronization
4180fp
12
LT4180
TYPICAL APPLICATIONS
12V, 500mA Linear Regulator
R1
0.1Ω
1%
Q1
IRLZ440
VIN
20V
C1
4.7μF
25V
R3
27k
R2
63.4k
1%
R5
5.36k
1%
R7
10k
INTVCC
C3
1μF
C2
1μF
R4
3.74k
1%
C4
10μF
25V
OUTPUT TO WIRING AND LOAD
500mA
8Ω MAX RWIRE
330μF LOAD CAPACITANCE
RUN
FB
R6
2.2k
1%
VIN
DIV2 DIV1 DIV0 VPP INTVCC
SENSE
U2
LT4180EGN
OV
SPREAD
INTVCC
GND
Q2
VN2222
DRAIN
C5
22pF
OSC
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
C7
4.7nF
C6
1nF
R8
20k
C8
470pF
C9
470pF
COSC
C10
10nF
ROSC
C11
470pF
R9
41.7k
1%
4180 TA02
12V, 600mA Boost Regulator
VIN
5V
VISHAY
C1
IHLP2525CZ-11
4.7μF
16V
R4
100k
R6
24.3k
R2
191k
GATE SW1 SW1 SW1 SW2 SW2 SW2
VCC
SHDN
U1
LT3581EMSE
FAULT
R8
10k
GND
FB
VC
SYNC RT
SS CLKOUT
R10
84.5k
R1
0.05
1%
D1
DFLS220
L1
4.7μH
C6
0.1μF
GND
C2
10μF
25V
R13
1.5k
R3
61.9k
1%
INTVCC
C4
1μF
C3
1μF
R5
3.65k
1%
FB RUN
R7
2k
1%
R9
5.36k
1%
OUTPUT TO WIRING AND LOAD
(100mA MINIMUM)
600mA, 6Ω MAX RWIRE
470μF LOAD CAPACITANCE
VIN
SENSE
DIV2 DIV1 DIV0 VPP INTVCC
U2
LT4180EGN
OV
DRAIN
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
C7
47pF
R11
10k 1%
C9
4.7nF
C8
1nF
C10
470pF
C12
10nF
C11
470pF
SPREAD
OSC
COSC ROSC
C13
470pF
R12
41.7k
1%
4180 TA03
4180fp
13
14
R16
36.5k
1%
RT
FB
SHDN/
UVLO
VC
SS
C7
0.1μF
CIN1
1μF
100V
PULSE ENGINEERING PA1277NL
R14
8.66k
1%
R9
105k
1%
VIN
C9
100pF
VC
R6
17.4k
GND
VIN
18V TO 72V
GATE
INTVCC
GND
U2
LT3758 SENSE
EMSE
SYNC
VIN
VIN
C4
4.7μF
50V
CIN2
1μF
100V
VIN
R2
10k
VC
C10
(OPT.)
C18
2200pF
250V
1
2
3
4
R11
2k
R13
5.36k
1%
R10
2.74k
1%
R8
523Ω
1%
C11
47pF
RUN
3 2
VOUT
VIN
C5
1μF
C3
100μF
10V
R5
0.018
1%
SENSE
U1
LT4180EGN
100μF
10V
DIV2
C17
3.3nF
C12
4.7nF
(NANO)
C13
470pF
C15
C14 0.1μF
470pF
C16
470pF
INTVCC2
C6
1μF
4180 TA04
R15
41.2k
1%
OSC
COSC ROSC
SPREAD
DIV1 DIV0 VPP INTVCC
OUTPUT TO WIRING AND LOAD
3.3V, 3A
0.4Ω MAX RWIRE
1000μF LOAD CAPACITANCE
OV
DRAIN
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
FB
D2
UPS840
R17
20k 1%
7 8
5 6
R4
13.3k
1%
PA1277NL
INTVCC2
C8
0.01μF
1 2 3
5 6 7 8
D3
BAS516
D1
BAV21W
RCS1
0.040Ω
U3
PS2801-1
R12
100Ω
Q1
Si4848DY
R7, 1Ω
R3
51.1 1%
C2
4700pF
T1
3.3V Isolated Flyback Regulator
OSC
LT4180
TYPICAL APPLICATIONS
4180fp
LT4180
PACKAGE DESCRIPTION
GN Package
24-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.337 – .344*
(8.560 – 8.738)
24 23 22 21 20 19 18 17 16 15 1413
.033
(0.838)
REF
.045 ±.005
.229 – .244
(5.817 – 6.198)
.254 MIN
.150 – .157**
(3.810 – 3.988)
.150 – .165
1
.0165 ± .0015
2 3
4
5 6
7
8
9 10 11 12
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
.015 ± .004
× 45°
(0.38 ± 0.10)
.0075 – .0098
(0.19 – 0.25)
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
.008 – .012
(0.203 – 0.305)
TYP
.0250
(0.635)
BSC
GN24 (SSOP) 0204
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
4180fp
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT4180
TYPICAL APPLICATION
12V 1.5A Buck Regulator
E1
VIN
22V TO 36V
GND
+
E3
C1
22μF
50V
C5
0.1μF
50V
R5
30.1k
R8
68.1k
1%
R7
10k
R1
0.033 1%
C6
0.47μF
R3
100k
INTVCC
C2
1μF
50V
VIN BD BOOST
SW
RUN/SD
PG
FB
RT
UI
LT3685EDD
SYNC
VISHAY
1HLP2020CZ-11
L1, 10μH
R4
61.9k
1%
C7
22μF
25V
D1
DFLS240
R6
3.65k
1%
INTVCC
VC
D2
CMDSH-3
R11
1k
INTVCC
C8
1μF
FB
R9
2.01k
1%
R10
5.36k
1%
OUTPUT TO WIRING AND LOAD
12V, 1.5A
2.5Ω MAX RWIRE
470μF LOAD CAPACITANCE
C4
1μF
RUN
VIN
SENSE
DIV2
DIV1 DIV0
VPP INTVCC
SPREAD
LT4180EGN
OV
DRAIN
COMP GND CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4
C9
47pF
R13
17.4k
1%
C10
4.7nF
C11
470pF
C13
10nF
C12
470pF
OSC
COSC ROSC
C14
330pF
R12
22.1k
1%
4180 TA05
C15
1.5nF
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT3581
Boost/Inverting DC/DC Converter with 3.3A Switch,
Soft-Start and Synchronization
2.5V ≤ VIN ≤ 22V, Current Mode Control, 200kHz to 2.5MHz, MSOP-16E and
3mm × 4mm DFN-14 Packages
LT3685
36V, 2A, 2.4MHz Step-Down Switching Regulator
3.6V≤ VIN ≤ 36V (60VPK), Integrated Boost Diode, MSOP-10E and
3mm × 3mm DFN Packages
LT3573
Isolated Flyback Switching Regulator with 60V
Integrated Switch
3V ≤ VIN ≤ 40V, Up to 7W, No Opto-Isolator or Third Winding Required,
MSOP-16E Package
LT3757
Boost, Flyback, SEPIC and Inverting Controller
2.9V ≤ VIN ≤ 40V, Current Mode Control, 100kHz to 1MHz Programmable
Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages
LT3758
Boost, Flyback, SEPIC and Inverting Controller
5.5V ≤ VIN ≤ 100V, Current Mode Control, 100kHz to 1MHz Programmable
Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages
LTC3805/
LTC3805-5
Adjustable Fixed 70kHz to 700kHz Operating
Frequency Flyback Controller
VIN and VOUT Limited Only by External Components, MSOP-10E and
3mm × 3mm DFN-10 Packages
4180fp
16 Linear Technology Corporation
LT 0310 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2010
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