LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 LM7171QML Very High Speed, High Output Current, Voltage Feedback Amplifier Check for Samples: LM7171QML, LM7171QML-SP FEATURES DESCRIPTION • • • • • • • • • • The LM7171 is a high speed voltage feedback amplifier that has the slewing characteristic of a current feedback amplifier; yet it can be used in all traditional voltage feedback amplifier configurations. The LM7171 is stable for gains as low as +2 or −1. It provides a very high slew rate at 4100V/μs and a wide unity-gain bandwidth of 200 MHz while consuming only 6.5 mA of supply current. It is ideal for video and high speed signal processing applications such as HDSL and pulse amplifiers. With 100 mA output current, the LM7171 can be used for video distribution, as a transformer driver or as a laser diode driver. 1 23 (Typical Unless Otherwise Noted) Easy-To-Use Voltage Feedback Topology Very High Slew Rate: 2400V/μs Wide Unity-Gain Bandwidth: 200 MHz −3 dB Frequency @ AV = +2: 220 MHz Low Supply Current: 6.5 mA High Open Loop Gain: 85 dB High Output Current: 100 mA Specified for ±15V and ±5V Operation Available with Radiation Guarantee – Total Ionizing Dose 300 Krad(Si) – ELDRS Free 300 Krad(Si) APPLICATIONS • • • • • • • • HDSL and ADSL Drivers Multimedia Broadcast Systems Professional Video Cameras Video Amplifiers Copiers/Scanners/Fax HDTV Amplifiers Pulse Amplifiers and Peak Detectors CATV/Fiber Optics Signal Processing Operation on ±15V power supplies allows for large signal swings and provides greater dynamic range and signal-to-noise ratio. The LM7171 offers low SFDR and THD, ideal for ADC/DAC systems. In addition, the LM7171 is specified for ±5V operation for portable applications. The LM7171 is built on Texas Instruments's advanced VIP™ III (Vertically integrated PNP) complementary bipolar process. Connection Diagram NC 1 10 NC IN- 2 9 V+ NC 3 8 NC IN+ 4 7 VOUTPUT V- 5 6 NC Figure 1. 8-Pin CDIP Top View Figure 2. 10-Pin CFP Top View 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. VIP is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2013, Texas Instruments Incorporated LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Simplified Schematic Diagram Note: M1 and M2 are current mirrors. Typical Performance Large Signal Pulse Response AV = +2, VS = ±15V These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 2 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Absolute Maximum Ratings (1) Supply Voltage (V+–V−) 36V Differential Input Voltage (2) ±10V Maximum Power Dissipation (3) 730mW Output Short Circuit to Ground (4) Continuous −65°C ≤ TA ≤ +150°C Storage Temperature Range Thermal Resistance (5) θJA θJC Package Weight (Typical) Maximum Junction Temperature 8LD CDIP (Still Air) 106°C/W 8LD CDIP (500LF/Min Air flow) 53°C/W 10LD CFP (Still Air) 182°C/W 10LD CFP (500LF/Min Air flow) 105°C/W 10LD CFP "WG" (device 01, 02) (Still Air) 182°C/W 10LD CFP "WG" (device 01, 02) (500LF/Min Air flow) 105°C/W 8LD CDIP 3°C/W 10LD CFP 5°C/W 10LD CFP "WG" (device 01, 02) (6) 5°C/W 8LD CDIP 965mg 10LD CFP 235mg 10LD CFP "WG" (device 01, 02) 230mg (3) 150°C ESD Tolerance (7) (1) (2) (3) (4) (5) (6) (7) 3000V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For specified specifications and test conditions, see the Electrical Characteristics. The specified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Differential input voltage is applied at VS = ±15V. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. All numbers apply for packages soldered directly into a PC board. The package material for these devices allows much improved heat transfer over our standard ceramic packages. In order to take full advantage of this improved heat transfer, heat sinking must be provided between the package base (directly beneath the die), and either metal traces on, or thermal vias through, the printed circuit board. Without this additional heat sinking, device power dissipation must be calculated using θJA, rather than θJC, thermal resistance. It must not be assumed that the device leads will provide substantial heat transfer out the package, since the thermal resistance of the leadframe material is very poor, relative to the material of the package base. The stated θJC thermal resistance is for the package material only, and does not account for the additional thermal resistance between the package base and the printed circuit board. The user must determine the value of the additional thermal resistance and must combine this with the stated value for the package, to calculate the total allowed power dissipation for the device. Human body model, 1.5 kΩ in series with 100 pF. Recommended Operating Conditions (1) 5.5V ≤ VS ≤ 36V Supply Voltage −55°C ≤ TA ≤ +125°C Operating Temperature Range (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For specified specifications and test conditions, see the Electrical Characteristics. The specified specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 3 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Table 1. Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A 4 Subgroup Description Temp °C 1 Static tests at 25 2 Static tests at 125 3 Static tests at -55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at -55 7 Functional tests at 25 8A Functional tests at 125 8B Functional tests at -55 9 Switching tests at 25 10 Switching tests at 125 11 Switching tests at -55 12 Settling time at 25 13 Settling time at 125 14 Settling time at -55 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 LM7171 (±15) Electrical Characteristics DC Parameters (1) (2) The following conditions apply, unless otherwise specified. DC: TJ = 25°C, V+ = +15V, V− = −15V, VCM = 0V, and RL > 1MΩ Symbol VIO Parameter Conditions Input Offset Voltage +IIB Input Offset Current CMRR Common Mode Rejection Ratio PSRR Power Supply Rejection Ratio Large Signal Voltage Gain VCM = ±10V RL = 1KΩ, VO = ±5V Output Swing (2) (3) (4) 1.0 mV 1 −7.0 7.0 mV 2, 3 10 µA 1 12 µA 2, 3 10 µA 1 12 µA 2, 3 −4.0 4.0 µA 1 −6.0 6.0 µA 2, 3 1 70 dB 2, 3 85 dB 1 80 dB 2, 3 See (3) 80 dB 1 See (3) 75 dB 2, 3 See (3) 75 dB 1 See (3) 70 dB 2, 3 RL = 1KΩ Output Current (Open Loop) (1) −1.0 dB RL = 100Ω IS Units 85 VS = ±15V to ±5V RL = 100Ω, VO = ±5V VO Max Input Bias Current IIO Subgroups Min Input Bias Current -IIB AV Notes 13 -13 V 1 12.7 -12.7 V 2, 3 10.5 -9.5 V 1 9.5 -9.0 V 2, 3 Sourcing RL = 100Ω See (4) 105 mA 1 See (4) 95 mA 2, 3 Sinking RL = 100Ω See (4) -95 mA 1 See (4) -90 mA 2, 3 8.5 mA 1 9.5 mA 2, 3 Supply Current Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MILSTD-883, with no enhanced low dose rate sensitivity (ELDRS). Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15V, VOUT = ±5V. For VS = ±5V, VOUT = ±1V. The open loop output current is specified, by the measurement of the open loop output voltage swing, using 100Ω output load. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 5 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com LM7171 (±15) Electrical Characteristics AC Parameters (1) (2) The following conditions apply, unless otherwise specified. AC: TJ = 25°C, V+ = +15V, V− = −15V, VCM = 0V, and RL > 1MΩ Symbol Parameter SR Slew Rate GBW Unity-Gain Bandwidth (1) Conditions AV = 2, VI = ±2.5V 3nS Rise & Fall time Units Subgroups 2000 V/µS 4 170 MHz 4 Notes Min See (3) (4) See (5) Max Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MILSTD-883, with no enhanced low dose rate sensitivity (ELDRS). See AN00001 for SR test circuit. Slew Rate measured between ±4V. See AN00002 for GBW test circuit. (2) (3) (4) (5) LM7171 (±15) Electrical Characteristics DC Drift Parameters (1) (2) The following conditions apply, unless otherwise specified. DC: TJ = 25°C, V+ = +15V, V− = −15V, VCM = 0V, and RL > 1MΩ Delta calculations performed on QMLV devices at group B , subgroup 5. Symbol Parameter Conditions Notes Min Max Units Subgroups VIO Input Offset Voltage -250 250 µV 1 +IBias Input Bias Current -500 500 nA 1 -IBias Input Bias Current -500 500 nA 1 (1) (2) 6 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MILSTD-883, with no enhanced low dose rate sensitivity (ELDRS). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 LM7171 (±5) Electrical Characteristics DC Parameters (1) (2) The following conditions apply, unless otherwise specified. DC: TJ = 25°C, V+ = +5V, V− = −5V, VCM = 0V, and RL > 1MΩ Symbol VIO Parameter Conditions Input Offset Voltage +IIB Input Offset Current CMRR Common Mode Rejection Ratio Large Signal Voltage Gain VCM = ±2.5V RL = 1KΩ, VO = ±1V RL = 100Ω, VO = ±1V VO Output Swing (2) (3) (4) −1.5 1.5 mV 1 −7.0 7.0 mV 2, 3 10 µA 1 12 µA 2, 3 10 µA 1 12 µA 2, 3 −4.0 4.0 µA 1 −6.0 6.0 µA 2, 3 dB 1 70 dB 2, 3 See (3) 75 dB 1 See (3) 70 dB 2, 3 See (3) 72 dB 1 See (3) 67 dB 2, 3 RL = 1KΩ Output Current (Open Loop) (1) Units 80 RL = 100Ω IS Max Input Bias Current IIO Subgroups Min Input Bias Current -IIB AV Notes 3.2 -3.2 V 1 3.0 -3.0 V 2, 3 2.9 -2.9 V 1 2.8 -2.75 V 2, 3 Sourcing RL = 100Ω See (4) 29 mA 1 See (4) 28 mA 2, 3 Sinking RL = 100Ω See (4) -29 mA 1 See (4) -27.5 mA 2, 3 8.0 mA 1 9.0 mA 2, 3 Supply Current Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MILSTD-883, with no enhanced low dose rate sensitivity (ELDRS). Large signal voltage gain is the total output swing divided by the input signal required to produce that swing. For VS = ±15V, VOUT = ±5V. For VS = ±5V, VOUT = ±1V. The open loop output current is specified, by the measurement of the open loop output voltage swing, using 100Ω output load. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 7 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com LM7171 (±5) Electrical Characteristics DC Drift Parameters (1) (2) The following conditions apply, unless otherwise specified. DC: TJ = 25°C, V+ = +5V, V− = −5V, VCM = 0V, and RL > 1MΩ Delta calculations performed on QMLV devices at group B , subgroup 5. Symbol Parameter Conditions Notes Min Max Units Subgroups VIO Input Offset Voltage -250 250 µV 1 +IBias Input Bias Current -500 500 nA 1 -IBias Input Bias Current -500 500 nA 1 (1) (2) 8 Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. These parts may be dose rate sensitive in a space environment and demonstrate enhanced low dose rate effect. Radiation end point limits for the noted parameters are specified only for the conditions as specified in MIL-STD-883, per Test Method 1019, Condition A. Pre and post irradiation limits are identical to those listed under AC and DC electrical characteristics except as listed in the Post Radiation Limits Table. Low dose rate testing has been peformed on a wafer-by-wafer basis, per Test Method 1019, Condition D of MILSTD-883, with no enhanced low dose rate sensitivity (ELDRS). Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Typical Performance Characteristics unless otherwise noted, TA= 25°C Supply Current vs Supply Voltage Supply Current vs Temperature Figure 3. Figure 4. Input Offset Voltage vs Temperature Input Bias Current vs Temperature Figure 5. Figure 6. Short Circuit Current vs Temperature (Sourcing) Short Circuit Current vs Temperature (Sinking) Figure 7. Figure 8. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 9 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 10 Output Voltage vs Output Current Output Voltage vs Output Current Figure 9. Figure 10. CMRR vs Frequency PSRR vs Frequency Figure 11. Figure 12. PSRR vs Frequency Open Loop Frequency Response Figure 13. Figure 14. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Open Loop Frequency Response Gain-Bandwidth Product vs Supply Voltage Figure 15. Figure 16. Gain-Bandwidth Product vs Load Capacitance Large Signal Voltage Gain vs Load Figure 17. Figure 18. Large Signal Voltage Gain vs Load Input Voltage Noise vs Frequency Figure 19. Figure 20. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 11 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 12 Input Voltage Noise vs Frequency Input Current Noise vs Frequency Figure 21. Figure 22. Input Current Noise vs Frequency Slew Rate vs Supply Voltage Figure 23. Figure 24. Slew Rate vs Input Voltage Slew Rate vs Load Capacitance Figure 25. Figure 26. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Open Loop Output Impedance vs Frequency Open Loop Output Impedance vs Frequency Figure 27. Figure 28. Large Signal Pulse Response AV = −1, VS = ±15V Large Signal Pulse Response AV = −1, VS = ±5V Figure 29. Figure 30. Large Signal Pulse Response AV = +2, VS = ±15V Large Signal Pulse Response AV = +2, VS = ±5V Figure 31. Figure 32. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 13 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 14 Small Signal Pulse Response AV = −1, VS = ±15V Small Signal Pulse Response AV = −1, VS = ±5V Figure 33. Figure 34. Small Signal Pulse Response AV = +2, VS = ±15V Small Signal Pulse Response AV = +2, VS = ±5V Figure 35. Figure 36. Closed Loop Frequency Response vs Supply Voltage (AV = +2) Closed Loop Frequency Response vs Capacitive Load (AV = +2) Figure 37. Figure 38. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Closed Loop Frequency Response vs Capacitive Load (AV = +2) Closed Loop Frequency Response vs Input Signal Level (AV = +2) Figure 39. Figure 40. Closed Loop Frequency Response vs Input Signal Level (AV = +2) Closed Loop Frequency Response vs Input Signal Level (AV = +2) Figure 41. Figure 42. Closed Loop Frequency Response vs Input Signal Level (AV = +2) Closed Loop Frequency Response vs Input Signal Level (AV = +4) Figure 43. Figure 44. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 15 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C 16 Closed Loop Frequency Response vs Input Signal Level (AV = +4) Closed Loop Frequency Response vs Input Signal Level (AV = +4) Figure 45. Figure 46. Closed Loop Frequency Response vs Input Signal Level (AV = +4) Total Harmonic Distortion vs Frequency Figure 47. Figure 48. Total Harmonic Distortion vs Frequency Undistorted Output Swing vs Frequency Figure 49. Figure 50. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Typical Performance Characteristics (continued) unless otherwise noted, TA= 25°C Undistorted Output Swing vs Frequency Undistorted Output Swing vs Frequency Figure 51. Figure 52. Harmonic Distortion vs Frequency Harmonic Distortion vs Frequency Figure 53. Figure 54. Maximum Power Dissipation vs Ambient Temperature The THD measurement at low frequency is limited by the test instrument. Figure 55. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 17 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com APPLICATION NOTES LM7171 Performance Discussion The LM7171 is a very high speed, voltage feedback amplifier. It consumes only 6.5 mA supply current while providing a unity-gain bandwidth of 200 MHz and a slew rate of 4100V/μs. It also has other great features such as low differential gain and phase and high output current. The LM7171 is a true voltage feedback amplifier. Unlike current feedback amplifiers (CFAs) with a low inverting input impedance and a high non-inverting input impedance, both inputs of voltage feedback amplifiers (VFAs) have high impedance nodes. The low impedance inverting input in CFAs and a feedback capacitor create an additional pole that will lead to instability. As a result, CFAs cannot be used in traditional op amp circuits such as photodiode amplifiers, I-to-V converters and integrators where a feedback capacitor is required. LM7171 Circuit Operation The class AB input stage in the LM7171 is fully symmetrical and has a similar slewing characteristic to the current feedback amplifiers. In the LM7171 Simplified Schematic, Q1 through Q4 form the equivalent of the current feedback input buffer, RE the equivalent of the feedback resistor, and stage A buffers the inverting input. The triple-buffered output stage isolates the gain stage from the load to provide low output impedance. LM7171 Slew Rate Characteristic The slew rate of the LM7171 is determined by the current available to charge and discharge an internal high impedance node capacitor. This current is the differential input voltage divided by the total degeneration resistor RE. Therefore, the slew rate is proportional to the input voltage level, and the higher slew rates are achievable in the lower gain configurations. A curve of slew rate versus input voltage level is provided in the “Typical Performance Characteristics”. When a very fast large signal pulse is applied to the input of an amplifier, some overshoot or undershoot occurs. By placing an external resistor such as 1 kΩ in series with the input of the LM7171, the bandwidth is reduced to help lower the overshoot. Slew Rate Limitation If the amplifier's input signal has too large of an amplitude at too high of a frequency, the amplifier is said to be slew rate limited; this can cause ringing in time domain and peaking in frequency domain at the output of the amplifier. In the Typical Performance Characteristics section, there are several curves of AV = +2 and AV = +4 versus input signal levels. For the AV = +4 curves, no peaking is present and the LM7171 responds identically to the different input signal levels of 30 mV, 100 mV and 300 mV. For the AV = +2 curves, slight peaking occurs. This peaking at high frequency (>100 MHz) is caused by a large input signal at high enough frequency that exceeds the amplifier's slew rate. The peaking in frequency response does not limit the pulse response in time domain, and the LM7171 is stable with noise gain of ≥+2. Layout Consideration PRINTED CIRCUIT BOARDS AND HIGH SPEED OP AMPS There are many things to consider when designing PC boards for high speed op amps. Without proper caution, it is very easy to have excessive ringing, oscillation and other degraded AC performance in high speed circuits. As a rule, the signal traces should be short and wide to provide low inductance and low impedance paths. Any unused board space needs to be grounded to reduce stray signal pickup. Critical components should also be grounded at a common point to eliminate voltage drop. Sockets add capacitance to the board and can affect high frequency performance. It is better to solder the amplifier directly into the PC board without using any socket. USING PROBES Active (FET) probes are ideal for taking high frequency measurements because they have wide bandwidth, high input impedance and low input capacitance. However, the probe ground leads provide a long ground loop that will produce errors in measurement. Instead, the probes can be grounded directly by removing the ground leads and probe jackets and using scope probe jacks. 18 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 COMPONENT SELECTION AND FEEDBACK RESISTOR It is important in high speed applications to keep all component leads short. For discrete components, choose carbon composition-type resistors and mica-type capacitors. Surface mount components are preferred over discrete components for minimum inductive effect. Large values of feedback resistors can couple with parasitic capacitance and cause undesirable effects such as ringing or oscillation in high speed amplifiers. For the LM7171, a feedback resistor of 510Ω gives optimal performance. Compensation for Input Capacitance The combination of an amplifier's input capacitance with the gain setting resistors, adds a pole that can cause peaking or oscillation. To solve this problem, a feedback capacitor with a value CF > (RG × CIN)/RF (1) can be used to cancel that pole. For the LM7171, a feedback capacitor of 2 pF is recommended. Figure 56 illustrates the compensation circuit. Figure 56. Compensating for Input Capacitance Power Supply Bypassing Bypassing the power supply is necessary to maintain low power supply impedance across frequency. Both positive and negative power supplies should be bypassed individually by placing 0.01 μF ceramic capacitors directly to power supply pins and 2.2 μF tantalum capacitors close to the power supply pins. Figure 57. Power Supply Bypassing Termination In high frequency applications, reflections occur if signals are not properly terminated. Figure 58 shows a properly terminated signal while Figure 59 shows an improperly terminated signal. Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 19 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Figure 58. Properly Terminated Signal Figure 59. Improperly Terminated Signal To minimize reflection, coaxial cable with matching characteristic impedance to the signal source should be used. The other end of the cable should be terminated with the same value terminator or resistor. For the commonly used cables, RG59 has 75Ω characteristic impedance, and RG58 has 50Ω characteristic impedance. Driving Capacitive Loads Amplifiers driving capacitive loads can oscillate or have ringing at the output. To eliminate oscillation or reduce ringing, an isolation resistor can be placed as shown below in Figure 60. The combination of the isolation resistor and the load capacitor forms a pole to increase stability by adding more phase margin to the overall system. The desired performance depends on the value of the isolation resistor; the bigger the isolation resistor, the more damped the pulse response becomes. For LM7171, a 50Ω isolation resistor is recommended for initial evaluation. Figure 61 shows the LM7171 driving a 150 pF load with the 50Ω isolation resistor. Figure 60. Isolation Resistor Used to Drive Capacitive Load 20 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Figure 61. The LM7171 Driving a 150 pF Load with a 50Ω Isolation Resistor Power Dissipation The maximum power allowed to dissipate in a device is defined as: PD = (TJ(max) − TA)/θJA (2) Where PD is the power dissipation in a device TJ(max) is the maximum junction temperature TA is the ambient temperature θJA is the thermal resistance of a particular package For example, for the LM7171 in a CFP package, the maximum power dissipation at 25°C ambient temperature is 680 mW. Thermal resistance, θJA, depends on parameters such as die size, package size and package material. The smaller the die size and package, the higher θJA becomes. The 8-pin CDIP package has a lower thermal resistance (106°C/W) than that of the CFP (182°C/W). Therefore, for higher dissipation capability, use an 8-pin CDIP package. The total power dissipated in a device can be calculated as: PD = PQ + PL (3) PQ is the quiescent power dissipated in a device with no load connected at the output. PL is the power dissipated in the device with a load connected at the output; it is not the power dissipated by the load. Furthermore, PQ: PL: = supply current × total supply voltage with no load = output current × (voltage difference between supply voltage and output voltage of the same side of supply voltage) For example, the total power dissipated by the LM7171 with VS = ±15V and output voltage of 10V into 1 kΩ is PD = PQ + PL = (6.5 mA) × (30V) + (10 mA) × (15V − 10V) = 195 mW + 50 mW = 245 mW Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 21 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com Application Circuit Figure 62. Fast Instrumentation Amplifier Figure 63. Multivibrator Figure 64. Pulse Width Modulator 22 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP LM7171QML, LM7171QML-SP www.ti.com SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 Figure 65. Video Line Driver Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP Submit Documentation Feedback 23 LM7171QML, LM7171QML-SP SNOSAR5C – FEBRUARY 2009 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Released Revision 02/04/09 A Section New Release, Corporate format Changes 1 MDS data sheet converted into one Corp. data sheet format. Added ELDRS NSID's to Ordering Information Table. MNLM7171AM-X-RH Rev 0C0 will be archived. Changes from Revision B (April 2013) to Revision C • 24 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 23 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM7171QML LM7171QML-SP PACKAGE OPTION ADDENDUM www.ti.com 2-Aug-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-9553601QPA NRND CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM7171AMJQML 5962-95536 01QPA Q ACO 01QPA Q >T 5962-9553601QXA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM7171AM WG Q 5962-95536 01QXA ACO 01QXA >T 5962F9553601VHA ACTIVE CFP NAD 10 19 TBD Call TI Call TI -55 to 125 LM7171AM WFQMLV Q 5962F95536 01VHA ACO 01VHA >T 5962F9553601VPA ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM7171AMJFQV 5962F95536 01VPA Q ACO 01VPA Q >T 5962F9553601VXA ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM7171AM WGFQMLV Q 5962F95536 01VXA ACO 01VXA >T LM7171AMJ-QML NRND CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM7171AMJQML 5962-95536 01QPA Q ACO 01QPA Q >T LM7171AMJFQMLV ACTIVE CDIP NAB 8 40 TBD Call TI Call TI -55 to 125 LM7171AMJFQV 5962F95536 01VPA Q ACO 01VPA Q >T LM7171AMWFQMLV ACTIVE CFP NAD 10 19 TBD Call TI Call TI -55 to 125 LM7171AM WFQMLV Q 5962F95536 01VHA ACO 01VHA >T LM7171AMWG-QML ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM7171AM Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 2-Aug-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) (3) Device Marking (4/5) WG Q 5962-95536 01QXA ACO 01QXA >T LM7171AMWGFQMLV ACTIVE CFP NAC 10 54 TBD Call TI Call TI -55 to 125 LM7171AM WGFQMLV Q 5962F95536 01VXA ACO 01VXA >T (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 2-Aug-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM7171QML, LM7171QML-SP : • Military: LM7171QML • Space: LM7171QML-SP NOTE: Qualified Version Definitions: • Military - QML certified for Military and Defense Applications • Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3 MECHANICAL DATA NAB0008A J08A (Rev M) www.ti.com MECHANICAL DATA NAC0010A WG10A (Rev H) www.ti.com MECHANICAL DATA NAD0010A W10A (Rev H) www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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