LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET KEY FEATURES DESCRIPTION The LX1800 has an internal bandgap reference and also allows the use of an external reference. The external reference can be used as an analog input for volume control using the DAC or to provide wider range for high amplitude analog signals. The 8 pin MLP package is small occupying no more area than a TSOT package. 8 bit accuracy ADC and DAC in one package Fully compliant to standard SMBus Bus controllable Sleep mode Optional external reference WWW . Microsemi .C OM The LX1800 bridges the analog and digital world. The analog interface contains and eight bit ADC and 8 bit DAC and the digital interface is a serial data SMBus interface. The LX1800 works well in a feedback control system such as an LCD backlight system where the analog output of an ambient light sensor such as the LX1972 can be digitized allowing the micro controller to adjust the analog dimming signal accordingly. APPLICATIONS Processor controlled dimming VID control interface Digital regulator control Audio volume control IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com PRODUCT HIGHLIGHT 3.3V To µP SCL VDD SCD REF GND AIN ADR AOUT LX1972 LX1800 BRT CCFL LX1800 LX1691 Based Module PACKAGE ORDER INFO TJ (°C) LD Plastic MLP 8-pin RoHS Compliant / Pb-free -40 to +85 LX1800ILD Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. LX1800ILD-TR) Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 1 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET ABSOLUTE MAXIMUM RATINGS PACKAGE PIN OUT Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to Ground. Currents are positive into, negative out of specified terminal. VIN 1 ADR 2 SCL 3 SDA 4 Connect Bottom to Power GND 8 AI 7 AO 6 GND 5 REF LD PACKAGE (Top View) THERMAL DATA LD WWW . Microsemi .C OM Supply Input Voltage ........................................................................-0.3V to 7.0V REF, AO, AI, ADR, SCL, SDA........................................................-0.3V to 7.0V Operating Temperature Range ..................................................................... 150°C Maximum Operating Junction Temperature ................................................ 150°C Storage Temperature Range...........................................................-65°C to 150°C Peak Package Solder Reflow Temp (40 second max. exposure) .... 260°C (+0, -5) RoHS / Pb-free 100% Matte Tin Lead Finish Plastic MLPD 8-Pin THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 48°C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. FUNCTIONAL PIN DESCRIPTION Name ADR Description SMBus Address – The address for the LX1800 is determined by the sate of this pin. ADR = GND is address 54B, ADR = VCC is address 55B. AI Analog Input – Sampled input for the Analog-to-Digital converter. AO Analog Output – Output of Digital-to-Analog converter. GND Ground – Connect to system ground. REF External Voltage Reference (optional) – Reference for both ADC and DAC. REF must be less than 80% of VIN. SCL SMBus Clock – Connect to SMBus Clock line SDA SMBus Data – Connect to SMBus Data line VIN Power Supply – Connect to a 2.7V to 5.5V power source. PACKAGE DATA Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 2 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET ELECTRICAL CHARACTERISTICS Parameter ` ` Symbol Test Conditions Min Operating Supply Voltage VCC Average Supply Current ICC DAC = FFH; idle ADC Sleep Current ICC Control Register = 10H 2.7 DAC Full-scale Output VFS DAC = FFH; IAO = 0 ± 10µA 2.42 DAC Zero-scale Output VZS DAC = 00H; IAO = 0 ± 10µA 0 DAC Absolute Accuracy DAC = 00H to FFH DAC Adjacent Code Error DAC = 01H to FEH; GBNT TTD 100 5.5 V 200 µA 50 µA Bits 2.58 V 30 mV -5 0 -5 LSB -0.5 0 0.5 LSB Delay from Stop Transition VAI = 1.25V 1 µS 124 128 5 V 132 LSB VAI = 0V to 2.5V -6 0 6 LSB Input Leakage Current IAI VAI = 1.25V -3 0 3 µA Input Capacitance CAI VAI = 1.25V 30 Acquisition Time TAQ VAI = 1.25V 100 pF 200 µs 5 V EXTERNAL REF Input Range VREF 0 Input Leakage Current IREF -50 0 50 nA VINT 1.96 2.00 2.04 V High Level Input Voltage VAHL 80 Low Level Input Voltage VALL Input Leakage Current IADR INTERNAL REF Reference Voltage ADR -50 %VCC 0 20 %VCC 50 nA SCL, SDA High Level Input Voltage VSHL 2.7 < VCC < 5.5V Low Level Input Voltage VSLL 2.7 < VCC < 5.5V Input Leakage Current ISMB SDA Low Level Output Voltage VOL 2.1 -5 IOUT = 350µA ELECTRICALS ` 2.50 0 ADC Absolute Accuracy ` Units ADC ADC Mid point Output ` Max 8 Resolvable Input Range ` LX1800 Typ DAC DAC Transition Delay ` 85°C except where POWER SUPPLY DAC Resolution ` ≤ WWW . Microsemi .C OM Unless otherwise specified, the following specifications apply over the operating ambient temperature -40°C ≤ TA otherwise noted and the following test conditions: VCC = 5V, VREF external = 2.500V, Control register = 1BH. V 0 0.8 V 5 µA 0.4 V 100 KHz SMBUS SMB clock frequency Copyright © 2004 Rev. 1.0, 2006-01-05 FCLK 10 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 3 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET SMBUS COMMUNICATION FORMAT Start Address W/R Ack Data Ack Data 0101100b or 1 byte 0 Index 0101101b Data Ack Stop Ack Stop Read Command Format: Start Address W/R 0101100b or 1 0101101b Ack Data Read Indexed Register Repeated Start Command Format: The LX1800 will support the execution of successive commands that are not separated by “stop conditions” provided the commands are otherwise formatted as indicated above. GENERAL SMBUS PROTOCOL SUMMARY (see SMBus specification version 2.0 for more details). Start condition: Host sends a high-to-low SDA transition while SCL is high. Address: Host sends to 0101100 ADR=GND; 0101101 ADR = VCC W/R: Host sends a “Lo” bit for an instruction with a DATA Write and a “Hi” bit for a DATA Read. Acknowledge: LX1800 and Host let SDA go high while SCL is low after data byte transfer indicating next byte may be sent. Stop Condition: A low-to-high SDA transition while SCL is high. Normal condition: SDA transitions only while SCL is low. For timing information see SMBus specification version 2.0. Data is transferred with the MSB first. APPLICATIONS Write Format (Two optional packet lengths) Start Address 0101100b or 0101101b Copyright © 2004 Rev. 1.0, 2006-01-05 W/R 0 Ack Data Ack WWW . Microsemi .C OM The LX1800 looks for its unique address each time it detects a “start condition”. If the address does not match, the LX1800 ignores all bus activity until it encounters another “start condition”. If the address is a match, the LX1800 acknowledges that it has detected its address and a W/R bit to either read or write data. If the W/R bit is a “0”, signifying a “write command”, the next byte of data sent from the host will be the index. The index points to an internal register in the LX1800 that will be the object of the subsequent data transfers. There are four internal registers within the LX1800: The Control register, the DAC register ,the ADC register, and the MISC register. In a write command, the LX1800 will acknowledge the receipt of a valid index. After the index, there may be another byte of data; if so, this byte of data is loaded into the indexed register. The LX1800 will acknowledge receipt of the data byte. If the write command does not contain data, the command line will be terminated by a “stop condition” received from the host. If for some reason, the data transfer is corrupted prior to acknowledgement, the LX1800 will not acknowledge receipt of the byte in question and will not take action on the incomplete data. The LX1800 can receive only one data byte in a write command and will ignore all additional bus activity once it has acknowledged receipt of the data byte until the next “start condition” is detected. Receipt of a “stop condition” or “start condition” will reset the address detection state machine. The LX1800 does not support “Packet Error Code”. The host can read the contents of the indexed register within the LX1800 using a read command line. In this command line the W/R bit is set to “1”. Upon receipt of a read command, the LX1800 will acknowledge that it has detected its address and a valid W/R bit; then it will put a copy of the one byte of data from the indexed register onto the bus. (As explained above, the index may be changed using a write command with or without an additional data byte.) Once the LX1800 has placed the byte of data on the serial bus, it will ignore all additional bus activity until the next “start condition” is detected. Stop Index Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 4 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET SMBUS REGISTER MAP WWW . Microsemi .C OM Each register has an address which is programmed into the index register. The value in the index register determines which register is accessed on a given read or write operation. Control Register: Address = xxxxxx00b Type = Read/Write Default = 10000000 Bit Assignments: 7 6 5 4 3 2 1 0 Sleep Mode Reference ADC Start ADC Mode Invert DAC Mode ADC Loop Back ADC Continuous ADC Clock Mode 1 = active mode, 0 = sleep mode 1 = external, 0 = internal 1 = start A/D; this bit is reset to 0 when conversion complete. 1 = always on; 0 = turn on as required 1 = normal DAC bit polarity; 0 = inverted DAC input polarity 1 = ADC drives DAC directly; 0 = DAC input comes from Bus 1 = ADC continuously converts; 0 = ADC on Bus command 1 = ADC uses SCL clock; 0 = ADC uses internal clock. DAC Register: Address = xxxxxx01b Type = Read/Write Default = 10000000b Bit Assignments: FFh = full scale (VREF); 00h = 0V (normal polarity mode) ADC Register: Address = xxxxxx10b Type = Read Only Default = 00000000b Bit Assignments: FFh = full scale (VREF); 00h = 0V MISC Register: Address = xxxxxx11b Type = Read/Write for bits 7:4; Read Only for bits 3:0 Default = 00000101b Bit Assignments: 7:4 3:2 1:0 Unassigned Version Revision 01b = version 1 01b = revision 1 APPLICATIONS Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 5 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET SIMPLIFIED BLOCK DIAGRAM WWW . Microsemi .C OM SCL SDA SMBus Interface Command Register ADR VCC GND UV Lockout and Control Logic DAC Register 8 BIT DAC AOUT REF Internal 2.0V Reference AIN 8 BIT DAC ADC Register BLOCK DIAGRAM Figure 1 – Simplified Block Diagram Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 6 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET APPLICATION CIRCUITS WWW . Microsemi .C OM 3.3V 0.1µF SCL VDD SCD REF GND AIN ADR AOUT LX1972 To µP 10 µF 49.9K LX1800 CCFL LX1691 Based Module Figure 2 – Backlight dimmer with ambient light compensation 5V 49.9k To µP SCL VDD SCD REF GND AIN ADR AOUT LX1800 0.1µF 10nF Analog Out 49.9K APPLICATIONS Analog In Figure 3 – 1) Log or exponential taper using a µP lookup table or 2) Infinite Sample and Hold. Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 7 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET APPLICATION CIRCUITS WWW . Microsemi .C OM Audio In 5V To µP SCL VDD SCD REF GND AIN ADR AOUT 2V 0.1µF 100K 1V 0.1µF LX1800 Audio Out 100K Figure 4 – Digital Volume Control with Audio Absent Detection. THEORY OF OPERATION BASIC FUNCTIONALITY The LX1800 contains an 8 bit DAC, an 8 bit ADC and a SMBus interface which connects the input of the DAC and the output of the ADC to the SMBus host. The LX1800 contains an internal 2V reference and can also be configured to use an external reference. Since the 8 bit DAC is a multiplying type, the external reference can be used for an analog input for volume control applications. The ADC contains a sample and hold input that stores the analog voltage level while the conversion is being processed. The LX1800 has three internal registers, the Command register, the DAC register and the ADC register. The CMD register is read/write, the DAC register is write only and the ADC register is read only. Control of the LX1800 are performed through the CMD register. SMBUS INTERFACE Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 APPLICATIONS The LX1800 communicates over the SMBus in the slow speed Low Power Level and operates in a “slave” mode receiving commands and sending and receiving data from the host or bus “master”. The LX1800 can be configured for one of two addresses, 0101100b when the ADR line is grounded and 0101101b when the ADR line is connected to Vcc. Page 8 LX1800 SMBus to Analog Interface ® TM P RODUCTION D ATA S HEET APPLICATION NOTE WWW . Microsemi .C OM LAYOUT GUIDELINES The LX1800 is sensitive to noise at the reference pin so this node should be a low impedance path to ground for high frequency noise. As a precaution, the REF node should be routed away from digital switching traces. The Vcc Pin should be decoupled to ground with a 0.1µF ceramic capacitor located in close proximity to the IC. PACKAGE DIMENSIONS LD 8 Pin Plastic MLP Dual Exposed Pad L D E2 E D2 b top bottom A3 Dim A A1 A3 b D D2 e E E2 L MILLIMETERS MIN MAX 0.80 1.00 0 0.05 0.20 REF 0.25 0.30 3.00 BSC 1.60 2.50 0.65 BSC 3.00 BSC 1.35 1.75 0.30 0.50 INCHES MIN MAX 0.0315 0.0394 0 0.0019 0.0079 REF 0.010 0.0118 0.1181 BSC 0.0630 0.0984 0.0260 BSC 0.1181 BSC 0.0531 0.0689 0.0071 0.0197 A side Note: e 1. Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(.006”) on any side. Lead dimension shall not include solder coverage. A1 APPLICATIONS Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 9 LX1800 TM SMBus to Analog Interface ® P RODUCTION D ATA S HEET NOTES WWW . Microsemi .C OM NOTES PRODUCTION DATA – Information contained in this document is proprietary to Microsemi and is current as of publication date. This document may not be modified in any way without the express written consent of Microsemi. Product processing does not necessarily include testing of all parameters. Microsemi reserves the right to change the configuration and performance of the product and to discontinue product at any time. Copyright © 2004 Rev. 1.0, 2006-01-05 Microsemi Integrated Products Division 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 Page 10