Intersil ISL84715 Ultra low on-resistance, low voltage, single supply, spst analog switch Datasheet

ISL84715, ISL84716
®
Data Sheet
November 17, 2004
Ultra Low ON-Resistance, Low Voltage,
Single Supply, SPST Analog Switches
The Intersil ISL84715 and ISL84716 devices are low
ON-resistance, low voltage, bidirectional, single pole/single
throw (SPST) analog switches designed to operate from a
single +1.65V to +3.6V supply. Targeted applications include
battery powered equipment that benefit from low RON
resistance, excellent RON flatness, and fast switching
speeds (tON = 9ns, tOFF = 5ns). The digital logic input is
1.8V CMOS compatible when using a single +3V supply.
FN6087.2
Features
• Pb-Free Available (RoHS Compliant)
• Drop in replacement for the MAX4715 and MAX4716
• ON resistance (RON)
- VCC = +2.7V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.26Ω
- VCC = +1.8V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.45Ω
• RON flatness (+2.7V Supply) . . . . . . . . . . . . . . . . . . . 0.038Ω
• Single supply operation . . . . . . . . . . . . . . . . +1.65V to +3.6V
Cell phones, for example, often face ASIC functionality
limitations. The number of analog input or GPIO pins may be
limited and digital geometries are not well suited to analog
switch performance. This family of parts may be used to
switch in additional functionality while reducing ASIC design
risk. The ISL8471X are offered in a 5 lead SC70 package,
alleviating board space limitations.
• Fast switching action (+2.7V Supply)
- tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9ns
- tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ns
The ISL84715 has one normally open (NO) switch and
ISL84716 has one normally closed (NC) switch.
Applications
TABLE 1. FEATURES AT A GLANCE
ISL84715
ISL84716
Number of Switches
1
1
SW
NO
NC
1.8V RON
0.45Ω
0.45Ω
1.8V tON/tOFF
17ns/7ns
17ns/7ns
3V RON
0.24Ω
0.24Ω
3V tON/tOFF
8ns/4ns
8ns/4ns
5 Ld SC70
Package
1
• ESD HBM rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >4kV
• 1.8V, CMOS logic compatible (+3V supply)
• Available in 5 lead SC70 packaging
• Battery powered, handheld, and portable equipment
- Cellular/mobile phones
- Pagers
- Laptops, notebooks, palmtops
• Portable Test and Measurement
• Medical Equipment
• Audio and video switching
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL84715, ISL84716
Pinouts
(Note 1)
ISL84715 (SC70)
TOP VIEW
ISL84716 (SC70)
TOP VIEW
5 V+
COM 1
5 V+
COM 1
NC 2
NO 2
4 IN
GND 3
4 IN
GND 3
NOTE:
1. Switches Shown for Logic “0” Input.
Truth Table
LOGIC
NOTE:
Ordering Information
ISL84715
ISL84716
0
Off
On
1
On
Off
Logic “0” ≤0.5V. Logic “1” ≥1.4V with a 3V supply.
Pin Descriptions
PIN
V+
FUNCTION
System Power Supply Input (+1.65V to +3.6V)
GND
Ground Connection
IN
Digital Control Input
COM
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
2
PART NO.
(BRAND)
TEMP.
RANGE (°C)
PACKAGE
PKG.
DWG. #
ISL84715IH-T
(715I)
-40 to 85
5 Ld SC70
Tape and Reel
P5.049
ISL84715IHZ-T
(715I)
(Note)
-40 to 85
5 Ld SC70
Tape and Reel
(Pb-Free)
P5.049
ISL84716IH-T
(716I)
-40 to 85
5 Ld SC70
Tape and Reel
P5.049
ISL84716IHZ-T
(716I)
(Note)
-40 to 85
5 Ld SC70
Tape and Reel
(Pb-Free)
P5.049
NOTE: Intersil Pb-free products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.
FN6087.2
November 17, 2004
ISL84715, ISL84716
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 4.8V
Input Voltages
NO, NC, IN (Note 2). . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current NO, NC, or COM . . . . . . . . . . . . . . . . . ±300mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . . ± 600mA
ESD Rating:
HBM > . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>4kV
MM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>300V
CDM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1000V
Thermal Resistance (Typical, Note 3)
θJA (°C/W)
5 Ld SC70 Package . . . . . . . . . . . . . . . . . . . . . . . . .
660
Maximum Junction Temperature (Plastic Package). . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL8471XIH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NC, NO, IN, or COM exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
Full
0
-
V+
V
25
-
0.26
0.4
Ω
Full
-
-
0.45
Ω
TYP
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 1.5V
(See Figure 4)
ON Resistance, RON
RON Flatness, RFLAT(ON)
V+ = 2.7V, ICOM = 100mA, VNO or VNC = 0.6V, 1.5V,
2.1V (Note 7)
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.3V, VCOM = 0.3V, 3V, VNO or VNC = 3V, 0.3V
COM ON Leakage Current,
ICOM(ON)
V+ = 3.3V, VCOM = 0.3V, 3V, or VNO or VNC = 0.3V, 3V,
or Floating
25
-
0.038
0.07
Ω
Full
-
-
0.09
Ω
25
-3
-
3
nA
Full
-20
-
20
nA
25
-3
-
3
nA
Full
-20
-
20
nA
25
-3
-
3
nA
Full
-35
-
35
nA
DYNAMIC CHARACTERISTICS
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Turn-ON Time, tON
25
-
9
12
ns
Full
-
-
15
ns
25
-
5
8
ns
Turn-OFF Time, tOFF
V+ = 2.7V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
Full
-
-
11
ns
Charge Injection, Q
VG = V+/2, RG = 0Ω,CL = 1.0nF (See Figure 2)
25
-
70
-
pC
OFF Isolation
RL = 50Ω, CL = 5pF, f = 1MHz, VCOM = 1VRMS
(See Figure 3)
25
-
-45
-
dB
Total Harmonic Distortion
f = 20Hz to 20kHz, VCOM = 2VP-P, RL = 32Ω
25
-
0.003
-
%
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5)
25
-
68
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5)
25
-
68
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 5)
25
-
160
-
pF
3
FN6087.2
November 17, 2004
ISL84715, ISL84716
Electrical Specifications - 3V Supply
PARAMETER
Test Conditions: V+ = +2.7V to +3.6V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Notes 4, 6),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
Full
1.65
-
3.6
V
25
-
0.018
0.05
µA
Full
-
-
0.35
µA
Full
-
-
0.5
V
Full
1.4
-
-
V
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Power Supply Range
V+ = 3.6V, VIN = 0V or V+
Positive Supply Current, I+
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
V+ = 3.6V, VIN = 0V or V+ (Note 8)
NOTES:
4. VIN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C. Limits across the full temperature range are guaranteed by design and correlation.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
8. Guaranteed but not tested.
Electrical Specifications - 1.8V Supply
PARAMETER
Test Conditions: V+ = +1.8V, GND = 0V, VINH = 1V, VINL = 0.4V (Notes 4, 6),
Unless Otherwise Specified
TEST CONDITIONS
TEMP
(°C)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
Full
0
-
V+
V
Ω
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 1.8V, ICOM = 10mA, VNO or VNC = 0.9V
(See Figure 4)
25
-
0.45
0.6
Full
-
-
0.8
Ω
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 1.8V, VCOM = 0.3V, 1.5V, VNO or VNC = 1.5V, 0.3V
25
-2
-
2
nA
Full
-20
-
20
nA
COM OFF Leakage Current,
ICOM(OFF)
V+ = 1.8V, VCOM = 0.3V, 1.5V, VNO or VNC = 1.5V, 0.3V
25
-2
-
2
nA
Full
-20
-
20
nA
COM ON Leakage Current,
ICOM(ON)
V+ = 1.8V, VCOM = 0.3V, 1.5V, or VNO or VNC = 0.3V,
1.5V, or Floating
25
-1
-
1
nA
Full
-20
-
20
nA
V+ = 1.8V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
25
-
17
22
ns
Full
-
-
24
ns
V+ = 1.8V, VNO or VNC = 1.5V, RL = 50Ω, CL = 35pF
(See Figure 1, Note 8)
25
-
7
11
ns
Full
-
-
14
ns
VG = V+/2, RG = 0Ω,CL = 1.0nF (See Figure 2)
25
-
60
-
pC
25
-
0.018
0.05
µA
Full
-
-
0.35
µA
Full
-
-
0.4
V
Full
1
-
-
V
Full
-1
-
1
µA
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
Charge Injection, Q
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
VIN = 0V or V+
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Input Voltage High, VINH
Input Current, IINH, IINL
VIN = 0V or V+ (Note 8)
4
FN6087.2
November 17, 2004
ISL84715, ISL84716
Test Circuits and Waveforms
V+
LOGIC
INPUT
V+
tr < 5ns
tf < 5ns
50%
0V
tOFF
SWITCH
INPUT VNO
VOUT
NO or NC
SWITCH
INPUT
COM
VOUT
IN
90%
SWITCH
OUTPUT
C
90%
0V
LOGIC
INPUT
CL
35pF
RL
50Ω
GND
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for all switches. CL includes fixture and stray
capacitance.
RL
V OUT = V (NO or NC) -----------------------------R L + R ( ON )
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
RG
∆VOUT
C
VOUT
COM
NO or NC
V+
ON
ON
LOGIC
INPUT
VG
OFF
GND
IN
CL
0V
LOGIC
INPUT
Q = ∆VOUT x CL
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
V+
C
C
RON = V1/100mA
SIGNAL
GENERATOR
NO or NC
NO or NC
VNX
IN
0V or V+
IN
V1
0V or V+
COM
COM
ANALYZER
100mA
GND
GND
RL
FIGURE 3. OFF ISOLATION TEST CIRCUIT
5
FIGURE 4. RON TEST CIRCUIT
FN6087.2
November 17, 2004
ISL84715, ISL84716
Test Circuits and Waveforms (Continued)
V+
C
NO or NC
IN
0V or V+
IMPEDANCE
ANALYZER
COM
GND
FIGURE 5. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL84715 and ISL84716 are bidirectional, single
pole/single throw (SPST) analog switches. They offer
precise switching capability from a single 1.65V to 3.6V
supply with ultra low on-resistance and high speed
operation. With a single supply of 3V the typical onresistance is only 0.26Ω, with a typical turn-on and turn-off
time of: tON = 9ns, tOFF = 5ns. The devices are especially
well suited for portable battery powered equipment due to its
low operating supply voltage (1.65V), low power
consumption (1.05µW), low leakage currents (35nA max), and
the tiny SC70 packaging.
The ISL84715 is a normally open (NO) SPST analog switch.
The ISL84716 is a normally closed (NC) SPST analog
switch.
Supply Sequencing And Overvoltage Protection
With any CMOS device, proper power supply sequencing is
required to protect the device from excessive input currents
which might permanently damage the IC. All I/O pins contain
ESD protection diodes from the pin to V+ and to GND (See
Figure 6). To prevent forward biasing these diodes, V+ must
be applied before any input signals, and the input signal
voltages must remain between V+ and GND. If these
conditions cannot be guaranteed, then one of the following
two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (See Figure 6). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
6
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (See Figure 6). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
unaffected by this approach, but the switch signal range is
reduced and the resistance may increase, especially at low
supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
INX
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 6. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL8471X construction is typical of most single supply
CMOS analog switches in that they have two supply pins: V+
and GND. V+ and GND drive the internal CMOS switches
and set their analog voltage limits. Unlike switches with a 4V
maximum supply voltage, the ISL84714 4.8V maximum
FN6087.2
November 17, 2004
ISL84715, ISL84716
supply voltage provides plenty of room for the 10% tolerance
of 3.6V supplies, as well as room for overshoot and noise
spikes.
The minimum recommended supply voltage is 3.6V but the
part will operate with a supply below 1.5V. It is important to
note that the input signal range, switching times, and onresistance degrade at lower supply voltages. Refer to the
electrical specification tables and Typical Performance
curves for details.
V+ and GND also power the internal logic and level shiftier.
The level shiftier converts the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
consistent over a wide V+ range, and for varying analog
signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation is
the resistance to this feedthrough. Figure 15 details the high
Off Isolation rejection provided by this family. At 1MHz, Off
Isolation is about 45dB in 50Ω systems, decreasing
approximately 20dB per decade as frequency increases.
Higher load impedances decrease Off Isolation and
Crosstalk rejection due to the voltage divider action of the
switch OFF impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.5V and 1.4V)
over a supply range of 2V to 3.6V (See Figure 13). At 3.6V
the VIH level is about 1.1V. This is still below the 1.8V CMOS
guaranteed high output minimum level of 1.4V, but noise
margin is reduced.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
100MHz (See Figure 14). The frequency response is very
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog signal
paths and V+ or GND.
Typical Performance Curves TA = 25°C, Unless Otherwise Specified
0.4
0.7
ICOM = 100mA
V+ = 2.7V
ICOM = 100mA
0.6
0.35
0.5
0.3
RON (Ω)
RON (Ω)
V+ = 1.5V
85°C
25°C
0.25
0.4
V+ = 1.8V
-40°C
0.2
0.3
V+ = 3.6V
V+ = 2.7V
0.2
V+ = 3V
0
0.15
1
2
3
VCOM (V)
FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE vs
SWITCH VOLTAGE
7
4
0
0.5
1
1.5
2
2.5
3
VCOM (V)
FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE
FN6087.2
November 17, 2004
ISL84715, ISL84716
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
100
0.5
V+ = 1.8V
ICOM = 10mA
90
0.45
80
85°C
60
25°C
0.35
Q (pC)
RON (Ω)
V+ = 3V
70
0.4
-40°C
0.3
V+ = 1.8V
50
40
30
0.25
20
0.2
0
0.5
1
1.5
10
2
0
0.5
1
1.5
2
2.5
3
VCOM (V)
VCOM (V)
FIGURE 9. ON RESISTANCE vs SWITCH VOLTAGE
FIGURE 10. CHARGE INJECTION vs SWITCH VOLTAGE
12
50
11
10
9
30
tOFF (ns)
tON (ns)
40
85°C
20
8
7
25°C
-40°C
85°C
6
10
-40°C
25°C
5
4
0
1
1.5
2
2.5
3
3.5
4
1
4.5
1.5
2
2.5
V+ (V)
3
3.5
4
4.5
V+ (V)
FIGURE 11. TURN - ON TIME vs SUPPLY VOLTAGE
FIGURE 12. TURN - OFF TIME vs SUPPLY VOLTAGE
1.2
V+ = 1.8V to 3.6V
VINH AND VINL (V)
1
VINH
0.9
0.8
VINL
0.7
GAIN
0
-20
PHASE
0
80
0.6
PHASE (DEGREES)
NORMALIZED GAIN (dB)
1.1
160
0.5
0.4
RL = 50Ω
VIN = 0.2VP-P to 2.8VP-P (V+ = 3.0V)
0.3
1
1.5
2
2.5
3
V+ (V)
3.5
4
4.5
FIGURE 13. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
8
1
10
100
300
FREQUENCY (MHz)
FIGURE 14. FREQUENCY RESPONSE
FN6087.2
November 17, 2004
ISL84715, ISL84716
Typical Performance Curves TA = 25°C, Unless Otherwise Specified (Continued)
0
V+ = 1.8V to 3.6V
10
OFF ISOLATION (dB)
20
30
40
50
60
70
80
90
100
1K
10K
100K
1M
10M
100M 500M
FREQUENCY (Hz)
FIGURE 15. OFF ISOLATION
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT: 57
PROCESS:
Submicron CMOS
9
FN6087.2
November 17, 2004
ISL84715, ISL84716
Small Outline Transistor Plastic Packages (SC70-5)
P5.049
D
VIEW C
e1
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
INCHES
5
SYMBOL
4
E
CL
1
2
CL
3
e
E1
b
CL
0.20 (0.008) M
C
C
CL
A
A2
SEATING
PLANE
A1
-C-
WITH
PLATING
b1
NOTES
0.031
0.043
0.80
1.10
-
0.004
0.00
0.10
-
A2
0.031
0.039
0.80
1.00
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
c
0.003
0.009
0.08
0.22
6
c1
0.003
0.009
0.08
0.20
6
D
0.073
0.085
1.85
2.15
3
E
0.071
0.094
1.80
2.40
-
E1
0.045
0.053
1.15
1.35
3
e
0.0256 Ref
0.65 Ref
-
e1
0.0512 Ref
1.30 Ref
-
L2
0.010
0.018
0.017 Ref.
0.26
4
0.46
0.420 Ref.
0.006 BSC
0o
N
c1
MAX
0.000
α
c
MIN
A
L
b
MILLIMETERS
MAX
A1
L1
0.10 (0.004) C
MIN
-
0.15 BSC
8o
0o
5
8o
-
5
5
R
0.004
-
0.10
-
R1
0.004
0.010
0.15
0.25
Rev. 2 9/03
NOTES:
BASE METAL
1. Dimensioning and tolerances per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.
4X θ1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1
α
L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.
4X θ1
VIEW C
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
10
FN6087.2
November 17, 2004
Similar pages