Fairchild MLP14D Universal serial bus peripheral transceiver with voltage regulator Datasheet

USB1T1103
Universal Serial Bus Peripheral Transceiver
with Voltage Regulator
Features
Description
■ Complies with Universal Serial Bus Specification 2.0
This chip provides a USB Transceiver functionality with a
voltage regulator that is compliant to USB Specification
Rev 2.0. this integrated 5V to 3.3V regulator allows interfacing of USB Application specific devices with supply
voltages ranging from 1.65V to 3.6V with the physical
layer of Universal Serial Bus. It is capable of operating at
12Mbits/s (full speed) data rates and hence is fully compliant to USB Specification Rev 2.0. The Vbusmon terminal allows for monitoring the Vbus line.
■ Integrated 5V to 3.3V voltage regulator for powering
VBus
■ Utilizes digital inputs and outputs to transmit and
receive USB cable data
■ Supports full speed (12Mbits/s) data rates
■ Ideal for portable electronic devices
■ MLP technology package (16 terminal) with HBCC
footprint
■ 15kV contact HBM ESD protection on bus terminals
■ Supports disable mode and is functionally equivalent
The USB1T1103 also provides exceptional ESD protection with 15kV contact HBM on D+,D- terminals
to Philips ISP1102
Applications
■ PDA
■ PC Peripherals
■ Cellular Phones
■ MP3 Players
■ Digital Still Camera
■ Information Appliance
Ordering Information
Part Number
Package
Number
Product code Pb-Free
Top Mark
Package Description
Packing
Method
USB1T1103MPX
MLP14D
$Y&Z&2&T
USB1103
Yes
14-Terminal Molded Leadless Package
(MLP), 2.5mm Square
3K Units
on Tape
and Reel
USB1T1103MHX
MLP16HB
$Y&Z&2&T
USB1103
Yes
16-Terminal Molded Leadless Package
(MHBCC), JEDEC MO-217,3mm
Square
3K Units
on Tape
and Reel
Pb-Free package per JEDEC J-STD-020B.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
USBIT1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
October 2007
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Typical Application
Figure 1. Logic Diagram
Connection Diagrams
Figure 2. MLP16 GND Exposed Diepad
(Bottom View)
Figure 3. MLP14 GND Exposed Diepad
(Bottom View)
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
2
Terminal
Terminal
Number
Name
MLP14 MLP16
I/O
Terminal Description
1
1
OE
I
Output Enable:
Active LOW enables the transceiver to transmit data on the bus. When not active the transceiver is in
the receive mode (CMOS level is relative to VCCIO)
2
2
RCV
O
Receive Data Output:
Non-inverted CMOS level output for USB differential Input (CMOS output level is relative to VCCIO).
Driven LOW when SUSPN is HIGH; RCV output is stable and preserved during SE0 condition.
3
3
Vp/Vpo
I/O
Single-ended D+ receiver output VP (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device; Terminal also acts
as drive data input Vpo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
4
4
Vm/Vmo
I/O
Single-ended D- receiver output Vm (CMOS level relative to VCCIO):
Used for external detection of SE0, error conditions, speed of connected device; Terminal also acts
as drive data input Vmo (see Table 1 and Table 2).
Output drive is 4 mA buffer.
5
5
SUSPND
I
Suspend:
Enables a low power state (CMOS level is relative to VCCIO). While the
SUSPND terminal is active (HIGH) it will drive the RCV terminal to logic “0” state.
—
6
NC
6
7
VCCIO
No Connect
7
8
Vbusmon
O
9, 8
10, 9
D+, D-
AI/O
10
11
NC
No Connect
—
12
NC
No Connect
11
13
VREG (3.3V)
Internal Regulator Option:
Regulated supply output voltage (3.0V to 3.6V) during 5V operation;
decoupling capacitor of at least 0.1 µF is required.
Regulator ByPass Option:
Used as supply voltage input for 3.3V operation.
12
14
VCC (5.0V)
Internal Regulator Option:
Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB line Vbus.
Regulator ByPass Option:
Connected to VREG (3.3V)
13
15
VPU (3.3V)
Pull-up Supply Voltage (3.3V ± 10%):
Connect an external 1.5kΩ resistor on D+ (FS data rate);
Terminal function is controlled by Config input terminal:
Config = LOW - VPU (3.3V) is floating (HIGH Impedance) for zero pull-up current.
Config = HIGH - VPU (3.3V) = 3.3V; internally connected to VREG (3.3V).
VPU is OFF in disable mode.
14
16
Config
I
Exposed
Diepad
Exposed
Diepad
GND
GND
Supply Voltage for digital I/O terminals (1.65V to 3.6V):
When not connected the D+ and D- terminals are in 3-STATE. This supply bus is totally independent
of VCC (5V) and VREG (3.3V), and must never exceed the VREG (3.3) voltage. For VCCIO disconnected the O+/O- terminals are HIGH Impedance and the VPU (3.3V) is turned off.
Vbus monitor output (CMOS level relative to VCCIO):
When Vbus > 4.1V then Vbusmon = HIGH and when Vbus < 3.6V then
Vbusmon = LOW. If SUSPND = HIGH then Vbusmon is pulled HIGH.
Data +, Data -:
Differential data bus conforming to the USB standard. Terminals are HIGH Impedance for bus powered mode when Vbus < 3.6V. For ByPass Mode then HIGH Impedance when VREG/ Vbus < VREG
minimum.
USB connect or disconnect software control input.
Configures 3.3V to external 1.5kΩ resistor on D+ when HIGH.
GND supply down bonded to exposed diepad to be connected to the PCB GND.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
3
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Terminal Descriptions
The USB1T1103 transceiver is designed to convert
CMOS data into USB differential bus signal levels and to
convert USB differential bus signal to CMOS data.
nals rather than discrete input and output terminals.
Table 1 describes the specific terminal functionality
selection. Table 2 and Table 3 describe the specific Truth
Tables for Driver and Receiver operating functions.
To minimize EMI and noise the outputs are edge rate
controlled with the rise and fall times controlled and
defined for full speed data rates only (12Mbits/s). The
rise, fall times are balanced between the differential terminals to minimize skew.
The USB1T1103 also has the capability of various power
supply configurations, including a disable mode for
VCCIO disconnected, to support mixed voltage supply
applications (see Table 4) and Section 2.1 for detailed
descriptions.
The USB1T1103 differs from earlier USB Transceiver in
that the Vp/Vm and Vpo/Vmo terminals are now I/O termi-
Functional Tables
Table 1. Function Select
SUSPND
OE
D+, D-
RCV
Vp/Vpo
Vm/Vmo
L
L
Driving &
Receiving
Active
Vpo Input
Vmo Input
L
H
Receiving (1)
Active
Vp Output
Vm Output
Receiving
H
L
Driving
Inactive(2)
Vpo Input
Vmo Input
Driving during Suspend
(Differential Receiver Inactive)
H
H
3 STATE(1)
Inactive(2)
Vp Output
Vm Output
Low Power State
Function
Normal Driving
(Differential Receiver Active)
Notes:
1. Signal levels is function of connection and/or pull-up/pull-down resistors.
2. For SUSPND = HIGH mode the differential receiver is inactive and the output RCV is forced LOW. The out-of-suspend signaling
(K) is detected via the single-ended receivers of the Vp/Vpo and Vm/Vmo terminals.
Table 2. Driver Function (OE = L) using Differential Input Interface
Vm/Vmo
Vp/Vpo
Data (D+ / D-)
L
L
SE0 (3)
L
H
Differential Logic 1
H
L
Differential Logic 0
H
H
Illegal State
Notes:
3. SE0 = Single Ended Zero
Table 3. Receiver Function (OE = H)
D+, D-
RCV
Vp/Vpo
Vm/Vmo
Differential Logic 1
H
H
L
Differential Logic 0
L
L
H
SE0
X
L
L
Notes:
4. X = Don't Care
5. RCV(0) denotes the signal level on output RCV just prior to the SE0 or SE1 event. This level is stable during the SE0 or SE1
event period.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
4
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Functional Description
external signals up to 3.6V to share the D+ and D- bus
lines. Internally the circuitry limits leakage from D+ and
D- terminals (maximum 10µA) and VCCIO such that
device is in low power (suspended) state. Terminals
Vbusmon and RCV are forced LOW as an indication of
this mode with Vbusmon being ignored during this state.
The three modes of power supply operation are:
Normal Mode: Regulated Output and Regulator Bypass
1.
Regulated Output: VCCIO is connected and VCC(5.0)
is connected to 5V (4.0V to 5.5V) and the internal
voltage regulator then produces 3.3V for the USB
connections.
2.
Internal Regulator Bypass Mode: VCCIO is connected and both VCC(5.0) and VREG(3.3) are connected to a 3.3V source (3.0V to 3.6V).
Disable Mode: VCCIO is not connected. VCC is connected, or VCC and VREG are connected. 0V to 3.3V in
this mode D+ and D- are 3-STATE and VPU is HIGH
Impedance (switch is turned off). The USB1T1103 allows
external signals up to 3.6V to share the D+ and D- bus
lines. Internally the circuitry limits leakage from D+ and
D- pins (maximum 10µ A).
In both cases, for normal mode, the VCCIO is an independent voltage source (1.65V to 3.6V) that is a function of
the external circuit configuration.
A summary of the Supply Configurations is described in
Table 4.
Sharing Mode: VCCIO is only supply connected. VCC
and VREG are not connected. In this mode, the D+ and
D- terminals are 3-STATE and the USB1T1103 allows
Table 4. Power Supply Configuration Options
Terminals
Disable
Sharing
Normal
(Regulated Output)
Normal
(Regulator Bypass)
VCC (5V)
Connected
to 5V source
Not Connected
or <3.6V
Connected to
5V Source
Connected to
VREG (3.3V)
[Max Drop of 0.3V]
(2.7V to 3.6V)
VREG (3.3V)
3.3V, 300µA
Regulated Output
Not Connected
3.3V, 300µA
Regulated Output
Connected to 3.3V Source
VCCIO
≤0.5V
1.65V to 3.6V Source
1.65V to 3.6V Source
1.65V to 3.6V Source
VPU (3.3V)
3-STATE (off)
3-STATE (off)
3.3V Available if
Config = HIGH
3.3V Available if
Config = HIGH
D =, D-
3-STATE (off)
3-STATE
Function of
Mode Set Up
Function of
Mode Set Up
Vp/Vpo, Vm/Vmo
Invalid [I]
L
Function of
Mode Set Up
Function of
Mode Set Up
RCV
Invalid [I]
L
Function of
Mode Set Up
Function of
Mode Set Up
Vbusmon
Invalid [I]
L
Function of
Mode Set Up
Function of
Mode Set Up
OE, SUSPND, Config
Hi-Z
Hi-Z
Function of
Mode Set Up
Function of
Mode Set Up
Notes:
6. Invalid [I] I/O are to be 3-STATE, outputs to be LOW.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
5
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Power Supply Configurations and Options
Human Body Model
ESD Performance of the USB1T1103
Figure 3 shows the schematic representation of the
Human Body Model ESD event. Figure 4 is the ideal
waveform representation of the Human Body Model.
■ HBM D+/D-: 15.0kV
■ HBM, all other terminals (Mil-Std 883E): 6.5kV
IEC 61000-4-2, IEC 60749-26 and IEC 60749-27
ESD Protection: D+/D- Terminals
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment and evaluates the
equipment in its entirety for ESD immunity. Fairchild
Semiconductor has evaluated this device using the
IEC 6100-4-2 representative system model depicted in
Figure 5. Under the additional standards set forth by the
IEC, this device is also compliant with IEC 60749-26
(HBM) and IEC 60749-27 (MM).
Since the differential terminals of a USB transceiver may
be subjected to extreme ESD voltages, additional immunity has been included in the D+ and D- terminals without compromising performance. The USB1T1103
differential terminals have ESD protection to the following limits:
■ 15kV using the contact Human Body Model
Additional ESD Test Conditions
■ 8kV using the Contact Discharge method as specified
in IEC 61000-4-2
For additional information regarding our product test
methodologies and performance levels, please contact
Fairchild Semiconductor.
Figure 3. Human Body ESD Test Model
Figure 4. HBM Current Waveform
Figure 5. IEC 61000-4-2 ESD Test Model
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
6
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
ESD Protection
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are
not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the conditions for actual device operation.
Symbol
VCC (5V)
VCCIO
Parameter
Min.
Max.
Unit
Supply Voltage
-0.5
+6.0
V
I/O Supply Voltage
-0.5
+4.6
V
150
mA
ILU
Latch-up Current, VI = -1.8V to +5.4V
IIK
DC Input Current, VI<0
VI
DC Input Voltage(4)
IOK
DC Output Diode Current, VO >VCC or VO <0
VO
-18
mA
VCCIO +0.5
V
±18
mA
VCCIO+0.5
V
Current for D+,D- Terminals
±12
mA
Current for RCV, VM/VP
±12
mA
±100
mA
Terminals D+,D-, ILI < 1µA
±15
kV
All other Terminals ILI < 1µA
±6.5
kV
+150
C
ICC (5V)
48
mW
ICCIO
9
mW
Min.
Max.
Unit
DC Output Voltage
-0.5
(5)
-0.5
Output Source or Sink Current, VO + 0 to VCC
IO
ICC,IGND
DC VCC or GND Current
ESD Immunity Voltage
VESD
TSTG
Contact HBM
Storage Temperature
-40
Power Dissipation
PTOT
Notes:
7. IO Absolute Maximumun Rating must be observed.
8. Per ESD Methodology described on page 6.
Recommended Operation Conditions
Symbol
Parameter
VCC
Supply Voltage
4.0
5.5
V
VCC10
I/O DC Voltage
1.65
3.6
V
0
VCCIO +5.5
V
VI
VAI/O
TA
DC Input Voltage Range
DC Input Range for AI/O, Terminal D+ and DOperating Ambient Temperature
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
0
3.6
V
-40
+85
°C
www.fairchildsemi.com
7
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Absolute Maximum Ratings
Supply Terminals
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC (5V) = 4.0V to 5.5V or VREG (3.3V) = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V.
Limits
Symbol
Parameter
Conditions
Min.
Typ.
Max.
3.3
3.6
V
Transmitting and Receiving at 12 Mbits/s;
CLOAD = 50 pF (D+, D-)
4.0(11)
8.0
mA
I/O Operating Supply Current
Transmitting and Receiving at 12 Mbits/s
1.0(11)
2.0
mA
Supply Current during
IDLE: VD + ≤2.7V, VD - ≤ 0.3V;
FS IDLE and SE0 (VCC5.0)
SE0: VD + ≤ 0.3V, VD - ≤0.3V
300(12)
µA
20.0
µA
25.0
µA
Internal Regulator Option; ILOAD ≤300 µA
Operating Supply Current
(VCC5.0)
ICCIO
ICC (IDLE)
Units
3.0(9)(10)
VREG (3.3V) Regulated Supply Output
ICC
-40ºC to +85ºC
ICCIO (STATIC) I/O Static Supply Current
IDLE, SUSPND or SE0
ICC(DISABLE) Disable Supply Current
VCCIO = 0V
VCC Connected
ICC(SUSPND) Suspend Supply Current
USB1T1103
25.0(12)
SUSPND = HIGH
OE = HIGH
µA
Vm = Vp = OPEN
ICCIO(SHARING)
ID+ (SHARING)
ID +/ID+(DISABLE)
ID+/VCCTH
I/O Sharing Mode Supply Current VCC (5V) Not Connected
Sharing Mode Load Current on
VCC (5V) Not Connected
D+/D- Terminals
Config = LOW; VD± = 3.6V
Disable Mode Load Current on
VCCIO Not Connected or 0V
D+/D- Terminals
Config = VD ± = 3.6V LOW or HIGH
Supply Present
VCC Threshold Detection
VCCIO Threshold Detection Voltage
3.6
V
VCCIO Threshold Detection
VREG = 3.3V
450
Regulated Supply Threshold
1.65V ≤ VCCIO ≤ VREG
Detection Voltage
2.7V ≤ VREG ≤ 3.6V
VCCIO = 1.8V
V
2.4(14)
450
Detection Hysteresis Voltage
V
mV
0.8
Supply Present
Regulated Supply Threshold
mV
1.4
Supply Lost
VREGHYS
µA
0.5
Hysteresis Voltage
(15)
10.0
2.7V ≤ VREG ≤ 3.6V
Supply Present
VREGTH
µA
70.0
Supply Lost
VCCIOHYS
10.0
4.1
VCCIO = 1.8V
Hysteresis Voltage
VCCIOTH
µA
VCC Threshold Detection Voltage 1.65V ≤ VCCIO ≤3.6V
Supply Lost
VCCHYS
20.0
mV
Notes:
9.
10.
11.
12.
13.
14.
15.
ILOAD includes the pull-up resistor current via terminal VPU
The minimum voltage in Suspend mode is 2.7V.
Not tested in production, value based on characterization.
Excludes any current from load and VPU current to the 1.5kΩ resistor.
Includes current between Vpu and the 1.5k internal pull-up resistor.
When VCCIO < 2.7V, minimum value for VREGTH = 2.0V for supply present condition.
DC electrical measurements should be taken with unused inputs and I/O pins connected to a valid logic level. This applies for all
modes of device operation defined in the Functional Tables on Page 4.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
8
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
DC Electrical Characteristics
Digital Terminals – excludes D+, D- Terminals
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCCIO = 1.65V to 3.6V.
Limits
Symbol
Parameter
Conditions
-40C° to +85°C
Min.
Units
Max.
Input Levels
VIL
LOW Level Input Voltage
VIH
HIGH Level Input Voltage
0.3*VCCIO
0.6*VCCIO
V
V
Output Levels
VOL
VOH
LOW Level Output Voltage
HIGH Level Output Voltage
IOL = 2 mA
0.4
IOL = 100 =µA
0.15
IOH = 2 mA
VCCIO - 0.4
IOH = 100 =µA
VCCIO- 0.15
V
V
Leakage Current
ILI
Input Leakage Current
VCCIO = 1.65V to 3.6V
Input Capacitance
Terminal to GND
±1.0(16)
µA
10.0
pF
Capacitance
CIN, CI/O
Notes:
16. If VCCIO ≥ VREG, leakage current is higher than specified.
DC Electrical Characteristics
Analog I/O Terminals – D+, D- Terminals
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V.
Limits
Symbol
Parameter
Conditions
-40°C to +85°C
Min.
Typ.
Units
Max.
Input Levels – Differential Receiver
VDI
Differential Input Sensitivity
VCM
Differential Common Mode Voltage
| VI(D+) - VI(D-) |
0.2
0.8
V
2.5
V
0.8
V
0.7
V
Input Levels – Single-ended Receiver
VIL
LOW Level Input Voltage
VIH
HIGH Level Input Voltage
2.0
VHYS
Hysteresis Voltage
0.30
V
Output Levels
VOL
LOW Level Output Voltage
RL = 1.5kΩ to 3.6V
VOH
HIGH Level Output Voltage(17)
RL = 15kΩ to GND
2.8
0.3
V
3.6
V
±1.0
µA
20.0
pF
Leakage Current
IOFF
Input Leakage Current Off State
CAPACITANCE
CI/O
I/O Capacitance
Terminal to GND
Resistance
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
9
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
DC Electrical Characteristics
Symbol
Parameter
Conditions
-40°C to +85°C
Min.
ZDRV
Driver Output Impedance(18)
34.0
ZIN
Driver Input Impedance
10.0
RSW
Switch Resistance
VTERM
(19)(20)
Termination Voltage
RPU Upstream Port
3.0
Typ.
41.0
Units
Max.
44.0
Ω
MΩ
10.0
Ω
3.6
V
Notes:
17.
18.
19.
20.
If VOH minimum = VREG - 0.2V.
Includes external resistors of 27Ω on both D+ and D- terminals.
This voltage is available at terminal VPU and VREG.
Minimum voltage is 2.7V in the suspend mode.
AC Electrical Characteristics
A I/O Terminals Full Speed
Over recommended range of supply voltage and operating free air temperature (unless otherwise noted).
VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V, CL = 50 pF; RL = 1.5K on D+ to VPU.
Symbol
Parameter
Conditions
Limits
-40°C to +85°C
Min. Typ. Max.
Unit
Driver Characteristics
tR
Output Rise Time
CL = 50 - 125 pF
4.0
20.0
10% to 90%
ns
tF
Output Fall Time
Figure 8, 12
4.0
20.0
tRFM
Rise/Fall Time Match
tF/ tR Excludes First Transition
from Idle State
90.0
111.1
%
VCRS
Output Signal Crossover Voltage (21)
Excludes First Transition from
Idle State see Waveform
1.3
2.0
V
Figures 9,12
18.0
ns
Figures 11,12
15.0
ns
Figures 11,13
15.0
ns
Figures 10,14
15.0
ns
Figures 10,14
18.0
ns
Driver Timing
tPLH
Propagation Delay
tPHL
(Vp/Vpo, Vm/Vmo to D+/D-)
tPHZ
Driver Disable Delay
tPLZ
(OE to D+/D-)
tPZH
Driver Enable Delay
tPZL
(OE to D+/D-)
Receiver Timing
tPLH
Propagation Delay (Diff)
tPHL
(D+/D- to Rev)
tPLH
Single-Ended Receiver Propagation Delay
tPHL
(D+/D- to Vp/ Vpo, Vm/Vmo)
NOTES:
21. Not production tested; limits guaranteed by design.
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
10
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Limits
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Typical Application Configurations
Figure 6. Upstream Connection in Bypass Mode with Differential Outputs
Figure 7. Downstream Connection in Normal Mode with Differential Outputs
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
11
Figure 8. Rise and Fall Times
Figure 10. D+/D- to RCV, Vpo/Vp and Vmo/Vm
Figure 9. Vpo, Vmo to D+/D-
Figure 11. OE to D+/D-
Test Circuits and Waveforms
Figure 14. Load for Vm/Vmo, Vp/Vpo and RCV
CL = 50 pF Full Speed Propagation Delays
CL = -125 pF Edge Rates only
Figure 12. Load for D+/D-
V = 0 for tPZH, tPHZ
V = VREG for tPZL
Figure 13. Load for Enable and Disable Times
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
12
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
AC Waveforms
Tape Format for MHBCC and MLP
Package Designator
Number Cavities
Cavity Status
Cover Tape
Status
Leader (Start End)
125 (typ)
Empty
Sealed
Carrier
2500/3000
Filled
Sealed
Trailer (Hub End)
75 (typ)
Empty
Sealed
Tape Section
MHX/MPX
TAPE DIMENSIONS
Dimensions are in inches (millimeters) unless otherwise specified.
REEL DIMENSIONS
Dimensions are in inches (millimeters) unless otherwise specified.
Tape Size
12 mm
A
13.0
330
B
0.059
(1.50)
C
0.512
(13.00)
D
0.795
(20.20)
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
N
7.008
(178)
W1
0.488
(12.4)
W2
0.724
(18.4)
www.fairchildsemi.com
13
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Tape and Reel Specification
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Physical Dimensions
Figure 15. Pb-Free 14-Terminal Molded Leadless Package (MLP), 2.5mm Square
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
14
USB1T1103 Universal Serial Bus Peripheral Transceiver with Voltage Regulator
Physical Dimensions
Figure 16. Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square
© 2005 Fairchild Semiconductor Corporation
USB1T1103 Rev. 1.0.3
www.fairchildsemi.com
15
TRADEMARKS
The following are registered and unregistered trademarks and service marks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx®
Build it Now™
CorePLUS™
CROSSVOLT™
CTL™
Current Transfer Logic™
EcoSPARK®
Power247®
POWEREDGE®
Power-SPM™
PowerTrench®
Programmable Active Droop™
QFET®
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
SMART START™
SPM®
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
Green FPS™
Green FPS™ e-Series™
GTO™
i-Lo™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MillerDrive™
Motion-SPM™
OPTOLOGIC®
OPTOPLANAR®
®
Fairchild®
Fairchild Semiconductor®
FACT Quiet Series™
FACT®
FAST®
FastvCore™
FPS™
FRFET®
Global Power ResourceSM
®
PDP-SPM™
Power220®
SuperSOT™-8
SyncFET™
The Power Franchise®
TinyBoost™
TinyBuck™
TinyLogic®
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
μSerDes™
UHC®
UniFET™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative or In Design
This datasheet contains the design specifications for product
development. Specifications may change in any manner without notice.
Definition
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be
published at a later date. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor
reserves the right to make changes at any time without notice to improve
design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been
discontinued by Fairchild Semiconductor. The datasheet is printed for
reference information only.
Rev. I31
© 2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Similar pages