Maxim MAX3930D 10.7gbps laser diode driver Datasheet

19-1856; Rev 3; 3/02
KIT
ATION
EVALU
E
L
B
A
AVAIL
10.7Gbps Laser Diode Drivers
Features
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
♦
Single +5V or -5.2V Power Supply
108mA Supply Current
Operates to 10.7Gbps
50Ω On-Chip Input Termination Resistors
Programmable Modulation Current to 100mA
Programmable Laser Bias Current to 100mA
25ps Rise Time (MAX3930/MAX3932)
Adjustable Pulse-Width Control
Selectable Data Retiming Latch
ESD Protection
Internal Series Damping Resistor (MAX3931)
Ordering Information
________________________Applications
SONET OC-192 and SDH STM-64
Transmission Systems
PART
TEMP RANGE
PIN-PACKAGE
MAX3930E/D
-40°C to +85°C
Dice
MAX3931E/D
-40°C to +85°C
Dice
MAX3932E/D
-40°C to +85°C
Dice
MAX3932E/W
-40°C to +85°C
Wafer
Note: Dice are designed to operate over a -40°C to +120°C
junction temperature (TJ) range but are tested and guaranteed
at TA = +25°C.
Up to 10.7Gbps Optical Transmitters
Section Regenerators
Typical Application Circuit
5V
5V
VBIAS
5V
DATA-
50Ω
50Ω
DATA+
DATA-
BIASSET
DATA+
BIASMON
0.01µF
VCC
RD = 15Ω
MOD1
5V
MAX3910
5V
MODN1
VTT
10Gbps CLK+
SERIALIZER
50Ω
CLK+
CLK-
50Ω
CLK-
MOD2
MAX3930
20Ω
5V
MODSET
MODMON
MODEN
PWC-
RTEN
PWC+
MODN2
BIAS
LB
VEE
5V
2kΩ
REPRESENTS A CONTROLLED–
IMPEDANCE TRANSMISSION LINE
VMOD
† C0.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX3930/MAX3931/MAX3932†
General Description
The MAX3930/MAX3931/MAX3932 are designed for
direct modulation of laser diodes at data rates up to
10.7Gbps. They provide adjustable laser bias and
modulation currents and are implemented using
Maxim’s second-generation in-house SiGe process.
The MAX3930 accepts differential CML clock and data
input signals and includes 50Ω on-chip termination
resistors. It delivers a 1mA to 100mA laser bias current
and a 20mA to 100mA modulation current with a typical
(20% to 80%) 25ps rise time. An input data retiming
latch can be used to reject input pattern-dependent jitter
if a clock signal is available.
The MAX3931/MAX3932 have an alternate pad out with
respect to the MAX3930. The MAX3931 includes the
series damping resistor RD on chip.
The MAX3930/MAX3931/MAX3932 also include an
adjustable pulse-width control circuit to minimize laser
pulse-width distortion.
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC - VEE) ..................................-0.5V to +6.0V
DATA+, DATA-, CLK+,
CLK- ................................................(VTT - 1.2V) to the lower of
(VTT + 1.2V) or (VCC + 0.5V)
MODEN, RTEN, VTT, BIASMON, MODMON,
PWC+, and PWC- .........................(VEE - 0.5V) to (VCC + 0.5V)
MODN1, MODN2 ............................(VCC - 0.5V) to (VCC + 0.5V)
BIAS, MOD1, MOD2 ...........................(VEE + 1V) to (VEE + 1.5V)
MODSET and BIASSET ....................(VEE - 0.5V) to (VEE + 1.5V)
Storage Temperature Range .............................-55°C to +150°C
Operating Junction Temperature ......................-55°C to +150°C
Processing Temperature (die) .........................................+400°C
Current into DATA+, DATA-, CLK+,
CLK- (VTT = VCC)........................................-24mA to +30.5mA
Current into DATA+, DATA-, CLK+,
CLK- (VTT = VCC - 1.3V) ................................-24mA to +24mA
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS—MAX3930
(VCC - VEE = 4.75V to 5.5V, TA = -40°C to +85°C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25°C,
unless otherwise noted.)
PARAMETER
SYMBOL
Power-Supply Voltage
VCC - VEE
Power-Supply Current
ICC
CONDITIONS
TYP
MAX
UNITS
4.75
5
5.50
V
108
140
mA
50
57.5
Ω
100
mA
Excluding bias current and modulation
current
Single-Ended Input Resistance
42.5
Bias Current-Setting Range
1
Bias Current-Setting Error
Bias Sensing Resistor
MIN
Bias current = 100mA, TA = +25°C
-5
+5
Bias current = 1mA, TA = +25°C
-10
+10
IBIAS = 100mA (Note 1)
-480
RBIAS
2.7
Bias Current Temperature
Stability
IBIAS = 1mA (Note 1)
Bias Off-Current
BIASSET ≤ (VEE + 0.4V)
MODEN and RTEN Input High
VIH
MODEN and RTEN Input Low
VIL
Power-Supply Rejection Ratio
PSRR
3
3.3
+480
-200
0.05
VEE +
2
39.5
Ω
ppm/°C
mA
V
VEE +
0.8
VCC = 4.75V to 5.5V (Note 2)
%
60
V
dB
SIGNAL INPUT FOR VTT = VCC
At high
Single-Ended Input
(DC-Coupled)
Single-Ended Input
(AC-Coupled)
VIS
VCC
At low
VCC - 1
VCC 0.15
At high
VCC +
0.075
VCC +
0.4
At low
VCC 0.4
VCC 0.075
V
V
VIS
Differential Input Swing
(DC-Coupled)
VID
0.3
2.0
VP-P
Differential Input Swing
(AC-Coupled)
VID
0.3
1.6
VP-P
SIGNAL INPUT FOR VTT = (VCC - 1.3V)
Input Common Mode
2
VICM
VCC 1.3
_______________________________________________________________________________________
V
10.7Gbps Laser Diode Drivers
(VCC - VEE = 4.75V to 5.5V, TA = -40°C to +85°C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25°C,
unless otherwise noted.)
PARAMETER
Single-Ended Input
SYMBOL
CONDITIONS
TYP
MAX
At high
VCC 1.225
VCC 0.8
At low
VCC 1.8
VCC 1.375
0.3
2.0
UNITS
V
VIS
Differential Input Swing
MIN
VID
VP-P
DC ELECTRICAL CHARACTERISTICS—MAX3931/MAX3932
(VCC - VEE = 4.75V to 5.5V, TA = -40°C to +85°C. Typical values are at VCC - VEE = 5V, IBIAS = 50mA, IMOD = 70mA, and TA = +25°C,
unless otherwise noted.)
PARAMETER
SYMBOL
Power-Supply Voltage
VCC - VEE
Power-Supply Current
ICC
CONDITIONS
TYP
MAX
UNITS
4.75
5
5.50
V
108
140
mA
50
57.5
Ω
100
mA
Excluding bias current and modulation
current
Single-Ended Input Resistance
42.5
Bias Current Setting Range
1
Bias Current Setting Error
Bias Sensing Resistor
MIN
Bias current = 100mA, TA = +25°C
-5
+5
Bias current = 1mA, TA = +25°C
-10
+10
IBIAS = 100mA (Note 1)
-480
RBIAS
2.7
Bias Current Temperature
Stability
IBIAS = 1mA
Bias Off-Current
BIASSET ≤ (VEE + 0.4V)
MODEN and RTEN Input High
VIH
MODEN and RTEN Input Low
VIL
Power-Supply Rejection Ratio
PSRR
3
3.3
+480
-200
0.05
VEE +
2
39.5
Ω
ppm/°C
mA
V
VEE +
0.8
VCC = 4.75V to 5.5V (Note 3)
%
60
V
dB
SIGNAL INPUT
At high
Single-Ended Input
(DC-Coupled)
VIS
Single-Ended Input
(AC-Coupled)
VCC
At low
VCC - 1
VCC 0.15
At high
VCC +
0.075
VCC +
0.4
At low
VCC 0.4
VCC 0.075
V
V
VIS
Differential Input Swing
(DC-Coupled)
VID
0.3
2.0
VP-P
Differential Input Swing
(AC-Coupled)
VID
0.3
1.6
VP-P
_______________________________________________________________________________________
3
MAX3930/MAX3931/MAX3932
DC ELECTRICAL CHARACTERISTICS—MAX3930 (continued)
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
AC ELECTRICAL CHARACTERISTICS—MAX3930/MAX3932
(VCC - VEE = 4.75V to 5.5V, VTT = VCC, TA = -40°C to +85°C. Typical values are at VCC - VEE = 5V, IMOD = 70mA, and TA = +25°C,
unless otherwise noted.) (Note 3)
PARAMETER
Input Data Rates
SYMBOL
CONDITIONS
Modulation Current Setting Range
Modulation Current Setting Error
Modulation Sensing Resistor
20Ω load, TA = +25°C
RMOD
Setup/Hold Time
TYP
10.7
UNITS
Gbps
20
100
mA
-5
+5
%
3.3
Ω
+480
ppm/°C
3
-480
MODSET ≤ (VEE + 0.4V)
Modulation Off-Current
Output Current Fall Time
MAX
2.7
Modulation Current Temperature
Stability
Output Current Rise Time
MIN
NRZ
tR
ZL = 20Ω, 20% to 80% (Note 4)
tF
ZL = 20Ω, 20% to 80% (Note 4)
tSU, tHD
0.1
mA
25
35
ps
29
36
Figure 2
25
Pulse-Width Adjustment Range
(Note 4)
±25
±55
Pulse-Width Stability
PWC+ and PWC- open (Note 4)
VEE +
0
VEE+
1
Pulse-Width Control Input Range
For PWC+ and PWC
Overshoot
(Note 4)
Driver Random Jitter
Driver Deterministic Jitter
(Note 5)
Input Return Loss
ps
ps
ps
±13
ps
VEE+
2
V
13
%
0.75
1
psRMS
6.7
21
psP-P
12
dB
AC ELECTRICAL CHARACTERISTICS—MAX3931
(VCC - VEE = 4.75V to 5.5V, VTT = VCC, TA = -40°C to +85°C. Typical values are at VCC - VEE = 5V, IMOD = 70mA, and TA = +25°C,
unless otherwise noted.) (Note 3)
PARAMETER
SYMBOL
Input Data Rates
CONDITIONS
Modulation Current Setting
Range
Modulation Current Setting Error
Modulation Sensing Resistor
20Ω load, TA = +25°C
RMOD
Output Series Resistance
RMOD1 in parallel with RMOD2
Modulation Current Temperature
Stability
TYP
mA
-5
+5
%
2.7
3
3.3
Ω
12.75
15
17.25
Ω
+480
ppm/°C
0.1
mA
25
Pulse-Width Adjustment Range
(Note 4)
±25
Pulse-Width Stability
PWC+ and PWC- open (Note 4)
Pulse-Width Control Input Range
For PWC+ and PWC-
VEE +
0
ps
±55
VEE +
1
12
Note 1: Guaranteed by design and characterization.
Note 2: PSRR = 20 x log (∆VCC/(∆ IMOD ✕ 20Ω)). IMOD = 100mA
Note 3: Guaranteed by design and characterization using the circuit shown in Figure 1.
Note 4: Measured using a 10.7Gbps repeating 0000 0000 1111 1111 pattern.
Note 5: Measured using a 10.7Gbps 213 - 1 PRBS with eighty 0s pattern.
4
Gbps
100
Figure 2
Input Return Loss
UNITS
20
MODSET ≤ (VEE + 0.4V)
tSU, tHD
MAX
10.7
-480
Modulation Off-Current
Setup/Hold Time
MIN
NRZ
_______________________________________________________________________________________
ps
13
ps
VEE +
2
V
dB
10.7Gbps Laser Diode Drivers
MAX3930/MAX3932
SUPPLY CURRENT vs. TEMPERATURE
(EXCLUDES BIAS AND MODULATION CURRENTS)
113
MAX3930 toc02
MAX3930 toc01
ELECTRICAL EYE DIAGRAM
(IMOD = 20mA, 213 - 1 + 80 CID)
MAX3930 toc03
ELECTRICAL EYE DIAGRAM
(IMOD = 100mA, 213 - 1 + 80 CID)
112
SUPPLY CURRENT (mA)
111
110
109
108
107
106
105
104
103
14ps/div
PERCENT OF UNITS (%)
60
85
1.2
1.0
0.8
0.6
IMOD = 100mA
6
4
MAX3930 toc06
8
1.4
0.4
35
TYPICAL DISTRIBUTION OF FALL TIME
8
PERCENT OF UNITS (%)
IMOD = 20mA
10
10
MAX3930 toc05
1.8
PULSE-WIDTH DISTORTION (ps)
TYPICAL DISTRIBUTION OF RISE TIME
10
MAX3930 toc04
2.0
-15
TEMPERATURE (°C)
PULSE-WIDTH DISTORTION
vs. TEMPERATURE
1.6
-40
14ps/div
2
6
4
2
0.2
0
0
35
60
25
26
27
28
29
67
77
100
87
90
97
80
107
70
117
60
127
50
137
40
147
30
157
0 200 400 600 800 1000 1200 1400 1600 1800 2000
PULSE-WIDTH OF NEGATIVE PULSE (ps)
MAX3930 toc07
PULSE-WIDTH OF POSITIVE PULSE (ps)
RPWC+ (Ω)
2000 1800 1600 1400 1200 1000 800 600 400 200 0
130
57
RPWC- (Ω)
24
30
25
26
27
28
29
30
31
32
33
FALL TIME (ps)
OC-192 OPTICAL EYE DIAGRAM
(IMOD = 70mAP-P,
IBIAS = 15mA, PAVG = -2dBm)
PULSE WIDTH vs. RPWC
110
23
RISE TIME (ps)
TEMPERATURE (°C)
120
0
22
85
IMOD vs. VMOD
100
MAX3930 toc09
10
90
80
70
IMOD (mA)
-15
MAX3930 toc08
-40
60
50
40
30
20
10
0
OPTICAL EYE DIAGRAM COURTESY
OF NETWORK ELEMENTS, INC.
COPYRIGHT©2000 BY NETWORK
ELEMENTS, INC. ALL RIGHTS RESERVED.
0
0.1
0.2
0.3
VMOD (V)
_______________________________________________________________________________________
5
MAX3930/MAX3931/MAX3932
Typical Operating Characteristics
(VCC = 5V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VCC = 5V, TA = +25°C, unless otherwise noted.)
MAX3930/MAX3932
DIFFERENTIAL S11 vs. FREQUENCY
IBIAS vs. VBIAS
-5
-10
MAGNITUDE S11 (dB)
80
70
60
50
40
30
MAX3930 toc07
90
-15
-20
-25
-30
-35
-40
20
10
-45
0
-50
0
0.1
0.2
VBIAS (V)
6
0
MAX3930 toc10
100
IBIAS (mA)
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
0.3
0
5
10
15
20
FREQUENCY (GHz)
_______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
PAD
NAME
FUNCTION
MAX3930
MAX3931/
MAX3932
1, 5, 9, 12,
22, 23, 28,
29
1, 3, 5, 7,
9, 10, 12,
22, 23, 28,
29
VCC
2
2
DATA+
3
—
VTT
4
4
DATA-
6
6
CLK+
7
—
VTT
8
8
CLK-
Inverting Clock Input for Data Retiming. CML with on-chip termination resistor.
10, 11, 17,
18, 21, 32,
35, 36, 37
11, 17, 18,
19, 32, 35,
36, 37
VEE
Power-Supply Voltage (VCC - VEE = 5V)
13
13
RTEN
TTL/CMOS Data Retiming Input. Low for latched data, high for direct data. Internal
100kΩ pullup to VCC.
14
14
PWC+
Positive Input for Modulation Pulse-Width Adjustment. Connected to ground through
RPWC.
15
15
PWC-
Negative Input for Modulation Pulse-Width Adjustment. Connected to ground
through RPWC.
16
16
MODEN
TTL/CMOS Modulation Enable Input. Low for normal operation, high to switch
modulation output off. Internal 100kΩ pullup to VCC.
19
20
MODMON
Modulation Current Monitor (VMODMON - VEE) / RMOD = IMOD
20
21
MODSET
Modulation Current Set. Connected to the output of the external operational
amplifier (see the Design Procedure section).
24, 27
24, 27
MODN2,
MODN1
Complementary Laser Modulation Current Outputs. Connect to VCC.
25, 26
25, 26
MOD2,
MOD1
30
30
BIAS
Laser Bias Current Output
31
31
N.C.
No Connection. Leave unconnected.
33
33
BIASSET
Bias Current Set. Connected to the output of the external operational amplifier (see
the Design Procedure section).
34
34
BIASMON
Bias Current Monitor (VBIASMON - VEE) / RBIAS = IBIAS
Power-Supply Voltage (VCC - VEE = 5V). All pads must be connected to VCC.
Noninverting Data Input. CML with on-chip termination resistor.
Terminating Voltage for Data Inputs
Inverting Data Input. CML with on-chip termination resistor.
Noninverting Clock Input for Data Retiming. CML with on-chip termination resistor.
Terminating Voltage for Clock Inputs
Laser Modulation Current Outputs
_______________________________________________________________________________________
7
MAX3930/MAX3931/MAX3932
Pad Description
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
EQUIVALENT
CIRCUIT
DATA+
50Ω
DATA+
DATA-
50Ω
DATA-
VCC
CLK+
50Ω
CLK+
CLK-
50Ω
CLKRTEN
1.2V
20Ω
MODN1
OSCILLOSCOPE
IOUT
VTT
PATTERN
GENERATOR
+
-
MOD1
MAX3930/
MAX3932
50Ω
33Ω
MOD2
VOUT
50Ω
MODN2
-2V
VEE
MODEN
-5V
-5V
-5V
Figure 1. Test Circuit
CLK+
VIS = 0.15V - 1.0V
CLK-
tSU
tHD
DATAVIS = 0.15V - 1.0V
DATA+
(DATA+) - (DATA-)
VID = 0.3V - 2.0V
20mA - 100mA
IOUT
Figure 2. Required Input Signal, Setup/Hold Time Definition, and Output Polarity
8
_______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
The MAX3930 laser driver consists of two main parts, a
high-speed modulation driver and a laser-biasing
block. The circuit operates from a single 5V or -5.2V
supply. When operating from a 5V supply, connect all
VCC pins to 5V and all VEE pins to ground. If operating
from a -5.2V supply, connect all VEE pins to -5.2V and
all VCC pins to ground. To eliminate pattern-dependent
jitter on the input data signal, the device accepts a differential CML clock signal for data retiming. When
RTEN is tied to a low potential, the input data is synchronized by the clock signal. When RTEN is tied high
or left floating, the input data is transmitted directly to
the output stage (retiming is disabled).
The output stage is composed of a high-speed differential pair and a programmable modulation current
source with a maximum modulation current of 100mA.
The rise and fall times are typically 25ps and 29ps,
respectively.
The MAX3930/MAX3932 modulation output is optimized
for driving a 20Ω load. The minimum voltage required
at MOD is 1.55V. To interface with a laser diode, a
series damping resistor (RD) is required for impedance
matching (RD = 15Ω, assuming a laser resistance of
5Ω; see Typical Application Circuit).
The MAX3931 output has an internal series damping
resistor consisting of two parallel 30Ω resistors in series
with the output. This simplifies interfacing with the laser
diode. The MAX3931/MAX3932 have an alternate pad
out with respect to MAX3930.
At the 10.7Gbps data rate, any capacitive load at the
cathode of a laser diode will degrade the optical output
performance. Since the BIAS output is directly connected to the laser cathode, minimize the parasitic capacitance associated with this pad by using a ferrite bead
(LB) to isolate the BIAS pin from the laser cathode.
Optional Input Data Retiming
To eliminate pattern-dependent jitter on the input data,
a synchronous differential clock signal should be connected to the CLK+ and CLK- inputs, and the RTEN
control input should be tied low. The input data is
retimed on the rising edge of CLK+. If RTEN is tied high
or left floating, the retiming function is disabled, and the
input data is directly connected to the output stage.
Leave CLK+ and CLK- open when retiming is disabled.
Modulation Output Enable
The MAX3930/MAX3931/MAX3932 incorporate a modulation current enable input. When MODEN is low, the
modulation outputs (MOD1, MOD2) are enabled. When
MODEN is high, the modulation outputs (MOD1, MOD2)
are disabled. The typical laser enable time is 2ns, and
the typical disable time is 5ns.
Pulse-Width Control
The pulse-width control circuit can be used to precompensate for laser pulse-width distortion. The differential
voltage between PWC+ and PWC- adjusts the pulsewidth compensation.
When PWC+ and PWC- are left open, the pulse-width
control circuit is automatically disabled.
Current Monitors
The MAX3930/MAX3931/MAX3932 feature a bias current monitor output (BIASMON) and a modulation current monitor output (MODMON). The voltage at
BIASMON is equal to (IBIAS ✕ RBIAS) + VEE, and the
voltage at MODMON is equal to (IMOD ✕ RMOD) + VEE,
where IBIAS represents the laser bias current, IMOD
represents the modulation current, and R BIAS and
RMOD are internal 3Ω (±10%) resistors. BIASMON and
MODMON should be connected to the inverting input of
an operational amplifier to program the bias and modulation current (see Design Procedure).
Design Procedure
When designing a laser transmitter, the optical output is
usually expressed in terms of average power and
extinction ratio. Table 1 gives relationships that are
helpful in converting between the optical average
power and the modulation current. These relationships
are valid if the mark density and duty cycle of the optical waveform are 50%.
Programming the Modulation Current
For a desired laser average optical power, PAVG, and
optical extinction ratio, re, the required modulation current can be calculated based on the laser slope efficiency, η, using the equations in Table 1.
To program the desired modulation current, connect
the inverting input of an operational amplifier (such as
the MAX480) to MODMON and connect the output to
MODSET. Connect the positive op amp voltage supply
to VCC and the negative supply to VEE (for 5V operation, VCC = 5V and VEE = ground; for -5.2V operation,
VCC = ground and VEE = -5.2V). The modulation current is set by connecting a reference voltage, VMOD, to
the noninverting input of the operational amplifier. Refer
to the IMOD vs. VMOD graph in the Typical Operating
Characteristics to select the value of VMOD that corresponds to the required modulation current.
_______________________________________________________________________________________
9
MAX3930/MAX3931/MAX3932
Detailed Description
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
Table 1. Optical Power Relations
PARAMETER
SYMBOL
Average Power
PAVG
RELATION
PAVG = (P0 + P1) / 2
Extinction Ratio
re
re = P1 / P0
Optical Power of a “1”
P1
P1 = 2PAVG re / (re + 1)
Optical Power of a “0”
P0
P0 = 2PAVG / (re + 1)
Optical Amplitude
PP-P
Laser Slope Efficiency
Modulation Current
PP-P = P1 - P0 =
2PAVG(re - 1) / (re + 1)
η
η = PP-P / IMOD
IMOD
IMOD = PP-P / η
Note: Assuming a 50% average input duty cycle and mark
density.
To minimize optical output aberrations caused by signal reflections at the electrical interface to the laser
diode, a series damping resistor (R D ) is required
(Figure 4). The MAX3930/MAX3932 modulation outputs
are optimized for a 20Ω load; therefore, the series combination of RD and RL (where RL represents the laser
diode resistance) should equal 20Ω. Typical values for
RD are 13Ω to 17Ω. The MAX3931 includes an on-chip
series damping resistor RD at 15Ω (Figure 5).
For best performance, a bypass capacitor (C), typically
0.01µF, should be placed as close as possible to the
anode of the laser diode.
In some applications (depending on the laser diode
parasitic inductance), an RF matching network at the
laser cathode will improve the optical output.
Applications Information
OPTICAL
POWER
Wire Bonding Die
For high current density and reliable operation, the
MAX3930/MAX3931/MAX3932 use gold metalization.
Make connections to the die with gold wire only, using
ball-bonding techniques. Do not use wedge bonding.
Die-pad size is 3.0mil (76µm) and 4.5mil (114µm). Die
thickness is 8mil (203µm). Die size is 46mil x 82mil
(1.168mm x 2.083mm).
P1
PAVG
Layout Considerations
P0
TIME
Figure 3. Optical Power Relations
Programming the Bias Current
To program the desired laser bias current, connect the
inverting input of an operational amplifier (such as the
MAX480) to BIASMON, and connect the output to
BIASSET. Connect the positive op amp voltage supply
to VCC and the negative supply to VEE (for 5V operation, VCC = 5V and VEE = ground; and for -5.2V operation, VCC = ground and VEE = -5.2V). The laser bias
current is set by connecting a reference voltage, VBIAS,
to the noninverting input of the operational amplifier.
Refer to the I BIAS vs. V BIAS graph in the Typical
Operating Characteristics to select the value of VBIAS
that corresponds to the required laser bias current.
Interfacing with Laser Diodes
To minimize inductance, keep the connections between
the driver output and the laser diode as short as possible. Optimize the laser diode performance by placing a
bypass capacitor as close as possible to the laser
anode. Use good high-frequency layout techniques
and multilayer boards with an uninterrupted ground
plane to minimize EMI and crosstalk. Use controlled
impedance lines for the clock and data inputs.
Laser Safety and IEC 825
Using the MAX3930/MAX3931/MAX3932 laser driver
alone does not ensure that a transmitter design is compliant with IEC 825. The entire transmitter circuit and
component selections must be considered. Customers
must determine the level of fault tolerance required by
their application, recognizing that Maxim products are
not designed or authorized for use as components in
systems intended for surgical implant into the body, for
applications intended to support or sustain life, or for
any other application where the failure of a Maxim product could create a situation where personal injury or
death may occur.
Refer to Maxim Application Note HFAN-2.0, Interfacing
Maxim Laser Drivers with Laser Diodes, for detailed
information.
10
______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
MAX3930/MAX3931/MAX3932
VCC
VTT*
RTEN
MODEN
MODN1
MODN2
5V
MAX3930/MAX3932
50Ω
40Ω
50Ω
40Ω
0.01µF
CLK+
CLK-
RD = 15Ω
MOD1
D
Q
20Ω
0
M
U
X
DATA+
DATA-
IOUT
MOD2
PWC
1
LB
50Ω
50Ω
VTT*
IMOD
VCC
IBIAS
VCC
RMOD
5kΩ
RBIAS
5kΩ
RPWC
MODSET
2kΩ
MODMON BIASSET
VEE
BIASMON
VEE
VEE
*VTT IS INTERNALLY CONNECTED TO VCC FOR MAX3932
Figure 4. MAX3930/MAX3932 Functional Diagram
______________________________________________________________________________________
11
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
VCC
VCC
RTEN
MODEN
MODN1
MODN2
5V
MAX3931
50Ω
40Ω
50Ω
40Ω
0.01µF
CLK+
CLK-
RMOD1
30Ω
D
Q
0
M
U
X
DATA+
DATA-
MOD1
RMOD2
30Ω
PWC
IOUT
MOD2
1
LB
50Ω
50Ω
VCC
IMOD
VCC
IBIAS
VCC
RMOD
5kΩ
RBIAS
5kΩ
RPWC
MODSET
2kΩ
MODMON BIASSET
VEE
BIASMON
VEE
VEE
Figure 5. MAX3931 Functional Diagram
12
______________________________________________________________________________________
10.7Gbps Laser Diode Drivers
MAX3930/MAX3931/MAX3932
VCC
MODN1
VTT
MODN2
MOD1
MOD2
40Ω
40Ω
50Ω
50Ω
DATA+
DATA-
VEE
VEE
Figure 6. MAX3930 Equivalent Input Circuit
Figure 7. MAX3930/MAX3932 Equivalent Output Circuit
VCC
MODN1
MODN2
MOD2
MOD1
40Ω
50Ω
30Ω
30Ω
40Ω
50Ω
DATA+
DATA-
VEE
VEE
Figure 8. MAX3931/MAX3932 Equivalent Input Circuit
Figure 9. MAX3931 Equivalent Output Circuit
______________________________________________________________________________________
13
MAX3930/MAX3931/MAX3932
10.7Gbps Laser Diode Drivers
Chip Topography
MAX3930
MAX3931/MAX3932
BIASMON
VEE VEE VEE BIASSET N.C.
VEE
37 36 35 34 33 32
VCC
DATA+
CLK+
VTT
CLKVCC
VEE
VEE
VCC
RTEN
PWC+
37 36 35 34 33 32
31
1
2
VCC
30
3
29
VTT
4
DATAVCC
BIASMON
VEE VEE VEE BIASSET N.C.
VEE
28
5
8
VCC
VCC
VCC
MOD1
25
MOD2
10
24
11
MODN2
23
12
VCC
13
22
14
VCC
CLK+
VCC
CLKVCC
VCC
VEE
VCC
RTEN
PWC+
15 16 17 18 19 20 21
PWC-
BIAS
28
5
VCC
VCC
27
6
MODN1
26
7
8
MOD1
82mil
9
25
MOD2
10
24
11
MODN2
23
12
VCC
13
22
14
VCC
15 16 17 18 19 20 21
VEE VEE
MODEN
29
VCC
4
DATA-
82mil
9
30
DATA+
MODN1
26
7
2
3
BIAS
27
6
31
1
VEE
MODSET
MODMON
46mil
VEE VEE VEE
MODMON
MODEN
MODSET
PWC-
46mil
Chip Information
TRANSISTOR COUNT: 1555
SUBSTRATE: SOI
PROCESS: BiPOLAR SILICON GERMANIUM
DIE THICKNESS: 8mil
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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