Order this document by MC44602/D The MC44602 is an enhanced high performance fixed frequency current mode controller that is specifically designed for off–line and high voltage dc–to–dc converter applications. This device has the unique ability of changing operating modes if the converter output is overloaded or shorted, offering the designer additional protection for increased system reliability. The MC44602 has several distinguishing features when compared to conventional current mode controllers. These features consist of a foldback amplifier for overload detection, valid load and demag comparators with a fault latch for short circuit detection, thermal shutdown, and separate high current source and sink outputs that are ideally suited for driving a high voltage bipolar power transistor, such as the MJE18002, MJE18004, or MJE18006. Standard features include an oscillator with a sync input, a temperature compensated reference, high gain error amplifier, and a current sensing comparator. Protective features consist of input and reference undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting, a latch for single pulse metering, and a flip–flop which blanks the output off every other oscillator cycle, allowing output deadtimes to be programmed from 50% to 70%. This device is manufactured in a 16 pin dual–in–line heat tab package for improved thermal conduction. • Separate High Current Source and Sink Outputs Ideally Suited for Driving Bipolar Power Transistors: 1.0 A Source, 1.5 A Sink • Unique Overload and Short Circuit Protection • • • • • • • • HIGH PERFORMANCE CURRENT MODE CONTROLLER SEMICONDUCTOR TECHNICAL DATA 16 1 P2 SUFFIX PLASTIC PACKAGE CASE 648C DIP (12 + 2 + 2) Thermal Protection Oscillator with Sync Input Current Mode Operation to 500 kHz Output Switching Frequency PIN CONNECTIONS Output Deadtime Adjustable from 50% to 70% Automatic Feed Forward Compensation Latching PWM for Cycle–By–Cycle Current Limiting Compensation 1 Input and Reference Undervoltage Lockouts with Hysteresis 16 Vref 15 VCC Load Detect Input 2 Low Startup and Operating Current Voltage Feedback Input 3 Simplified Block Diagram Vref 5.0V Reference 16 VCC Undervoltage Lockout Short Circuit Detection 7 15 Compensation 1 Error Amplifier 12 Sink Gnd VCC Current Sense Input 6 11 Source Output 10 Sink Output RT/CT 8 Load Detect Input 9 Gnd (Top View) VC Source Output Thermal 11 Sink Output 10 Sink Ground 4, 5, 12, 13 Voltage Feedback–Input 3 5 2 14 Flip Flop and Latching PWM 8 13 Sync Input 7 Sync Input Oscillator 4 Sink Gnd Vref Undervoltage Lockout RT/CT 14 VC Foldback Amplifier Current Sense Input 6 Gnd 9 ORDERING INFORMATION Device Operating Temperature Range Package MC44602 TA = – 25 to 85°C DIP (12 + 2 + 2) Motorola, Inc. 1996 MOTOROLA ANALOG IC DEVICE DATA Rev 0 1 MC44602 MAXIMUM RATINGS Symbol Value Unit Total Power Supply and Zener Current Rating (ICC + IZ) 30 mA Sink Ground Voltage with Respect to Gnd (Pin 9) VSink(neg) –5.0 V VC 20 V IO(Source) IO(Sink) 1.0 1.5 Output Energy (Capacitive Load per Cycle) W 5.0 µJ Current Sense and Voltage Feedback Inputs Vin –0.3 to 5.5 V Sync Input High State Voltage Low State Reverse Current VIH IIL 5.5 –20 V mA Iin –20 to +10 mA IEA (Sink) 10 mA PD RθJA RθJC 2.5 80 15 W °C/W °C/W Operating Junction Temperature TJ 150 °C Operating Ambient Temperature TA –25 to +85 °C Output Supply Voltage with Respect to Sink Gnd (Pins 4, 5, 12, 13) Output Current (Note 1) Source Sink A Load Detect Input Current Error Amplifier Output Sink Current Power Dissipation and Thermal Characteristics Maximum Power Dissipation at TA = 25°C Thermal Resistance, Junction–to–Air Thermal Resistance, Junction–to–Case NOTE: 1. Maximum package power dissipation limits must be observed. ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 2], RT = 10k, CT = 1.0 nF, for typical values TA = 25°C, for min/max values TA = –25°C to +85°C [Note 3] unless otherwise noted.) Characteristic Symbol Min Typ Max VFB IIB AVOL Unit 2.45 2.5 2.65 V – –0.6 –2.0 µA 65 90 – dB 1.0 0.8 1.4 – 1.8 2.0 65 70 – ERROR AMPLIFIER SECTION Voltage Feedback Input (VO = 2.5V) Input Bias Current (VFB = 2.5 V) Open Loop Voltage Gain (VO = 2.0 V to 4.0 V) Unity Gain Bandwidth TJ = 25°C TA = –25 to +85°C Power Supply Rejection Ratio (VCC = 10 V to 16 V) Output Current Sink (VO = 1.5 V, VFB = 2.7 V) Sink TJ = 25°C Sink TA = –25 to +85°C Source (VO = 5.0 V, VFB = 2.3 V) Source TJ = 25°C Source TA = –25 to +85°C Output Voltage Swing High State (IO(Source) = 0.5 mA, VFB = 2.3 V) Low State (IO(Sink) = 0.33 mA, VFB = 2.7 V) BW PSRR MHz dB mA ISink – 1.5 5.0 – – 10 – –2.0 –1.1 – – –0.2 6.0 – 7.0 1.0 – 1.1 ISource V VOH VOL NOTES: 2. Adjust VCC above the startup threshold before setting to 12V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 2 MOTOROLA ANALOG IC DEVICE DATA MC44602 ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 2], RT = 10k, CT = 1.0 nF, for typical values TA = 25°C, for min/max values TA = –25°C to +85°C [Note 3] unless otherwise noted.) Characteristic Symbol Min Typ Max 168 160 180 – 192 200 Unit OSCILLATOR SECTION Frequency TJ = 25°C TA = –25°C to +85°C fOSC kHz Frequency Change with Voltage (VCC = 12 V to 18 V) ∆fOSC/∆V – 0.1 0.2 %/V Frequency Change with Temperature ∆fOSC/∆T – 0.05 – %/°C Oscillator Voltage Swing (Peak–to–Peak) VOSC(pp) 1.3 1.6 – V 6.5 6.0 10 – 13.5 14 2.5 1.0 2.8 1.3 3.2 1.7 6.5 6.0 10 – 13.5 18 Vref 4.7 5.0 5.3 V Line Regulation (VCC = 12 V to 18 V) Regline – 1.0 10 mV Load Regulation (IO = 1.0 mA to 20 mA) Regload – 3.0 15 mV Discharge Current (VOSC = 3.0 V) TJ = 25°C TA = –25°C to +85°C Sync Input Threshold Voltage High State Low State Sync Input Resistance TJ = 25°C TA = –25°C to +85°C Idischg mA V VIH VIL Rin kΩ REFERENCE SECTION Reference Output Voltage (IO = 1.0 mA) Temperature Stability TS – 0.2 – mV/°C Total Output Variation over Line, Load and Temperature Vref 4.65 – 5.35 V Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = 25°C) Vn – 50 – µV Long Term Stability (TA = 125°C for 1000 Hours) S – 5.0 – mV – –70 –130 – – –180 2.85 2.7 3.0 – 3.15 3.2 Output Short Circuit Current TJ = 25°C TA = –25°C to +85°C ISC mA CURRENT SENSE SECTION Current Sense Input Voltage Gain (Notes 4 & 5) TJ = 25°C TA = –25°C to +85°C AV Maximum Current Sense Input Threshold (Note 4) Vth 0.9 1.0 1.1 V Input Bias Current IIB – –4.0 –10 µA tPLH(in/out) – 100 150 ns Vth 13 14.1 15 V VCC(min) 9.0 10.2 11 V Vref(UVLO) 3.0 3.35 3.7 V Propagation Delay (Current Sense Input to Sink Output) V/V UNDERVOLTAGE LOCKOUT SECTIONS Startup Threshold (VCC Increasing) Minimum Operating Voltage After Turn–On (VCC Decreasing) Reference Undervoltage Threshold (Vref Decreasing) NOTES: 2. Adjust VCC above the startup threshold before setting to 12V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 4. This parameter is measured at the latch trip point with IFB = –5.0 µA, refer to Figure 9. ∆V Compensation 5. Comparator gain is defined as AV = ∆V Current Sense Input MOTOROLA ANALOG IC DEVICE DATA 3 MC44602 ELECTRICAL CHARACTERISTICS (VCC and VC = 12 V [Note 2], RT = 10k, CT = 1.0 nF, for typical values TA = 25°C, for min/max values TA = –25°C to +85°C [Note 3] unless otherwise noted.) Characteristic Symbol Min Typ Max VOL – – – 0.6 1.8 2.1 0.3 2.0 2.6 (VCC–VOH) – – – 1.4 1.7 1.8 1.7 2.0 2.2 Unit OUTPUT SECTION Output Voltage (TA = 25°C) Low State (ISink = 100 mA) Low State (ISink = 1.0A) Low State (ISink = 1.5 A) V High State (ISource = 50 mA) High State (ISource = 0.5 A) High State (ISource = 0.75 A) Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mA) VOL(UVLO) – 0.1 1.1 V Output Voltage Rise Time (CL = 1.0 nF, TJ = 25°C) tr – 50 150 ns Output Voltage Fall Time (CL = 1.0 nF, TJ = 25°C) tf – 50 150 ns DC(max) DC(min) 46 – 48 – 50 0 – 0.2 0.5 – 10 17 – 20 22 20 23 PWM SECTION Duty Cycle Maximum Minimum % TOTAL DEVICE Power Supply Current Startup (VCC = 5 V) Operating (Note 2) TJ = 25° C TA = –25°C to +85° C ICC mA Power Supply Zener Voltage (ICC = 25 mA) VZ 18 ∆VFB (VFB–100) Vth(VL) Vth(Demag) tPLH(in/out) Rin 2.0 50 – 12 V OVERLOAD AND SHORT CIRCUIT PROTECTION Foldback Amplifier Threshold (Figures 9,10) Load Detect Input Valid Load Comparator Threshold (VPin 2 Increasing) Demag Comparator Threshold (VPin 2 Decreasing) Propagation Delay (Input to Sink or Source Output) Input Resistance (VFB–200) (VFB–300) 2.5 88 1.1 18 mV V mV µS kΩ 3.0 120 1.6 30 NOTES: 2. Adjust VCC above the startup threshold before setting to 12V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Figure 1. Timing Resistor versus Oscillator Frequency Figure 2. Output Deadtime versus Oscillator Frequency 75 80 CT=500 pF 30 20 CT=100 pF % DT, PERCENT OUTPUT DEADTIME R T, TIMING RESISTOR (k Ω) 50 CT=200 pF CT=5.0 nF CT=2.0 nF 10 8.0 5.0 CT=1.0 nF CT=10 nF 3.0 VCC = 12 V TA = 25°C Note: Output switches at 1.0 one–half the oscillator frequency. 0.8 10 k 20 k 50 k 100 k 2.0 200 k fOSC, OSCILLATOR FREQUENCY (Hz) 4 500 k 1.0 M ÄÄÄÄ ÄÄÄÄ ÄÄÄÄ ÄÄ ÄÄ ÄÄÄÄ Ä Ä ÄÄ ÄÄ Ä Ä Ä ÄÄ Ä 1. 2. 3. 70 4. 5. 6. 65 CT = 10 nF CT = 5.0 nF CT = 2.0 nF CT = 1.0 nF CT = 500 pF CT = 100 pF Note: Output switches at one–half the oscillator frequency. 5 4 3 60 6 2 1 55 VCC = 12 V TA = 25°C 50 10 k 20 k 50 k 100 k 200 k 500 k 1.0 M fOSC, OSCILLATOR FREQUENCY (Hz) MOTOROLA ANALOG IC DEVICE DATA MC44602 Figure 3. Oscillator Discharge Current versus Temperature Figure 4. Oscillator Voltage Swing versus Temperature 5.0 V OSC , OSCILLATOR VOLTAGE SWING (V) I dischg , DISCHARGE CURRENT (mA) 12 VCC = 12 V VOSC = 3.0 V 11 4.0 Peak Voltage 3.0 10 9.0 2.0 8.0 7.0 –55 VCC = 12 V RT = 10 k CT = 1.0 nF 1.0 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 Valley Voltage 0 –55 125 Figure 5. Error Amp Small Signal Transient Response 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 2.45 V 200 mV/DIV 2.5 V 2.0 V t, TIME (0.5 µs/DIV) t, TIME (1.0 µs/DIV) Figure 7. Error Amp Open Loop Gain and Phase versus Frequency 80 Gain 60 30 60 Phase 40 90 20 120 0 150 1.0 k 10 k 100 k f, FREQUENCY (Hz) MOTOROLA ANALOG IC DEVICE DATA 1.0 M 1.2 0 180 10 M Vth, CURRENT SENSE INPUT THRESHOLD (V) VCC = 12 V VO = 2.0 V to 4.0 V RL = 100 k TA = 25°C Figure 8. Current Sense Input Threshold versus Error Amp Output Voltage EXCESS PHASSE (DEGREES) 100 A VOL , OPEN LOOP VOLTAGE GAIN (dB) 125 VCC = 12 V AV = –1.0 TA = 25°C 3.0 V 20 mV/DIV 2.5 V –20 0.1 k 100 Figure 6. Error Amp Large Signal Transient Response VCC = 12 V AV = –1.0 TA = 25°C 2.55 V –25 1.0 TA = 125°C 0.8 TA = –40°C 0.6 TA = 25°C 0.4 0.2 VCC = 12 V 0 0 1.0 2.0 4.0 3.0 5.0 VO, ERROR AMP OUTPUT VOLTAGE (V) 6.0 7.0 5 MC44602 Figure 9. Voltage Feedback Input, Voltage versus Current Figure 10. Voltage Feedback Input versus Current Sense Clamp Level 2.6 2.6 VCC = 12 V 2.2 2.2 VCC = 12 V TA = 25°C V in , INPUT VOLTAGE (V) V in , INPUT VOLTAGE (V) VClamp = 1.0 V VClamp = 0.7 V TA = 125°C 1.8 1.8 VClamp = 0.5 V VClamp = 0.3 V 1.4 TA = 25°C TA = –55°C 1.4 VClamp = 0.1 V –400 –300 –200 Iin, INPUT CURRENT (µA) –100 1.0 0 0 0.2 0.4 0.6 0.8 VClamp, CURRENT SENSE CLAMP LEVEL (V) Figure 11. Reference Short Circuit Current versus Temperature 200 VCC = 12 V RL ≤ 0.1 Ω 160 120 3.0 2.0 1.0 Line Regulation VCC = 12 V to 18 V Iref = 0 mA 0 –1.0 –2.0 –3.0 80 –4.0 –25 0 25 50 75 100 –5.0 –55 125 –25 0 TA = 25°C –15 TA = 125°C –20 –25 VCC = 12 V 0 25 50 75 100 125 30 60 90 120 150 Iref, REFERENCE SOURCE CURRENT (mA) Figure 14. Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length 100 TA = –55°C –5.0 –30 R θ JA , THERMAL RESISTANCE JUNCTION TO AIR (° C/W) ∆V ref , REFERENCE VOLTAGE CHANGE (mV) Figure 13. Reference Voltage Change versus Source Current –10 0 TA, AMBIENT TEMPERATURE (°C) 180 5.0 ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ Printed circuit board heatsink example 80 L RθJA 60 4.0 2.0 oz Copper L 3.0 mm Graphs represent symmetrical layout 3.0 40 2.0 PD(max) for TA = 70°C 20 0 0 10 20 1.0 30 40 50 P D , MAXIMUM POWER DISSIPATION (W) 40 –55 Load Regulation VCC = 12 V Iref = 1.0 mA to 20 mA TA, AMBIENT TEMPERATURE (°C) 6 1.0 Figure 12. Reference Line and Load Regulation versus Temperature ∆V ref , REFERENCE VOLTAGE CHANGE (mA) I SC , REFERENCE SHORT CIRCUIT CURRENT (mA) 1.0 –500 0 L, LENGTH OF COPPER (mm) MOTOROLA ANALOG IC DEVICE DATA MC44602 Voltage 90% VCC = 12 V CL = 2.0 nF TA = 25°C 1.0 A Figure 16. Output Cross Conduction V O , OUTPUT VOLTAGE Figure 15. Output Waveform VCC = 12 V CL = 15 pF –90% TA = 25°C Current t, TIME (100 ns/DIV) 20 mA/DIV –1.0 A 10% I CC, SUPPLY CURRENT –10% 0 t, TIME (50 ns/DIV) Figure 18. Source Output Saturation Voltage versus Load Current Vsat, SINK OUTPUT SATURATION VOLTAGE (V) 3.0 TJ = –55°C Sink Saturation (Load to VCC) 2.5 0 –1.0 TJ = 25°C 1.5 TJ = 125°C –1.5 TJ = 125°C 1.0 Gnd 0 250 –2.0 VCC = 12 V 80 µs Pulsed Load 120 Hz Rate 0.5 500 750 1000 1250 Isink, SINK OUTPUT CURRENT (mA) 1500 1750 TJ = –55°C –2.5 –3.0 0 900 ICC = 25 mA V CC , ZENER VOLTAGE (V) I CC , SUPPLY CURRENT (mA) 300 450 600 750 Isource, OUTPUT SOURCE CURRENT (mA) 23 RT = 10 k CT = 1.0 nF VFB = 0 V Current Sense = 0 V 24 TA = 25°C 16 8.0 4.0 150 Figure 20. Power Supply Zener Voltage versus Temperature 32 0 TJ = 25°C Source Saturation (Load to Ground) Figure 19. Supply Current versus Supply Voltage 0 VCC = 12 V 80 µs Pulsed Load 120 Hz Rate VCC –0.5 2.0 0 Vsat, SINK OUTPUT SATURATION VOLTAGE (V) Figure 17. Sink Output Saturation Voltage versus Sink Current 8.0 12 16 VCC, SUPPLY VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 20 24 22 21 20 19 –55 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 7 3.2 VCC = 12 V 2.8 2.4 2.0 –55 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 120 VCC = 12 V 100 80 60 –55 Figure 23. Load Detect Input Propagation Delay versus Temperature VCC = 12 V RT = 10 k CT = 1.0 nF 1.2 1.0 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 25 50 75 100 125 10.25 10.15 10.05 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 VCC Increasing 14.3 14.1 13.9 13.7 –55 125 VCC Decreasing 9.95 –55 0 14.5 Vth, STARTUP THRESHOLD VOLTAGE (V) 1.4 0.8 –55 –25 Figure 24. Startup Threshold Voltage versus Temperature 10.35 V CC(min), MINIMUM OPERATING VOLTAGE (V) Figure 22. Demag Comparator Threshold versus Temperature TA, AMBIENT TEMPERATURE (°C) Figure 25. Minimum Operating Voltage After Turn–On versus Temperature 8 V th(Demag), DEMAG COMPARATOR THRESHOLD (mV) Figure 21. Valid Load Comparator Threshold versus Temperature V ref(UVLO), REFERENCE UNDERVOLTAGE THRESHOLD (V) t PLH(IN/OUT) , LOAD DETECT PROPAGATION DELAY ( µ s) V th(VL) , VALID LOAD COMPARATOR THRESHOLD (V) MC44602 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 Figure 26. Reference Undervoltage Threshold versus Temperature 3.42 Vref Decreasing 3.38 3.34 3.30 –55 –25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) 100 125 MOTOROLA ANALOG IC DEVICE DATA MC44602 Figure 27. Representative Block Diagram VCC VCC + Vref R Internal Bias R 2.5V 14V VCC UVLO Reference UVLO 16 15 20V Reference Regulator Vin 3.6V Demag Comparator + 85mV Valid Load Comparator Sync Input 7 10k 2.5V 14 S Fault Latch RT Source Output 11 Oscillator CT 8 + Compensation 1.0 mA Thermal 2R Foldback Amplifier 3 I R 10 Sink Ground Substrate 4, 5, 12, 13 Current Sense Input Current Sense Comparator 6 RS 1.0V 2.5V Gnd R1 S RQ R PWM Latch Q1 Sink Output TQ Error Amplifier 1 Voltage Feedback Input 2.5V Vout 2 VC 18k R Q Load Detect Input 9 R2 CO = Sink Only Positive True Logic Figure 28. Timing Diagram 2.8V Capacitor CT 1.2V 0V PWM Latch “Set” Input Toggle Flip Flop Q Output C Current Sense Input C VClamp* NC C NC NC NC C C NC PWM Latch “Set” Input Source Output Load Detect Input 2.5V 85mV 0V Demag Output Fault Latch Q Sync Input 2.5V 0V Startup With Foldback Startup Without Foldback *C = Comparison of Current Sense Input With VClamp MOTOROLA ANALOG IC DEVICE DATA Normal Operation Output Overload NC = No Comparison of Current Sense Input With VClamp 9 MC44602 OPERATING DESCRIPTION The MC44602 is a high performance, fixed frequency, current mode controller specifically designed to directly drive a bipolar power switch in off–line and high voltage dc–to–dc converter applications. This device offers the designer a cost effective solution with minimal external components. The representative block and timing diagrams are shown in Figures 27 and 28. Oscillator The oscillator frequency is programmed by the values selected for the timing components RT and CT. Capacitor CT is charged from the 5.0 V reference through resistor RT to approximately 2.8 V and discharged to 1.2 V by an internal current sink. During the discharge of CT, the oscillator generates an internal blanking pulse that holds one of the inputs of the NOR gate high. This causes the Source and Sink outputs to be in a low state, thus producing a controlled amount of output deadtime. An internal toggle flip–flop has been incorporated in the MC44602 which blanks the output off every other clock cycle by holding one of the inputs of the NOR gate high. This in combination with the CT discharge period yields output deadtimes programmable from 50% to 70%. Figure 1 shows RT versus Oscillator Frequency and Figure 2, Output Deadtime versus Frequency, both for a given value of CT. Note that many values of RT and CT will give the same oscillator frequency but only one combination will yield a specific output deadtime at a given frequency. In many noise sensitive applications it may be desirable to frequency–lock the converter to an external system clock. This can be accomplished by applying a narrow rectangular clock signal with an amplitude of 3.2 V to 5.5 V to the Sync Input (Pin 7). For reliable locking, the free–running oscillator frequency should be set about 10% less than the clock frequency. If the clock signal is ac coupled through a capacitor, an external clamp diode may be required if the negative sync input current is greater than –5.0 mA. Connecting Pin 7 to Vref will cause CT to discharge to 0 V, inhibiting the Oscillator and conduction of the Source Output. Multi–unit synchronization can be accomplished by connecting the CT pin of each IC to a single MC1455 timer. Error Amplifier A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical dc voltage gain of 90 dB, and a unity gain bandwith of 1.0 MHz with 57 degrees of phase margin (Figure 7). The noninverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current with the inverting input at 2.5 V is –2.0 µA. This can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amp Output (Pin 1) is provided for external loop compensation (Figure 29). The output voltage is offset by two diodes drops (≈1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This 10 guarantees that no drive pulses appear at the Source Output (Pin 11) when Pin 1 is at its lowest state (VOL). This occurs when the power supply is operating and the load is removed, or at the beginning of a soft–start interval. The Error Amp minimum feedback resistance is limited by the amplifier’s minimum source current (0.5 mA) and the required output voltage (VOH) to reach the comparator’s 1.0 V clamp level: Rf(min) V) ) 1.4 V [ 3.0 (1.00.5mA + 8800 W Figure 29. Error Amplifier Compensation + 1.0 mA Compensation RFB Error Amplifier 1 Rf 2R 3 2.5V Cf R Voltage Feedback Input I Foldback Amplifier 2.5V Current Sense Comparator 1.0V Gnd 9 From Power Supply Output R1 R2 Current Sense Comparator and PWM Latch The MC44602 operates as a current mode controller, where output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the Error Amplifier output (Pin 1). Thus the error signal controls the peak inductor current on a cycle–by–cycle basis. The Current Sense Comparator PWM Latch configuration used ensures that only a single pulse appears at the Source Output during the appropriate oscillator cycle. The inductor current is converted to a voltage by inserting the ground referenced sense resistor RS in series with the emitter of output switch Q1. This voltage is monitored by the Current Sense Input (Pin 6) and compared to a level derived from the Error Amp output. The peak inductor current under normal operating conditions is controlled by the voltage at Pin 1 where: lpk * 1.4V [ V (Pin1) 3 RS Abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. Under these conditions, the Current Sense Comparator threshold will be internally clamped to 1.0 V. Therefore the maximum peak switch current is: lpk(max) [ 1.0RSV MOTOROLA ANALOG IC DEVICE DATA MC44602 A narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. This spike is due to the power transformer interwinding capacitance and the output rectifier recovery time. The addition of an RC filter on the Current Sense Input with a time constant that approximates the spike duration will usually eliminate the instability; refer to Figure 30. Undervoltage Lockout Two undervoltage lockout comparators have been incorporated to guarantee that the IC is fully functional before the output stage is enabled. The positive power supply terminal (VCC) and the reference output (Vref) are each monitored by separate comparators. Each has built–in hysteresis to prevent erratic output behavior as their respective thresholds are crossed. The VCC comparator upper and lower thresholds are 14.1 V/10.2 V. The Vref comparator upper and lower thresholds are 3.6 V/3.3 V. The large hysteresis and low startup current of the MC44602 make it ideally suited for off–line converter applications (Figures 33, 34) where efficient bootstrap startup techniques are required. A 20 V zener is connected as a shunt regulator from VCC to ground. Its purpose is to protect the IC from excessive voltage that can occur during system startup. The upper limit for the minimum operating voltage of the MC44602 is 11V. Outputs The MC44602 contains a high current split totem pole output that was specifically designed for direct drive of Bipolar Power Transistors. By splitting the totem pole into separate source and sink outputs, the power supply designer has the ability to independently adjust the turn–on and turn–off base drive to the external power transistor for optimal switching. The Source and Sink outputs are capable of up to 1.0 A and 1.5 A respectively and feature 50 ns switching times with a 1.0 nF load. Additional internal circuitry has been added to keep the Source Output “Off” and the Sink Output “On” whenever an undervoltage lockout is active. This feature eliminates the need for an external pull–down resistor and guarantees that the power transistor will be held in the “Off” state. Separate output stage power and ground pins are provided to give the designer added flexibility in tailoring the base drive circuitry for a specific application. The Source Output high–state is controlled by applying a positive voltage to VC (Pin 14) and is independent of VCC. A zener clamp is typically connected to this input when driving power MOSFETs in systems where VCC is greater than 20V. The Sink Output low–state is controlled by applying a negative voltage to the Sink Ground (Pins 4, 5, 12, 13). The Sink Ground can be biased as much as 5.0 V negative with respect to Ground (Pin 7). Proper implementation of the VC and Sink Ground pins will significantly reduce the level of switching transient noise imposed on the control circuitry. MOTOROLA ANALOG IC DEVICE DATA This becomes particularly useful when reducing the Ipk(max) clamp level. Reference The 5.0 V bandgap reference has a tolerance of ±6.0% over a junction temperature range of –25°C to 85°C. Its primary purpose is to supply charging current to the oscillator timing capacitor. The reference has short circuit protection and is capable of providing in excess of 20 mA for powering additional control system circuitry. Figure 30. Bipolar Transistor Drive and Current Spike Suppression + Vin IB 0 VC Base Charge Removal – 14 CB Source RB1 11 TQ S RQ R PWM Latch Current Sense Comparator RB2 Q1 Sink LB 10 Sink Gnd Substrate 4, 5, 12, 13 Current Sense 6 R C RS Thermal Protection and Package Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 160°C, the PWM Latch is held in the “reset” state, forcing the Source Output “Off” and the Sink Output “On”. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a substitute for proper heatsinking. The MC44602 is contained in a heatsinkable 16–lead plastic dual–in–line package in which the die is mounted on a special heat tab copper alloy lead frame. This tab consists of the four center Sink Ground pins that are specifically designed to improve the thermal conduction from the die to the circuit board. Figure 14 shows a simple and effective method of utilizing the printed circuit medium as a heat dissipater by soldering these pins to an adequate area of copper foil. This permits the use of standard layout and mounting practices while having the ability to halve the junction to air thermal resistance. This example is for a symmetrical layout on a single–sided board with two ounce per square foot of copper. 11 MC44602 Design Considerations Do not attempt to construct the converter on wire–wrap or plug–in prototype boards. High frequency circuit layout techniques are imperative to prevent pulse–width jitter. This is usually caused by excessive noise pick–up imposed on the Current Sense or Voltage Feedback inputs. Noise immunity can be improved by lowering circuit impedances at these points. The printed circuit layout should contain a ground plane with low–current signal, and high current switch and output grounds returning on separate paths back to the input filter capacitor. Ceramic bypass capacitors (0.1 µF) connected directly to VCC, VC, and Vref may be required depending upon circuit layout. This provides a low impedance path for filtering the high frequency noise. All high current loops should be kept as short as possible using heavy copper runs to minimize radiated EMI. The Error Amp compensation circuitry and the converter output voltage divider should be located close to the IC and as far as possible from the power switch and other noise generating components. PROTECTION MODES The MC44602 operates as a conventional fixed frequency current mode controller when the power supply output load is less than the design limit. For enhanced system reliability, this device has the unique ability of changing operating modes if the power supply output is overloaded or shorted. Overload Protection Power supply overload protection is provided by the Foldback Amplifier. As the output load gradually increases, the Error Amplifier senses that the voltage at Pin 3 is less than the 2.5 V threshold. This causes the voltage at Pin 1 to rise, increasing the Current Sense Comparator threshold in order to maintain output regulation. As the load further increases, the inverting input of the Current Sense Comparator reaches the internal 1.0 V clamp level, limiting the switch current to the calculated Ipk(max). At this point any further increase in load will cause the power supply output to fall out of regulation. As the voltage at Pin 3 falls below 2.5 V, current will flow out of the Foldback Amplifier input, and the internal clamp level will be proportionally reduced (Figures 9, 10). The increase in current flowing out of the Foldback Amplifier input in conjunction with the reduced clamp level, causes the power supply output voltage to fall at a faster rate than the voltage at Pin 3. This results in the output foldback characteristic shown in Figure 31. The shape of the current limit “knee” can be modified by the value of resistor R1 in the feedback divider. Lower values of R1 will reduce the Ipk(max) clamp level at a faster rate. Improper operation of the Foldback Amp can be encountered when the Error Amp compensation capacitor Cf exceeds 2.0 nF. The problem appears at Startup when the output voltage of the power supply is below nominal, causing the Error Amp output to rise quickly. The rapid change in output voltage will be coupled through Cf to the Inverting Input (Pin 3), keeping it at its 2.5 V threshold as the 1.0 mA Error Amp current source charges Cf. This has the effect of disabling the Foldback Amp by preventing Pin 3 and the clamp level at the inverting input of the Current Sense Comparator, from rising in proportion to the power supply output voltage. By adding resistor RFB in series with Cf, the voltage at Pin 3 can be held to 1.0 V, corresponding to a Current Sense clamp level of 0.08 V (Figure 10), while allowing the Error Amp output to reach its high state VOH of 7.0 V. The required resistor to keep Pin 3 below 1.0 V during initial Startup is: RFB Rf ≥6 RFB + Rf 12 R1 R2 R 1 + R2 Figure 31. Output Foldback Characteristic Vout lpk(max) VO Nominal New Startup Sequence Initiated Low Value R1 High Value R1 VCC UVLO Threshold Nominal Load Range Overload Iout Short Circuit Protection Short circuit protection for the power supply is provided by the Valid Load Comparator, Fault Latch, and Demag Comparator. Figure 32 shows the logic truth table of the functional blocks. When operating the power supply with nominal output loading, the Fault Latch is “Set” by the NOR gate driver during the Power Transistor “On” time and “Reset” by the Fault Comparator during the “Off” time. When a severe overload or short circuit occurs on any output, the voltage during the “Off” time (flyback voltage) at the Load Detect Input, is unable to reach the 2.5 V threshold of the Valid Load Comparator. This causes the Fault Latch to remain in the “Set” state with output Q “Low”. During the “Off” time the Demag Comparator output will also be “Low”. This causes the NOR gate to internally hold the Sync Input “High”, inhibiting the next fixed frequency Oscillator cycle and switching of the Power Transistor. As the load dissipates the stored transformer energy, the voltage at the Load Detect Input will fall. When this voltage reaches 85 mV, the Demag Comparator output goes “High”, allowing the Sync Input to go “Low”, and the Power Transistor to turn “On”. Note that as long as there is an output short, the switching frequency will shift to a much lower frequency than that set by RT/CT. The frequency shift has the effect of lowering the duty cycle, resulting in a significant reduction in Power Transistor and Output Rectifier heating when compared to conventional current mode controllers. The extended “On” time is the result of CT charging from 0 V to 2.8 V instead of 1.2 V to 2.8 V. The extended “Off” time is the result of the output short time constant. The time constant consists of the output filter capacitance, and the equivalent series resistance (ESR) of the capacitor plus the associated wire resistance. MOTOROLA ANALOG IC DEVICE DATA MC44602 Figure 32. Logic Truth Table of Functional Blocks Demag Fault Latch Sync Output Load Power Transistor Input Out S R Q Input Nominal On <85mV 1 1 0 0 0 At Turn–Off >85 mV, <2.5 V 0 0 0 0 Off >2.5 V 0 0 1 1 0 Valid Load Comparator resets Fault Latch. On <85 mV 1 1 0 0 0 Short is not detected until transistor turn–off. At Turn–Off >85 mV, <2.5 V 0 0 0 0 1 Valid Load Comparator fails to reset Fault Latch, Pulse at Sync Input exceeds 2.5 V, Oscillator is disabled. Off <85 mV 1 0 0 0 0 Load dissipates transformer energy, Oscillator enabled. Short During the initial power supply startup the controller sequences through the Short Circuit and Overload Protection modes as the output filter capacitors charge–up. If an output is shorted and the auxiliary feedback winding is used to power the control IC as in Figure 33, the VCC UVLO lower threshold level will be reached after several cycles, disabling the IC and initiating a new startup sequence. The Short Circuit Protection mode can be disabled by grounding the Sync Input. Narrow switching spikes are present on this pin during normal operation. These spikes are caused by the rise time of the flyback voltage from the 85 mV Demag Comparator threshold to the 2.5 V Valid Load Comparator threshold. In high power applications, the increased negative current at the Load Detect Input can extend the switching spikes to the point where they exceed the Sync Input threshold. This problem can be eliminated by placing an external small signal clamp diode at the Load Detect Input. The diode is connected with the cathode at Pin 2 and the anode at ground. The divide–by–two toggle flip–flop will appear not to function properly during power supply startup without foldback, or operation with an overloaded output. This phenomena appears at the end of the oscillator cycle if there was not a current sense comparison, and after the flyback voltage at the Load Detect Input failed to exceed 2.5 V. Under these conditions, the Sync input will go high approximately 1.0 µs after the Load Detect Input exceeds the 85 mV Demag MOTOROLA ANALOG IC DEVICE DATA Operating Comments NOR gate driver sets Fault Latch. Narrow spike at Sync Input (<2.5 V) as transformer voltage rises quickly, Oscillator is not affected. Comparator threshold. This causes CT to discharge down towards ground, generating a second negative going edge on the oscillator waveform. This second edge results in the divide–by–two flip–flop being clocked twice for each “On” time of the switch transistor. During initial startup, this effect can be eliminated by insuring that the Foldback Amplifier is fully active with the addition of resistor RFB. With the Foldback Amplifier active, the clamp level at the inverting input of the Current Sense Comparator will be low, allowing a comparison to take place during the switch transistor “On” time. When the Load Detect Input exceeds 85 mV, the Sync Input will go high, discharging CT to ground after 1.0 µs, thus eliminating the second negative edge. Operation with the output overloaded will cause the toggle flip–flop to be clocked twice for each “On” time. This should not be a problem since the next “On” time is delayed by the Demag Comparator until the load dissipates the transformers energy. The point where the IC detects that there is a severe output overload, or that the transformer has reached zero current, is controlled by the voltage of the auxiliary winding and a resistor divider. The divider consists of an external series resistor and an internal shunt resistor. The shunt resistor is nominally 18 kΩ but can range from 12 kΩ to 30 kΩ due to process variations. If more precise overload and zero current detection is required, the internal resistor variations can be swamped out by connecting a low value external resistor (≤2.7 kΩ) from Pin 2 to ground. 13 MC44602 PIN FUNCTION DESCRIPTION 14 Pin Function Description 1 Compensation 2 Load Detect Input 3 Voltage Feedback Input 4, 5, 12, 13 Sink Ground The Sink Ground pins form a single power return that is typically connected back to the power source on a separate path from Pin 9 Ground, to reduce the effects of switching transient noise on the control circuitry. These pins can be used to enhance the package power capabilities (Figure 14). The Sink Output low state (VOL) can be modified by applying a negative voltage to these pins with respect to Ground (Pin 9) to optimize turn–off of a bipolar junction transistor. 6 Current Sense Input A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate conduction of the output switch transistor. 7 Sync Input A narrow rectangular waveform applied to this input will synchronize the Oscillator. A dc voltage within the range of 3.2 V to 5.5 V will inhibit the Oscillator. 8 RT/CT The Oscillator frequency and maximum Output duty cycle are programmed at this pin by connecting resistor RT to Vref and capacitor CT to ground. 9 Ground This pin is the control circuitry ground and is typically connected back to the power source on a separate path from the Sink Ground (Pins 4, 5, 12, 13). 10 Sink Output 11 Source Output 14 VC 15 VCC This pin is the positive supply of the control IC. The minimum operating voltage range after startup is 11 V to 18 V. 16 Vref This is the 5.0 V reference output. It provides charging current for capacitor CT through resistor RT and can be used to bias any additional system circuitry. This pin is the Error Amplifier output and is made available for loop compensation. A voltage indicating a severe overload or short circuit condition at any output of the switching power supply is connected to this input. The Oscillator is controlled by this information making the power supply short circuit proof. This is the inverting input of the Error Amplifier and the noninverting input of the Foldback Amplifier. It is normally connected to the switching power supply output through a resistor divider. Peak currents up to 1.5 A are sunk by this output suiting it ideally for turning–off a bipolar junction transistor. The output switches at one–half the oscillator frequency. Peak currents up to 1.0 A are sourced by this output suiting it ideally for turning–on a bipolar junction transistor. The output switches at one–half the oscillator frequency. The Output high state (VOH) is set by the voltage applied to this pin. With a separate connection to the power source, it can reduce the effects of switching transient noise on the control circuitry. MOTOROLA ANALOG IC DEVICE DATA MC44602 Figure 33. 60 Watt Off–Line Flyback Regulator 1N5404 2.2 85 to 265 Vac 390 T1 470 MUR 4100 47k 2.0W 1N4148 470pF 220 0.1 85V/0.5A 220pF 270 0.1 220pF 1N4934 15k 1.0µH MUR 415 1N4148 470 0.1 20V/0.6A 220pF 0.1µF 24k 47k 10k 1 16 2 15 3 4 5 10k MC44602 470k 1.0k 14 13 12 6 11 7 10 8 9 8.2k 2.0W MUR 460 220 3.3nF 22 0.33µH MBR 340 0.1 6.8V/0.8A 470 470pF 47nF 1.0 MJE18006 47 2.2nF 1.0nF/1.0kV 1.0k 1.0nF 0.82 Test 4.7M Conditions Line Regulation Results 85V 20V 6.8V Vin = 85 Vac to 265 Vac IO = 0.5 A IO = 0.5 A IO = 0.8 A ∆ = 1.0 V or ± 0.6% ∆ = 0.04 V or ± 0.1% ∆ = 0.07 V or ± 0.5% 85V 20V 6.8V Vin = 220 Vac IO = 0.1 A to 0.5 A IO = 0.1 A to 0.5 A IO = 0.1 A to 0.8 A ∆ = 1.0 V or ± 0.6% ∆ = 0.4 V or ± 1.0% ∆ = 0.2 V or ± 1.5% Efficiency Vin = 110 Vac, PO = 58 W 81% Standby Power Vin = 110 Vac, PO = 0 W 2.0 W Load Regulation T1 – Orega SMT2 (G4787–01) Primary: 41 Turns, #25AWG Auxiliary Feedback: 12 Turns, #25AWG Secondary: 85 V – 60 Turns, #25AWG Secondary: 20 V – 15 Turns, #25AWG (2 Strands) Bifiliar Wound Secondary: 6.8 V – 5 Turns, #25AWG (2 Strands) Bifiliar Wound Core – ETD39 34x17x11 B52 Gap – ≈ 0.020″ for a primary inductance of 750 µH, AL = 500 nH/Turn2 MOTOROLA ANALOG IC DEVICE DATA 15 MC44602 Figure 34. 150 Watt Off–Line Flyback Regulator 1N5404 4.7 220pF 390 220 Vac T1 100 47k 2.0W 1N4148 MUR 4100 470pF 0.1 155V/0.5A 220pF 270 0.1 220 1N4934 15k 1.0µH MUR 415 1N4148 470 0.1 24.5V/1.8A 220pF 47k 10k 470k 1.0k 1 16 2 15 3 14 4 5 10k MC44602 0.1µF 24k 13 12 6 11 7 10 8 8.2k 2.0W MUR 460 220 3.3nF 22 2.2µH 47 9 0.1 15.5V/1.8A 470 470pF 47nF 1.0 MUR 415 MJE18006 2.2nF 1.0nF/1.0kV 1.0k 1.0nF 0.47 Test 4.7M Conditions Line Regulation Results 155V 24.5V 15.5V Vin = 185 Vac to 265 Vac IO = 0.5 A IO = 1.0. A IO = 1.0 A ∆ = 1.0 V or ± 0.3% ∆ = 0.4 V or ± 0.8% ∆ = 0.3 V or ± 1.0% 155V 24.5V 15.5V Vin = 220 Vac IO = 0.1 A to 0.5 A IO = 0.1 A to 1.0 A IO = 0.1 A to 1.0 A ∆ = 2.0 V or ± 0.7% ∆ = 0.4 V or ± 0.8% ∆ = 0.2 V or ± 0.7% Efficiency Vin = 220 Vac, PO = 117.5 W 83% Standby Power Vin = 220 Vac, PO = 0 W 5.0 W Load Regulation T1 – Orega SMT2 (G4717–01) Primary: 55 Turns, #25AWG Auxiliary Feedback: 6 Turns, #25AWG Secondary: 155 V – 52 Turns, #25AWG Secondary: 24.5 V – 9 Turns, #25AWG (2 Strands) Bifiliar Wound Secondary: 15.5 V – 6 Turns, #25AWG (2 Strands) Bifiliar Wound Core – GETV 53x18x18 B52 Gap – ≈ 0.020″ for a primary inductance of 1.35 µH, AL = 450 nH/Turn2 16 MOTOROLA ANALOG IC DEVICE DATA MC44602 OUTLINE DIMENSIONS P2 SUFFIX PLASTIC PACKAGE CASE 648C–03 ISSUE C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. INTERNAL LEAD CONNECTION BETWEEN 4 AND 5, 12 AND 13. –A– 16 9 1 8 –B– L NOTE 5 C –T– M N SEATING PLANE F K E J G D 16 PL 0.13 (0.005) 16 PL 0.13 (0.005) M T A M T B DIM A B C D E F G J K L M N INCHES MIN MAX 0.740 0.840 0.240 0.260 0.145 0.185 0.015 0.021 0.050 BSC 0.040 0.70 0.100 BSC 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.040 MILLIMETERS MIN MAX 18.80 21.34 6.10 6.60 3.69 4.69 0.38 0.53 1.27 BSC 1.02 1.78 2.54 BSC 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 S S MOTOROLA ANALOG IC DEVICE DATA 17 MC44602 Motorola reserves the right to make changes without further notice to any products herein. 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How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 18 ◊ MOTOROLA ANALOG IC DEVICE DATA *MC44602/D* MC44602/D