ONSEMI MJF6388

Order this document
by MJF6388/D
SEMICONDUCTOR TECHNICAL DATA
For Isolated Package Applications
*Motorola Preferred Devices
Designed for general–purpose amplifiers and switching applications, where the
mounting surface of the device is required to be electrically isolated from the heatsink
or chassis.
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COMPLEMENTARY
SILICON
POWER DARLINGTONS
10 AMPERES
100 VOLTS
40 WATTS
Isolated Overmold Package, TO–220 Type
Electrically Similar to the Popular 2N6388, 2N6668, TIP102 and TIP107
100 VCEO(sus)
10 A Rated Collector Current
No Isolating Washers Required
Reduced System Cost
High DC Current Gain — 1000 (Min) @ IC = 5.0 Adc
High Isolation Voltage (up to 4500 VRMS)
Case 221D is UL Recognized at 3500 VRMS: File #E69369
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v
CASE 221D–02
UL RECOGNIZED
MAXIMUM RATINGS
Rating
Collector–Emitter Voltage
Symbol
Value
Unit
VCEO
100
Vdc
Collector–Base Voltage
VCB
100
Vdc
Emitter–Base Voltage
VEB
5.0
Vdc
VISOL
4500
3500
1500
V
Collector Current — Continuous
— Peak(2)
IC
10
15
Adc
Base Current
IB
1.0
Adc
Total Power Dissipation* @ TC = 25_C
Derate above 25_C
PD
40
0.31
Watts
W/_C
Total Power Dissipation @ TA = 25_C
Derate above 25_C
PD
2.0
0.016
Watts
W/_C
TJ, Tstg
– 65 to + 150
_C
RMS Isolation Voltage (1)
(for 1 sec, R.H. < 30%, TA = 25_C)
Test No. 1 Per Figure 14
Test No. 2 Per Figure 15
Test No. 3 Per Figure 16
Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Symbol
Max
Unit
Thermal Resistance, Junction to Case*
Characteristic
RθJC
3.2
_C/W
Thermal Resistance, Junction to Ambient
RθJA
62.5
_C/W
Lead Temperature for Soldering Purpose
TL
260
_C
(1) Proper strike and creepage distance must be provided.
(2) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle
10%.
* Measurement made with thermocouple contacting the bottom insulated mounting surface of the package (in a location beneath the die), the device
mounted on a heatsink, thermal grease applied and a mounting torque of 6 to 8 inSlbs.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 3
 Motorola, Inc. 1995
Motorola Bipolar Power Transistor Device Data
1
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v
v
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
VCEO(sus)
100
—
Vdc
Collector Cutoff Current
(VCE = 80 Vdc, IB = 0)
ICEO
—
10
µAdc
Collector Cutoff Current (VCE = 100 Vdc, VEB(off) = 1.5 Vdc)
Collector Cutoff Current (VCE = 100 Vdc, VEB(off) = 1.5 Vdc, TC = 125_C)
ICEX
—
—
10
3.0
µAdc
mAdc
Collector Cutoff Current
(VCB = 100 Vdc, IE = 0)
ICBO
—
10
µAdc
Emitter Cutoff Current (VBE = 5.0 Vdc, IC = 0)
IEBO
—
2.0
mAdc
hFE
3000
1000
200
100
15000
—
—
—
—
Collector–Emitter Saturation Voltage (IC = 3.0 Adc, IB = 6.0 mAdc)
Collector–Emitter Saturation Voltage (IC = 5.0 Adc, IB = 0.01 Adc)
Collector–Emitter Saturation Voltage (IC = 8.0 Adc, IB = 80 mAdc)
Collector–Emitter Saturation Voltage (IC = 10 Adc, IB = 0.1 Adc)
VCE(sat)
—
—
—
—
2.0
2.0
2.5
3.0
Vdc
Base–Emitter Saturation Voltage (IC = 5.0 Adc, IB = 0.01 Adc)
Base–Emitter Saturation Voltage (IC = 10 Adc, IB = 0.1 Adc)
VBE(sat)
—
—
2.8
4.5
Vdc
Base–Emitter On Voltage (IC = 8.0 Adc, VCE = 4.0 Vdc)
VBE(on)
—
2.5
Vdc
|hfe|
20
—
—
Cob
—
200
300
pF
Cc–hs
—
3.0 Typ
pF
hfe
1000
—
—
OFF CHARACTERISTICS
Collector–Emitter Sustaining Voltage (1)
(IC = 30 mAdc, IB = 0)
ON CHARACTERISTICS (1)
DC Current Gain (IC = 3.0 Adc, VCE = 4.0 Vdc)
DC Current Gain (IC = 5.0 Adc, VCE = 3.0 Vdc)
DC Current Gain (IC = 8.0 Adc, VCE = 4.0 Vdc)
DC Current Gain (IC = 10 Adc, VCE = 3.0 Vdc)
DYNAMIC CHARACTERISTICS
Small–Signal Current Gain (IC = 1.0 Adc, VCE = 5.0 Vdc, ftest = 1.0 MHz)
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz)
MJF6388
MJF6668
Insulation Capacitance (Collector–to–External Heatsink)
Small–Signal Current Gain (IC = 1.0 Adc, VCE = 5.0 Vdc, f = 1.0 kHz)
(1) Pulse Test: Pulse Width
300 µs, Duty Cycle
2.0%.
NPN
MJF6388
PNP
MJF6668
COLLECTOR
BASE
COLLECTOR
BASE
≈8k
≈ 120
≈8k
EMITTER
≈ 120
EMITTER
Figure 1. Darlington Schematic
2
Motorola Bipolar Power Transistor Device Data
VCC
+ 30 V
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1, MUST BE FAST RECOVERY TYPES, e.g.,
MUR110 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
RC
SCOPE
TUT
V1
APPROX.
+12 V
RB
V2
APPROX.
–8 V
≈ 120
–4 V
25 µs
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
≈8k
D1
51
FOR td AND tr, D1 IS DISCONNECTED
AND V2 = 0
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
Figure 2. Switching Times Test Circuit
NPN
MJF6388
PNP
MJF6668
10
7
5
7
5
ts
tf
1
0.7
0.3
0.2
0.1
0.07
0.1
tr
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
0.2
tr
3
t, TIME ( µs)
t, TIME ( µs)
3
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
td
2
ts
1
0.7
0.5
0.3
0.2
1
0.5
2
IC, COLLECTOR CURRENT (AMPS)
5
0.1
0.1
10
td
tf
0.2
3
0.5 0.7 1
2
0.3
IC, COLLECTOR CURRENT (AMPS)
5
7
10
Figure 3. Typical Switching Times
IC, COLLECTOR CURRENT (AMPS)
20
100 µs
10
5
3
2
TJ = 150°C
1
1 ms
5 ms
0.5
0.3
0.2
CURRENT LIMIT
SECONDARY BREAKDOWN LIMIT
THERMAL LIMIT @ TC = 25°C
(SINGLE PULSE)
0.1
0.05
0.03
0.02
dc
1
5
20 30
2
3
10
50
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
100
Figure 4. Maximum Forward Bias
Safe Operating Area
Motorola Bipolar Power Transistor Device Data
3
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.05
0.03
P(pk)
RθJC(t) = r(t) RθJC
RθJC = °C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) RθJC(t)
0.1
0.05
SINGLE PULSE
t1
t2
DUTY CYCLE, D = t1/t2
0.02
0.01
0.01 0.02
0.05
0.2 0.3 0.5
0.1
1
2 3
5
10
20 30 50
t, TIME (ms)
100 200 300 500
1K
2K 3K 5K
10K 20K 30K 50K 100K
Figure 5. Thermal Response
1
SECOND BREAKDOWN
DERATING
POWER DERATING FACTOR
0.8
0.6
THERMAL
DERATING
0.4
0.2
0
20
60
40
80
100
140
120
160
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 4 is based on T J(pk) = l50_C; TC is
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T J(pk)
< 150_C. TJ(pk) may be calculated from the data in Figure 5.
At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by secondary breakdown.
TC, CASE TEMPERATURE (°C)
Figure 6. Maximum Power Derating
NPN
MJF6388
PNP
MJF6668
5000
3000
2000
5000
hFE , SMALL–SIGNAL CURRENT GAIN
10,000
hfe , SMALL–SIGNAL CURRENT GAIN
10,000
1000
500
300
200
TC = 25°C
VCE = 4 Vdc
IC = 3 Adc
100
50
30
20
10
1
2
5
10
20
50 100
f, FREQUENCY (kHz)
200
500 1000
2000
1000
500
TC = 25°C
VCE = 4 VOLTS
IC = 3 AMPS
200
100
50
20
10
1
2 3
5 7 10
20 30 50 70 100
f, FREQUENCY (kHz)
200 300 500 1000
Figure 7. Typical Small–Signal Current Gain
4
Motorola Bipolar Power Transistor Device Data
NPN
MJF6388
PNP
MJF6668
300
300
TJ = 25°C
TJ = 25°C
200
100
C, CAPACITANCE (pF)
C, CAPACITANCE (pF)
200
Cob
70
Cib
50
30
0.1
Cib
100
Cob
70
50
0.2
0.5
1
2
5
10
20
VR, REVERSE VOLTAGE (VOLTS)
50
30
0.1
100
0.2
0.5
1
2
5
10
20
VR, REVERSE VOLTAGE (VOLTS)
50
100
Figure 8. Typical Capacitance
20,000
20,000
VCE = 4 V
VCE = 4 V
10,000
5000
TJ = 150°C
3000
2000
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
10,000
25°C
1000
– 55°C
500
300
200
0.1
0.2
0.5 0.7
0.3
1
3
2
5
7
7000
5000
2000
25°C
1000
700
500
300
200
0.1
10
TJ = 150°C
3000
– 55°C
0.2
0.3
0.5 0.7
1
2
3
5
7
10
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 9. Typical DC Current Gain
3
TJ = 25°C
2.6
IC = 2 A
4A
6A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
2
3
5
7
10
20
30
3
TJ = 25°C
2.6
IC = 2 A
4A
6A
2.2
1.8
1.4
1
0.3
0.5 0.7
1
IB, BASE CURRENT (mA)
2
3
5
7
10
20
30
IB, BASE CURRENT (mA)
Figure 10. Typical Collector Saturation Region
Motorola Bipolar Power Transistor Device Data
5
NPN
MJF6388
PNP
MJF6668
3
3
TJ = 25°C
TJ = 25°C
2.5
V, VOLTAGE (VOLTS)
V, VOLTAGE (VOLTS)
2.5
2
VBE(sat) @ IC/IB = 250
1.5
VBE @ VCE = 4 V
2
1.5
VBE @ VCE = 4 V
VBE(sat) @ IC/IB = 250
1
1
VCE(sat) @ IC/IB = 250
VCE(sat) @ IC/IB = 250
0.5
0.1
0.5
0.2 0.3
0.5 0.7
1
2
3
5
7
10
0.1
0.2 0.3
0.5 0.7
1
2
3
5
7
10
7
10
IC, COLLECTOR CURRENT (AMP)
IC, COLLECTOR CURRENT (AMP)
Figure 11. Typical “On” Voltages
+4
+5
θV, TEMPERATURE COEFFICIENT (mV/ °C)
θV, TEMPERATURE COEFFICIENT (mV/ °C)
+5
*IC/IB ≤ hFE/3
+3
+2
25°C to 150°C
+1
– 55°C to 25°C
0
–1
–2
–3
–4
–5
0.1
*θVC for VCE(sat)
25°C to 150°C
θVB for VBE
– 55°C to 25°C
*IC/IB ≤ hFE/3
+4
+3
25°C to 150°C
+2
+1
– 55°C to 25°C
0
–1
*θVC for VCE(sat)
–2
–3
θVB for VBE
25°C to 150°C
– 55°C to 25°C
–4
–5
0.2 0.3
0.5 0.7
1
2
3
5
7
0.1
10
IC, COLLECTOR CURRENT (AMP)
0.2 0.3
0.5 0.7 1
2 3
IC, COLLECTOR CURRENT (AMP)
5
Figure 12. Typical Temperature Coefficients
105
105
REVERSE
REVERSE
FORWARD
IC, COLLECTOR CURRENT ( µ A)
IC, COLLECTOR CURRENT ( µ A)
104
VCE = 30 V
103
102
TJ = 150°C
101
100
100°C
25°C
10–1
– 0.6 – 0.4 – 0.2
0
+ 0.2 + 0.4 + 0.6 + 0.8
+1
VBE, BASE–EMITTER VOLTAGE (VOLTS)
+ 1.2 + 1.4
FORWARD
104
VCE = 30 V
103
102
101
TJ = 150°C
100°C
100
25°C
10–1
+ 0.6 + 0.4 + 0.2
0
– 0.2 – 0.4 – 0.6 – 0.8
–1
– 1.2 – 1.4
VBE, BASE–EMITTER VOLTAGE (VOLTS)
Figure 13. Typical Collector Cut–Off Region
6
Motorola Bipolar Power Transistor Device Data
TEST CONDITIONS FOR ISOLATION TESTS*
CLIP
MOUNTED
FULLY ISOLATED
PACKAGE
CLIP
LEADS
HEATSINK
MOUNTED
FULLY ISOLATED
PACKAGE
MOUNTED
FULLY ISOLATED
PACKAGE
0.107” MIN
LEADS
0.107” MIN
LEADS
HEATSINK
HEATSINK
0.110” MIN
Figure 14. Clip Mounting Position
for Isolation Test Number 1
Figure 15. Clip Mounting Position
for Isolation Test Number 2
Figure 16. Screw Mounting Position
for Isolation Test Number 3
* Measurement made between leads and heatsink with all leads shorted together
MOUNTING INFORMATION
4–40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
HEATSINK
NUT
Figure 17. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in . lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a constant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4–40 screw, without washers, and applying a torque in excess of 20 in . lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4–40 screws indicate that the screw slot fails between 15 to 20 in . lbs without adversely affecting the package. However, in order to positively ensure the package integrity of the fully isolated device, Motorola does not recommend exceeding 10
in . lbs of mounting torque under any mounting conditions.
** For more information about mounting power semiconductors see Application Note AN1040.
Motorola Bipolar Power Transistor Device Data
7
PACKAGE DIMENSIONS
SEATING
PLANE
–T–
–B–
F
C
S
Q
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
U
A
1 2 3
H
–Y–
K
G
N
L
D
J
R
3 PL
0.25 (0.010)
M
B
M
Y
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
U
INCHES
MIN
MAX
0.621
0.629
0.394
0.402
0.181
0.189
0.026
0.034
0.121
0.129
0.100 BSC
0.123
0.129
0.018
0.025
0.500
0.562
0.045
0.060
0.200 BSC
0.126
0.134
0.107
0.111
0.096
0.104
0.259
0.267
MILLIMETERS
MIN
MAX
15.78
15.97
10.01
10.21
4.60
4.80
0.67
0.86
3.08
3.27
2.54 BSC
3.13
3.27
0.46
0.64
12.70
14.27
1.14
1.52
5.08 BSC
3.21
3.40
2.72
2.81
2.44
2.64
6.58
6.78
STYLE 2:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
CASE 221D–02
TO–220 TYPE
ISSUE D
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8
◊
Motorola Bipolar Power Transistor Device Data
*MJF6388/D*
MJF6388/D