Order this document by MMBTA70LT1/D SEMICONDUCTOR TECHNICAL DATA PNP Silicon COLLECTOR 3 1 BASE 2 EMITTER MAXIMUM RATINGS 3 1 Rating Symbol Value Unit Collector–Emitter Voltage VCEO –40 Vdc Emitter–Base Voltage VEBO –4.0 Vdc IC –100 mAdc Collector Current — Continuous 2 CASE 318 – 08, STYLE 6 SOT– 23 (TO – 236AB) DEVICE MARKING MMBTA70LT1 = M2C THERMAL CHARACTERISTICS Characteristic Total Device Dissipation FR-5 Board,(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Total Device Dissipation Alumina Substrate,(2) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature Symbol Max Unit PD 225 mW 1.8 mW/°C RθJA 556 °C/W PD 300 mW 2.4 mW/°C RθJA 417 °C/W TJ, Tstg – 55 to +150 °C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit Collector–Emitter Breakdown Voltage (IC = –1.0 mAdc, IB = 0) V(BR)CEO –40 — Vdc Emitter–Base Breakdown Voltage (IE = –100 µAdc, IC = 0) V(BR)EBO –4.0 — Vdc ICBO — –100 nAdc DC Current Gain (IC = –5.0 mAdc, VCE = –10 Vdc) hFE 40 400 — Collector–Emitter Saturation Voltage (IC = –10 mAdc, IB = –1.0 mAdc) VCE(sat) — –0.25 Vdc fT 125 — MHz Cobo — 4.0 pF OFF CHARACTERISTICS Collector Cutoff Current (VCB = –30 Vdc, IE = 0) ON CHARACTERISTICS SMALL–SIGNAL CHARACTERISTICS Current–Gain – Bandwidth Product (IC = –5.0 mAdc, VCE = –10 Vdc, f = 100 MHz) Output Capacitance (VCB = –10 Vdc, IE = 0, f = 1.0 MHz) 1. FR–5 = 1.0 x 0.75 x 0.062 in. 2. Alumina = 0.4 x 0.3 x 0.024 in. 99.5% alumina. Thermal Clad is a trademark of the Bergquist Company Motorola Small–Signal Transistors, FETs and Diodes Device Data Motorola, Inc. 1996 1 MMBTA70LT1 TYPICAL NOISE CHARACTERISTICS (VCE = – 5.0 Vdc, TA = 25°C) ā 10 7.0 IC = 10 µA 5.0 In, NOISE CURRENT (pA) en, NOISE VOLTAGE (nV) 1.0 7.0 5.0 BANDWIDTH = 1.0 Hz RS ≈ 0 30 µA 3.0 100 µA 300 µA 1.0 mA 2.0 BANDWIDTH = 1.0 Hz RS ≈ ∞ IC = 1.0 mA 3.0 2.0 300 µA 1.0 0.7 0.5 100 µA 30 µA 0.3 0.2 1.0 10 µA 0.1 10 20 50 100 200 500 1.0 k f, FREQUENCY (Hz) 2.0 k 5.0 k 10 10 k 20 50 Figure 1. Noise Voltage 100 200 500 1.0 k 2.0 k f, FREQUENCY (Hz) 5.0 k 10 k Figure 2. Noise Current NOISE FIGURE CONTOURS (VCE = – 5.0 Vdc, TA = 25°C) 1.0 M 500 k BANDWIDTH = 1.0 Hz RS , SOURCE RESISTANCE (OHMS) RS , SOURCE RESISTANCE (OHMS) ā 200 k 100 k 50 k 20 k 10 k 0.5 dB 5.0 k 1.0 dB 2.0 k 1.0 k 500 2.0 dB 3.0 dB 200 100 20 30 50 70 100 200 300 IC, COLLECTOR CURRENT (µA) BANDWIDTH = 1.0 Hz 200 k 100 k 50 k 20 k 10 k 0.5 dB 5.0 k 1.0 dB 2.0 k 1.0 k 500 2.0 dB 3.0 dB 200 100 5.0 dB 10 1.0 M 500 k 500 700 1.0 k 5.0 dB 10 20 RS , SOURCE RESISTANCE (OHMS) Figure 3. Narrow Band, 100 Hz 1.0 M 500 k 30 50 70 100 200 300 IC, COLLECTOR CURRENT (µA) 500 700 1.0 k Figure 4. Narrow Band, 1.0 kHz 10 Hz to 15.7 kHz 200 k 100 k 50 k ƪ Noise Figure is Defined as: 20 k 10 k NF 0.5 dB 1.0 dB 2.0 dB 3.0 dB 5.0 dB 200 100 10 20 30 50 70 100 200 300 en2 ƫ ) 4KTRS ) In 2RS2 1ń2 4KTRS en = Noise Voltage of the Transistor referred to the input. (Figure 3) In = Noise Current of the Transistor referred to the input. (Figure 4) K = Boltzman’s Constant (1.38 x 10–23 j/°K) T = Temperature of the Source Resistance (°K) RS = Source Resistance (Ohms) 5.0 k 2.0 k 1.0 k 500 + 20 log10 500 700 1.0 k IC, COLLECTOR CURRENT (µA) Figure 5. Wideband 2 Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBTA70LT1 TYPICAL STATIC CHARACTERISTICS h FE, DC CURRENT GAIN 400 TJ = 125°C 25°C 200 – 55°C 100 80 60 VCE = 1.0 V VCE = 10 V 40 0.003 0.005 0.01 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 1.0 2.0 IC, COLLECTOR CURRENT (mA) 3.0 5.0 7.0 10 20 30 50 70 100 100 1.0 TA = 25°C IC, COLLECTOR CURRENT (mA) VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS) Figure 6. DC Current Gain 0.8 IC = 1.0 mA 0.6 10 mA 50 mA 100 mA 0.4 0.2 0 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 IB, BASE CURRENT (mA) TA = 25°C PULSE WIDTH = 300 µs 80 DUTY CYCLE ≤ 2.0% 300 µA 200 µA 150 µA 40 100 µA 50 µA 20 0 5.0 10 0 20 5.0 10 15 20 25 30 35 VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS) θV, TEMPERATURE COEFFICIENTS (mV/°C) TJ = 25°C V, VOLTAGE (VOLTS) 1.2 1.0 0.8 VBE(sat) @ IC/IB = 10 0.6 VBE(on) @ VCE = 1.0 V 0.4 0.2 VCE(sat) @ IC/IB = 10 0 0.5 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 40 Figure 8. Collector Characteristics 1.4 0.2 250 µA 60 Figure 7. Collector Saturation Region 0.1 IB = 400 µA 350 µA 50 100 Figure 9. “On” Voltages Motorola Small–Signal Transistors, FETs and Diodes Device Data 1.6 *APPLIES for IC/IB ≤ hFE/2 0.8 *qVC for VCE(sat) 25°C to 125°C 0 – 55°C to 25°C 0.8 25°C to 125°C 1.6 2.4 0.1 qVB for VBE 0.2 – 55°C to 25°C 0.5 1.0 2.0 5.0 10 20 IC, COLLECTOR CURRENT (mA) 50 100 Figure 10. Temperature Coefficients 3 MMBTA70LT1 TYPICAL DYNAMIC CHARACTERISTICS 1000 700 500 500 VCC = 3.0 V IC/IB = 10 TJ = 25°C 300 ā ts 300 200 100 70 50 t, TIME (ns) t, TIME (ns) 200 30 tr 20 10 7.0 5.0 1.0 100 70 50 tf 30 td @ VBE(off) = 0.5 V 20 2.0 3.0 20 30 5.0 7.0 10 IC, COLLECTOR CURRENT (mA) 50 70 10 –1.0 100 – 2.0 – 3.0 – 5.0 – 7.0 –10 – 20 – 30 IC, COLLECTOR CURRENT (mA) ā ā 500 ā ā – 50 – 70 –100 ā ā ā 10 TJ = 25°C TJ = 25°C 7.0 VCE = 20 V 300 Cib 5.0 V 200 100 5.0 3.0 2.0 Cob 70 50 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10 20 30 1.0 0.05 50 0.1 0.2 0.5 1.0 2.0 5.0 IC, COLLECTOR CURRENT (mA) VR, REVERSE VOLTAGE (VOLTS) Figure 13. Current–Gain — Bandwidth Product Figure 14. Capacitance 20 VCE = –10 Vdc f = 1.0 kHz TA = 25°C hoe, OUTPUT ADMITTANCE (m mhos) hfe ≈ 200 @ IC = –1.0 mA 7.0 5.0 3.0 2.0 1.0 0.7 0.5 0.3 0.2 0.1 10 20 50 200 10 hie , INPUT IMPEDANCE (k Ω ) ā Figure 12. Turn–Off Time C, CAPACITANCE (pF) f T, CURRENT–GAIN — BANDWIDTH PRODUCT (MHz) Figure 11. Turn–On Time 100 70 50 30 20 VCE = 10 Vdc f = 1.0 kHz TA = 25°C hfe ≈ 200 @ IC = 1.0 mA 10 7.0 5.0 3.0 0.2 0.5 20 1.0 2.0 5.0 10 IC, COLLECTOR CURRENT (mA) Figure 15. Input Impedance 4 VCC = – 3.0 V IC/IB = 10 IB1 = IB2 TJ = 25°C 50 100 2.0 0.1 0.2 0.5 20 1.0 2.0 5.0 10 IC, COLLECTOR CURRENT (mA) 50 100 Figure 16. Output Admittance Motorola Small–Signal Transistors, FETs and Diodes Device Data r(t) TRANSIENT THERMAL RESISTANCE (NORMALIZED) MMBTA70LT1 1.0 0.7 0.5 D = 0.5 0.3 0.2 0.2 0.1 0.1 0.07 0.05 FIGURE 19 0.05 P(pk) 0.02 0.03 0.02 t1 0.01 0.01 0.01 0.02 SINGLE PULSE 0.05 0.1 0.2 0.5 1.0 t2 2.0 5.0 10 20 50 t, TIME (ms) 100 200 DUTY CYCLE, D = t1/t2 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 (SEE AN–569) ZθJA(t) = r(t) • RθJA TJ(pk) – TA = P(pk) ZθJA(t) 500 1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k Figure 17. Thermal Response 104 DESIGN NOTE: USE OF THERMAL RESPONSE DATA IC, COLLECTOR CURRENT (nA) VCC = 30 V 103 ICEO 102 101 ICBO AND ICEX @ VBE(off) = 3.0 V A train of periodical power pulses can be represented by the model as shown in Figure 19. Using the model and the device thermal response the normalized effective transient thermal resistance of Figure 17 was calculated for various duty cycles. To find Z θJA(t), multiply the value obtained from Figure 17 by the steady state value RθJA. 10–1 Example: Dissipating 2.0 watts peak under the following conditions: t1 = 1.0 ms, t2 = 5.0 ms (D = 0.2) Using Figure 17 at a pulse width of 1.0 ms and D = 0.2, the reading of r(t) is 0.22. 10–2 The peak rise in junction temperature is therefore ∆T = r(t) x P(pk) x RθJA = 0.22 x 2.0 x 200 = 88°C. 100 –4 0 –2 0 0 + 20 + 40 + 60 + 80 + 100 + 120 + 140 + 160 TJ, JUNCTION TEMPERATURE (°C) For more information, see AN–569. Figure 18. Typical Collector Leakage Current Motorola Small–Signal Transistors, FETs and Diodes Device Data 5 MMBTA70LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by T J(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA . Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. 6 SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. Motorola Small–Signal Transistors, FETs and Diodes Device Data MMBTA70LT1 PACKAGE DIMENSIONS NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIUMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 3 B S 1 V 2 G C D H K J DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 STYLE 6: PIN 1. BASE 2. EMITTER 3. COLLECTOR CASE 318–08 ISSUE AE SOT–23 (TO–236AB) Motorola Small–Signal Transistors, FETs and Diodes Device Data 7 MMBTA70LT1 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315 MFAX: [email protected] – TOUCHTONE 602–244–6609 INTERNET: http://Design–NET.com ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 8 ◊ *MMBTA70LT1/D* Motorola Small–Signal Transistors, FETs and Diodes MMBTA70LT1/D Device Data