SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2G 2A 2B 2Y0 2Y1 2Y2 2Y3 1A 1B 1Y0 1Y1 1Y2 1Y3 16 1A 1G NC VCC 1 SN54AHC139 . . . FK PACKAGE (TOP VIEW) 1B 1Y0 NC 1Y1 1Y2 15 2G 14 2A 2 3 13 2B 12 2Y0 4 5 11 2Y1 10 2Y2 6 7 8 9 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2A 2B NC 2Y0 2Y1 1Y3 GND NC 2Y3 2Y2 16 VCC 1 SN74AHC139 . . . RGY PACKAGE (TOP VIEW) 2Y3 1G 1A 1B 1Y0 1Y1 1Y2 1Y3 GND Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 2G SN54AHC139 . . . J OR W PACKAGE SN74AHC139 . . . D, DB, DGV, N, NS OR PW PACKAGE (TOP VIEW) D 1G D D Operating Range 2-V to 5.5-V VCC Designed Specifically for High-Speed Memory Decoders and Data-Transmission Systems Incorporate Two Enable Inputs to Simplify Cascading and/or Data Reception GND D D NC – No internal connection description/ordering information The ’AHC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V VCC operation. These devices are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible. ORDERING INFORMATION Tape and reel SN74AHC139RGYR HA139 PDIP – N Tube SN74AHC139N SN74AHC139N Tube SN74AHC139D Tape and reel SN74AHC139DR SOP – NS Tape and reel SN74AHC139NSR AHC139 SSOP – DB Tape and reel SN74AHC139DBR HA139 Tube SN74AHC139PW Tape and reel SN74AHC139PWR TVSOP – DGV Tape and reel SN74AHC139DGVR HA139 CDIP – J Tube SNJ54AHC139J SNJ54AHC139J CFP – W Tube SNJ54AHC139W SNJ54AHC139W LCCC – FK Tube SNJ54AHC139FK SNJ54AHC139FK TSSOP – PW –55°C to 125°C TOP-SIDE MARKING QFN – RGY SOIC – D –40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA AHC139 HA139 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 description/ordering information (continued) The active-low enable (G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its driving circuit. FUNCTION TABLE (each decoder/demultiplexer) INPUTS OUTPUTS SELECT G B A Y0 Y1 Y2 Y3 H X X H H H H L L L L H H H L L H H L H H L H L H H L H L H H H H H L logic diagram (positive logic) 4 1G 5 6 1A Select Inputs 1B 1Y0 1 1Y1 1Y2 2 7 3 1Y3 Data Outputs 12 2G 11 10 2A Select Inputs 2B 2Y1 2Y2 14 9 13 Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages. 2 2Y0 15 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2Y3 SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±75 mA Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W (see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W (see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W (see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W (see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W (see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 4) SN54AHC139 VCC Supply voltage VIH High-level input voltage VCC = 2 V VCC = 3 V VCC = 5.5 V VCC = 2 V VIL Low-level input voltage SN74AHC139 MIN MAX MIN MAX 2 5.5 2 5.5 1.5 V 1.5 2.1 2.1 3.85 3.85 0.5 VCC = 3 V VCC = 5.5 V UNIT V 0.5 0.9 0.9 1.65 1.65 V VI VO Input voltage 0 5.5 0 5.5 V Output voltage 0 VCC –50 0 VCC –50 V IOH High-level output current VCC = 2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V VCC = 2 V IOL ∆t/∆v Low-level output current Input transition rise or fall rate –4 –4 –8 –8 50 50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 4 4 8 8 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 100 100 20 20 mA mA mA mA ns/V TA Operating free-air temperature –55 125 –40 85 °C NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) MIN TA = 25°C TYP MAX 2V 1.9 2 1.9 1.9 3V 2.9 3 2.9 2.9 4.5 V 4.4 4.5 4.4 4.4 IOH = –4 mA 3V 2.58 2.48 2.48 IOH = –8 mA 4.5 V 3.94 3.8 3.8 PARAMETER TEST CONDITIONS IOH = –50 mA VOH IOL = 50 mA VOL IOL = 4 mA II ICC Ci IOL = 8 mA VI = 5.5 V or GND VI = VCC or GND, VI = VCC or GND IO = 0 VCC SN54AHC139 MIN MAX SN74AHC139 MIN MAX UNIT V 2V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 0 V to 5.5 V ±0.1 ±1* ±1 mA 4 40 40 mA 10 pF 5.5 V 5V 2 10 V * On products compliant to MIL-PRF-38535, this parameter is not production tested at VCC = 0 V. switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL G Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF tPLH tPHL G Y CL = 50 pF TA = 25°C MIN TYP MAX SN54AHC139 SN74AHC139 MIN MAX MIN MAX 7.2** 11** 1** 13** 1 13 7.2** 11** 1** 13** 1 13 6.4** 9.2** 1** 11** 1 11 6.4** 9.2** 1** 11** 1 11 9.7 14.5 1 16.5 1 16.5 9.7 14.5 1 16.5 1 16.5 8.9 12.7 1 14.5 1 14.5 8.9 12.7 1 14.5 1 14.5 UNIT ns ns ns ns ** On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A or B Y CL = 15 pF tPLH tPHL G Y CL = 15 pF tPLH tPHL A or B Y CL = 50 pF tPLH tPHL G Y CL = 50 pF MIN TA = 25°C TYP MAX MAX MIN MAX 7.2** 1** 8.5** 1 8.5 5** 7.2** 1** 8.5** 1 8.5 4.4** 6.3** 1** 7.5** 1 7.5 4.4** 6.3** 1** 7.5** 1 7.5 6.5 9.2 1 10.5 1 10.5 6.5 9.2 1 10.5 1 10.5 5.9 8.3 1 9.5 1 9.5 5.9 8.3 1 9.5 1 9.5 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 SN74AHC139 MIN 5** ** On products compliant to MIL-PRF-38535, this parameter is not production tested. 4 SN54AHC139 • DALLAS, TEXAS 75265 UNIT ns ns ns ns SN54AHC139, SN74AHC139 DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS SCLS259K – DECEMBER 1995 – REVISED MARCH 2003 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, TYP f = 1 MHz UNIT 13 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point S1 VCC Open TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw VCC Input 50% VCC 50% VCC 0V th tsu VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 18-Feb-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AHC139D ACTIVE SOIC D 16 SN74AHC139DBLE OBSOLETE SSOP DB 16 SN74AHC139DBR ACTIVE SSOP DB SN74AHC139DGVR ACTIVE TVSOP SN74AHC139DR ACTIVE SN74AHC139N Lead/Ball Finish MSL Peak Temp (3) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM 40 Pb-Free (RoHS) None Call TI 16 2000 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM DGV 16 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SOIC D 16 2500 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU Level-NC-NC-NC SN74AHC139NSR ACTIVE SO NS 16 2000 Pb-Free (RoHS) CU NIPDAU Level-2-260C-1 YEAR/ Level-1-235C-UNLIM SN74AHC139PW ACTIVE TSSOP PW 16 90 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74AHC139PWLE OBSOLETE TSSOP PW 16 None Call TI SN74AHC139PWR ACTIVE TSSOP PW 16 2000 Pb-Free (RoHS) CU NIPDAU Level-1-250C-UNLIM SN74AHC139RGYR ACTIVE QFN RGY 16 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. None: Not yet available Lead (Pb-Free). Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0°–ā8° 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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