PHILIPS BLF1049

DISCRETE SEMICONDUCTORS
DATA SHEET
dbook, halfpage
M3D379
BLF1049
Base station LDMOS transistor
Product specification
Supersedes data of 2001 Dec 05
2003 May 14
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
FEATURES
DESCRIPTION
• Typical performance at a supply voltage of 27 V:
125 W LDMOS power transistor for base station
applications at frequencies from 800 MHz to 1000 MHz.
– 1-tone CW; IDQ = 1000 mA
– Output power = 125 W
PINNING - SOT502A
– Gain = 16.5 dB
PIN
– Efficiency = 54%
DESCRIPTION
– EDGE output power = 45 W (AV)
1
drain
– ACPR400 = −64 dBc at 400 kHz
(EDGE; IDQ = 750 mA)
2
gate
3
source; connected to flange
– EVM = 2% rms (AV)
(EDGE; IDQ = 750 mA)
• Easy power control
• Excellent ruggedness
handbook, halfpage
1
• High power gain
• Excellent thermal stability
• Designed for broadband operation (800 to 1000 MHz)
3
2
• Internally matched for ease of use.
Top view
APPLICATIONS
MBK394
Fig.1 Simplified outline SOT502A .
• RF power amplifier for GSM, EDGE and CDMA base
stations and multicarrier applications in the
800 to 1000 MHz frequency range.
QUICK REFERENCE DATA
Typical RF performance at Th = 25 °C in a common source test circuit.
MODE OF OPERATION
2-tone
1-tone CW
Gp
(dB)
ηD
(%)
d3
(dBc)
ACPR 400
(dBc)
EVM
% rms
(AV)
125 (PEP)
15.5
37
−32
−
−
125
16.5
54
−
−
−
15
32
−
−64
2
MIN.
MAX.
UNIT
f
(MHz)
920
GSM EDGE
PL
(W)
45 (AV)
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
VDS
drain-source voltage
−
75
V
VGS
gate-source voltage
−
±15
V
Tstg
storage temperature
−65
150
°C
Tj
junction temperature
−
200
°C
2003 May 14
2
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
VALUE
UNIT
Rth j-c
thermal resistance from junction to case
Th = 25 °C, PL = 35 W (AV), note 1
0.42
K/W
Rth j-h
thermal resistance from junction to heatsink
Th = 25 °C, PL = 35 W (AV), note 2
0.62
K/W
Notes
1. Thermal resistance is determined under RF operating conditions.
2. Depending on mounting condition in application.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V(BR)DSS
drain-source breakdown voltage
VGS = 0; ID = 3 mA
75
−
−
V
VGSth
gate-source threshold voltage
VDS = 10 V; ID = 300 mA
4
−
5
V
IDSS
drain-source leakage current
VGS = 0; VDS = 36 V
−
−
3
µA
IDSX
on-state drain current
VGS = VGSth + 9 V; VDS = 10 V
45
−
−
A
IGSS
gate leakage current
VGS = ±20 V; VDS = 0
−
−
1
µA
gfs
forward transconductance
VDS = 10 V; ID = 10 A
−
9
−
S
RDSon
drain-source on-state resistance
VGS = 9 V; ID = 10 A
−
60
−
mΩ
APPLICATION INFORMATION
RF performance in a common source class-AB circuit; VDS = 27 V; Th = 25 °C; unless otherwise specified.
Mode of operation: 2-tone CW, 100 kHz spacing; IDQ = 1130 mA; f = 890 MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Gp
gain power
14.6
15.5
−
dB
ηD
drain efficiency
33
37
−
%
IRL
input return loss
−
−12
−6
dB
d3
third order inter modulation
distortion
−
−32
−25
dBc
PL = 125 W (PEP)
Mode of operation: GSM EDGE; IDQ = 750 mA; f = 920 MHz
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Gp
gain power
−
15
−
dB
ηD
drain efficiency
−
32
−
%
ACPR 400
adjacent channel power ratio
−
−64
−
dBc
EVM (AV)
EVM rms average signal distortion
−
2
−
%
EVM peak
EVM rms peak signal distortion
−
2.2
−
%
PL = 45 W (AV)
Mode of operation: 1-tone CW; IDQ = 1000 mA; f = 920 MHz
SYMBOL
PARAMETER
Gp
gain power
ηD
drain efficiency
2003 May 14
CONDITIONS
PL = PL 1 dB = 125 W
3
MIN.
TYP.
MAX.
UNIT
−
16.5
−
dB
−
54
−
%
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
MLE061
16
Gp
(dB)
15
2
EVMrms
(AV)
handbook, halfpage
ηD
(%)
Gp
MLE062
−62
ACPR
400
40
handbook, halfpage
(dBc)
−64
30
(%)
1.5
ηD
EVM
14
−66
20
1
ACPR400
13
−68
10
12
0
10
20
−70
0
50
40
PL (AV)(W)
30
0.5
0
0
10
20
30
40
50
PL (AV)(W)
VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th ≤ 25 °C.
VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th ≤ 25 °C.
Fig.3
Fig.2
GSM EDGE ACPR400 and EVM as
functions of average load power; typical
values.
GSM EDGE power gain and efficiency as
functions of load power; typical values.
MLE064
50
handbook, halfpage
η
MLE063
18
handbook, halfpage
ηD
Gp
(dB)
(4)
(%)
60
40
ηD
gain
(dB)
16.5
η(1,2,3)
(%)
16
(5)
30
17
17
40
15.5
Gp
20
15
(6)
16
10
20
14.5
0
0
15
0
50
50
0
150
100
PL (AV) (W)
14
100
150
PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.
(1) η at Th = −40 °C.
(2) η at Th = 20 °C.
(3) η at Th = 80 °C.
(4) gain at Th = −40 °C.
(5) gain at Th = 20 °C.
(6) gain at Th = 80 °C.
VDS = 27 V; f = 920 MHz; IDQ = 1000 mA;
Fig.5
Fig.4
1-tone CW power gain and efficiency as
functions of load power; typical values.
2003 May 14
4
2-tone power gain and efficiency as
functions of load power at different
temperatures.
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
MLE065
−20
MLE066
−30
handbook, halfpage
handbook, halfpage
d3
(dBc)
d5
(dBc)
(3)
−30
−40
(1)
−40
(2)
−50
(1)
(2)
−50
−60
(3)
−60
0
50
−70
100
150
PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.
(1) Th = −40 °C.
(2) Th = 20 °C.
Fig.6
50
100
150
PL (PEP) (W)
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.
(3) Th = 80 °C.
(1) Th = −40 °C.
(2) Th = 20 °C.
Third order intermodulation distortion as a
function of load power at different
temperatures.
Fig.7
MLE067
−40
0
(3) Th = 80 °C.
Fifth order intermodulation distortion as a
function of load power at different
temperatures.
MLE068
20
handbook, halfpage
handbook, halfpage
d7
(dBc)
gain
(dB)
(3)
(2)
−50
ηD
(%)
(2)
15
40
30
(1)
(1)
(3)
10
20
(4)
−60
5
−70
0
0
50
100
150
PL (PEP) (W)
0
(1) Th = −40 °C.
(2) Th = 20 °C.
(1) IDQ = 1 A.
(3) Th = 80 °C.
(2) IDQ = 1.45 A.
Seventh order intermodulation distortion as
a function of load power at different
temperatures.
2003 May 14
50
100
0
150
PL (PEP) (W)
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz.
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz;
Fig.8
10
Fig.9
5
(3) IDQ = 1 A.
(4) IDQ = 1.45 A.
Power gain and drain efficiency as functions
of peak envelope load power;
typical values.
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
MLE069
0
MLE070
2
handbook,
Z halfpage
handbook, halfpage
i
(Ω)
1.5
dim
(dBc)
ri
−20
1
(1)
−40
(2)
(5)
0.5
(4)
(6)
(3)
−60
0
xi
−0.5
−80
0
50
−1
0.85
100
150
PL (PEP) (W)
0.9
0.95
f (GHz)
1
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz.
(1) d3; IDQ = 1 A.
(2) d5; IDQ = 1 A.
(3) d7; IDQ = 1 A.
(4) d3; IDQ = 1.3 A.
(5) d5; IDQ = 1.3 A.
(6) d7; IDQ = 1.3 A.
Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W.
Values comprised for different parameters.
Fig.10 Intermodulation distortion as a function of
peak envelope load power; typical values.
Fig.11 Input impedance as a function of frequency
(series components); typical values.
MLE071
2
handbook,
Z halfpage
L
(Ω)
1.5
1
RL
0.5
drain
handbook, halfpage
0
ZL
XL
−0.5
gate
Z IN
−1
0.85
0.9
0.95
f (GHz)
MGS998
1
Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W.
Values comprised for different parameters.
Fig.12 Input impedance as a function of frequency
(series components); typical values.
2003 May 14
Fig.13 Definition of transistor impedance.
6
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, full pagewidth
C2
C15
C3
Q1
C4
L12
C6
Vbias
L9
C17
R1
L10
C9
C7
Vsupply
L5
C10
L7
L3
RF in
L1
C1
L2
L4
Q2
L11
L14
L6
L15
L16
RF out
C13
C18
C5
C11
L8
C12
C8
L13
C16
C14
MDB168
Fig.14 Test circuit for 860 to 900 MHz.
2003 May 14
7
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
handbook, full pagewidth
PHILIPS
PHILIPS
Input Rev C
Output Rev C
Vbias in
C2
Q1
C4
C15
C17
L12
C6
L9
C9
Vd
in
C3
L5
L3
C7
C5
L1 C1 L2
L4
L6
L7 L8
BLF1049
R1
C10
C18
L14
L11
L10
C8
C13
L15 L16
C11
C12
C16
C14
L13
PHILIPS
PHILIPS
Input Rev C
Output Rev C
60
60
40
40
MLE073
Dimensions in mm.
The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 25 mm.
The other side is unetched and serves as a ground plane.
Fig.15 Component layout for 860 to 900 MHz test circuit.
2003 May 14
8
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
List of components (see Figs 14 and 15)
COMPONENT
DESCRIPTION
VALUE
DIMENSIONS
C1, C6, C13, C14, C15,
C16, C17
multilayer ceramic chip capacitor; note 1
68 pF
C2
multilayer ceramic chip capacitor; note 1
330 nF
C3
multilayer ceramic chip capacitor; note 1
100 nF
C4, C9, C10, C11, C12
tantalum capacitor
10 µF
C5, C18
air trimmer capacitor
5 pF
C7, C8
multilayer ceramic chip capacitor
8.2 pF
R1
potentiometer
1 kΩ
Q1
7808 voltage regulator
Q2
BLF1049 LDMOS transistor
L1
stripline; note 2
5.22 × 0.92 mm
L2
stripline; note 2
6.47 × 0.92 mm
L3
stripline; note 2
5.38 × 4.8 mm
L4
stripline; note 2
2.4 × 0.92 mm
L5
ferroxcube
L6
stripline; note 2
9.73 × 0.92 mm
L7
stripline; note 2
1.82 × 9.3 mm
L8
stripline; note 2
8.15 × 17.9 mm
L9
stripline; note 2
44 × 0.92 mm
L10
stripline; note 2
18.45 × 28.3 mm
L11
stripline; note 2
9.95 × 5.38 mm
L12, L13
stripline; note 2
37.6 × 3.35 mm
L14
stripline; note 2
2.36 × 0.92 mm
L15, L16
stripline; note 2
4.22 × 0.92 mm
Notes
1. American Technical Ceramics type 100A or capacitor of same quality.
2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 0.64 mm.
2003 May 14
9
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
PACKAGE OUTLINE
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
F
3
D1
U1
B
q
c
C
1
H
L
E1
p
U2
E
w1 M A M B M
A
2
w2 M C M
b
0
5
Q
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
UNIT
A
b
c
mm
4.72
3.43
12.83
12.57
0.15
0.08
inches
0.186
0.135
0.505 0.006
0.495 0.003
OUTLINE
VERSION
D
E
E1
F
H
L
p
Q
q
U1
U2
w1
w2
20.02 19.96
19.61 19.66
9.50
9.30
9.53
9.25
1.14
0.89
19.94
18.92
5.33
4.32
3.38
3.12
1.70
1.45
27.94
34.16
33.91
9.91
9.65
0.25
0.51
0.788 0.786
0.772 0.774
0.374 0.375
0.366 0.364
0.067
1.100
0.057
1.345
1.335
0.390
0.380
0.01
0.02
D1
0.045 0.785
0.035 0.745
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-28
03-01-10
SOT502A
2003 May 14
0.210 0.133
0.170 0.123
10
Philips Semiconductors
Product specification
Base station LDMOS transistor
BLF1049
DATA SHEET STATUS
LEVEL
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
Development
DEFINITION
I
Objective data
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Production
This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes  Philips Semiconductors
reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 May 14
11
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: [email protected].
SCA75
© Koninklijke Philips Electronics N.V. 2003
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613524/03/pp12
Date of release: 2003
May 14
Document order number:
9397 750 11123