TI1 LM3532TMX-40ANOPB High efficiency white led driver with programmable ambient light sensing capability and i2c-compatible interface Datasheet

LM3532
High Efficiency White LED Driver with Programmable Ambient Light
Sensing Capability and I2C-Compatible Interface
General Description
Features
The LM3532 is a 500 kHz fixed frequency asynchronous
boost converter which provides the power for 3 high-voltage,
low-side current sinks. The device is programmable over an
I2C-compatible interface and has independent current control
for all three channels. The adaptive current regulation method
allows for different LED currents in each current sink thus allowing for a wide variety of backlight + keypad applications.
The main features of the LM3532 include dual ambient light
sensor inputs each with 32 internal voltage setting resistors,
8-bit logarithmic and linear brightness control, dual external
PWM brightness control inputs, and up to 1000:1 dimming
ratio with programmable fade in and fade out settings.
The LM3532 is available in a 16-bump, 0.4mm pitch thin micro
SMD (1.745 mm x 1.845 mm x 0.6 mm). The device operates
over a 2.7V to 5.5V input voltage range and the −40°C to +85°
C temperature range.
● Drives up to 3 Parallel High-Voltage LED Strings at 40V
each with up to 90% efficiency
● 0.4% Typical Current Matching Between Strings
● 256 Level Logarithmic and Linear Brightness Control with
14-Bit Equivalent Dimming
● I2C-compatible Interface
● Direct Read Back of Ambient Light Sensor via 8-bit ADC
● Programmable Dual Ambient Light Sensor Inputs with
●
●
●
●
●
Internal Sensor Gain Selection
Dual External PWM Inputs for LED Brightness Adjustment
Independent Current String Brightness Control
Programmable LED Current Ramp Rates
40V Over-Voltage Protection
1A Typical Current Limit
Applications
● Power Source for White LED Backlit LCD Displays
● Programmable Keypad Backlight
Typical Application Circuit
301154100
PRODUCTION DATA information is current as of
publication date. Products conform to specifications per
the terms of the Texas Instruments standard warranty.
Production processing does not necessarily include
testing of all parameters.
301154 SNVS653B
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Application Circuit Component List
Component Manufacturer's Part Number
Value
White LED
Driver
National Semiconductor
LM3532
L
COILCRAFT
LPS4018-103ML
10 µH
COUT
Murata
GRM21BR71H105KA12L
1µF
CIN
Murata
GRM188R71A225KE15D
2.2 µF
Current/Voltage
Rating
(Resistance)
Package
Designator
Size (mm)
TMD16FKA
1.745 mm x 1.845 mm x 0.6 mm
3.9 mm x 3.9 mm x 1.7 mm
1A (RDC = 0.2Ω)
0805
0805
50V
0603
0603
10V
Connection Diagram
30115402
16-Bump (1.745 mm × 1.845 mm × 0.6 mm)
micro SMD Package TMD16FKA
Ordering Information
Order Number
2
Package Type
Supplied As
Lead
Free?
Top Mark
(2 lines: first line (XX) is date code
and die run code, second line is
voltage option)
LM3532TME-40A NOPB
16-Bump micro SMD 250 units, Tape-andReel, No Lead
Yes
XX
D34
LM3532TMX-40A NOPB
16-Bump micro SMD 3000 units, Tape-andReel, No Lead
Yes
XX
D34
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Pin Descriptions/Functions
Pin
Name
Description
A1
OVP
A2
ILED3
Input Terminal to High Voltage Current Sink #3 (40V max). The boost converter regulates the
minimum of ILED1, ILED2, or ILED3 to 0.4V.
A3
ILED2
Input Terminal to High Voltage Current Sink #2 (40V max). The boost converter regulates the
minimum of ILED1, ILED2, or ILED3 to 0.4V.
A4
ILED1
Input Terminal to High Voltage Current Sink #1 (40V max). The boost converter regulates the
minimum of ILED1, ILED2, or ILED3 to 0.4V.
B1
ALS1
Ambient Light Sensor Input 1.
B2
ALS2
Ambient Light Sensor Input 2.
B3
HWEN
Active High Hardware Enable. Pull this pin high to enable the LM3532. HWEN is a high
impedance input.
B4
IN
Input Voltage Connection. Bypass IN to GND with a minimum 2.2 µF ceramic capacitor.
C1
PWM2
External PWM Brightness Control Input 2.
C2
PWM1
External PWM Brightness Control Input 1.
C3
INT
C4
GND
Ground
D1
SDA
Serial Data Connection for I2C-Compatible Interface
D2
SCL
Serial Clock Connection for I2C-Compatible Interface
Output Voltage Sense Connection for Over Voltage Sensing. Connect OVP to the positive
terminal of the output capacitor.
Programmable Interrupt Pin. INT is an open drain output that pulls low when the ALS changes
zones.
D3
T0
Unused test input. This pin must be tied externally to GND for proper operation.
D4
SW
Drain Connection for boost converters internal NFET
Copyright © 1999-2012, Texas Instruments Incorporated
3
LM3532
Absolute Maximum Ratings (Note 1, Note 2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for
availability and specifications.
VIN to GND
VSW, VOVP, VILED1, VILED2, VILED3
to GND
VSCL, VSDA, VALS1, VALS2, VPWM1,
VPWM2, VINT, VHWEN, VT0 to GND
Continuous Power Dissipation
Junction Temperature (TJ-MAX)
Storage Temperature Range
Maximum Lead Temperature
(Soldering, 10s) (Note 3)
ESD Rating
Human Body Model (Note
9)
Operating Ratings
−0.3V to +6V
−0.3V to +45V
−0.3V to +6V
Internally Limited
+150°C
−65°C to +150°C
+300°C
2.0 kV
(Note 1, Note 2)
VIN to GND
VSW, VOVP, VILED1, VILED2,
VILED3 to GND
Junction Temperature Range
(TJ)(Note 4, Note 5)
2.7V to 5.5V
0 to +40V
−40°C to +125°C
Thermal Properties
Thermal Resistance Junction
to Ambient (TJA)(Note 6)
61.3°C/W
ESD Caution Notice
National Semiconductor recommends that all integrated circuits be handled with appropriate ESD precautions. Failure to observe
proper ESD handling techniques can result in damage to the device.
Electrical Characteristics
(Note 2, Note 7)
Limits in standard type face are for TA = +25°C and those in boldface type apply over the full operating ambient temperature range
(−30°C ≤ TA ≤ +85°C). Unless otherwise specified VIN = 3.6V.
Symbol
ILED(1/2/3)
IMATCH (Note 10),
Parameter
Output Current Regulation
Accuracy (ILED1, ILED2 or
ILED3)
ILED2 to ILED3 Current Matching
(Note 11)
4
Conditions
Min
Typ
Max
Units
2.7V ≤ VIN ≤ 5.5V, ControlX FullScale Current Register = 0xF3,
Brightness Code = 0xFF
18.68
20.2
21.8
mA
2.7V ≤ VIN ≤ 5.5V
−2
0.3
2
%
VREG_CS
Regulated Current Sink
Headroom Voltage
VHR
Current Sink Minimum
Headroom Voltage
ILED = 95% of nominal, ILED = 20.2
mA
200
RDSON
NMOS Switch On Resistance
ISW = 100 mA
0.25
ICL
NMOS Switch Current Limit
2.7V ≤ VIN ≤ 5.5V
880
1000
1120
VOVP
Output Over-Voltage Protection
ON Threshold, 2.7V ≤ VIN ≤ 5.5V
40
41
42
fSW
Switching Frequency
DMAX
Maximum Duty Cycle
94
%
DMIN
Minimum Duty Cycle
10
%
IQ
Quiescent Current into IN, Device ILED1 = ILED2 = ILED3 = 20.2
Not Switching
mA, feedback disabled.
490
µA
400
Hysteresis
2.7V ≤ VIN ≤ 5.5V
mV
240
Ω
1
450
500
mV
550
mA
V
kHz
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Symbol
Parameter
Conditions
IQ_SW
Switching Supply Current
ILED1 = ILED2 = ILED3 = 20 mA,
VOUT = 32V
ISHDN
Shutdown Current
2.7V ≤ VIN ≤ 5.5V, HWEN = GND
ILED_MIN
Full-Scale Current =20.2 mA
Minimum LED Current in ILED1,
Brightness code = 0x01, Mapping
ILED2 or ILED3
= Exponential
TSD
Min
Typ
Max
1.35
1
mA
2
9.5
Thermal Shutdown
µA
µA
+140
Hysteresis
Units
°C
15
LOGIC INPUTS/OUTPUTS (PWM1, PWM2, HWEN, SCL, SDA, INT)
VIL
Input Logic Low
2.7V ≤ VIN ≤ 5.5V
0
0.4
VIH
Input Logic High
2.7V ≤ VIN ≤ 5.5V
1.2
VIN
VOL
Output Logic Low (SCL, INT)
RPWM
PWM Input Internal Pulldown
Resistance (PWM1, PWM2)
2.7V ≤ VIN ≤ 5.5V, ILOAD = 3mA
0.4
100
V
V
kΩ
I2C-COMPATIBLE TIMING SPECIFICATIONS (SCL, SDA, see )
t1
SCL (Clock Period)
2.5
µs
t2
Data In Setup Time to SCL High
100
ns
t3
Data Out Stable After SCL Low
0
ns
t4
SDA Low Setup Time to SCL Low
(Start)
100
ns
SDA High Hold Time After SCL
High (Stop)
100
ns
t5
AMBIENT LIGHT SENSOR INPUTS (ALS1, ALS2)
RALS1, RALS2
ALS Pin Internal Pulldown
Resistors
VALS_REF
ALS1, ALS2 Resistor Select
Register = 0x0F,
2.29
2.44
2.59
kΩ
Ambient Light Sensor Reference
2.7V ≤ VIN ≤ 5.5V
Voltage
1.94
2
2.06
V
VOS
ALS Input Offset Voltage
(Code 0 to 1 transition - VLSB)
0.8
2.5
4.2
mV
tCONV
Conversion Time
LSB
ADC Resolution
Copyright © 1999-2012, Texas Instruments Incorporated
2.7V ≤ VIN ≤ 5.5V
2.7V ≤ VIN ≤ 5.5V
154
2.7V ≤ VIN ≤ 5.5V
7.84
µs
mV
5
LM3532
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended
to be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics
table.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: For detailed soldering specifications and information, please refer to Texas Instruments Application Note 1112: Micro SMD Wafer Level Chip Scale
Package (AN-1112), available at www.national.com.
Note 4: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=+140°C (typ.) and disengages at
TJ=+125°C (typ.).
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = +125°C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA × PD-MAX).
Note 6: Junction-to-ambient thermal resistance (θJA) is taken from a thermal modeling result, performed under the conditions and guidelines set forth in the JEDEC
standard JESD51-7. The test board is a 4-layer FR-4 board measuring 102 mm x 76 mm x 1.6 mm with a 2 x 1 array of thermal vias. The ground plane on the
board is 50 mm x 50 mm. Thickness of copper layers are 36 µm/18 µm/18 µm/36 µm (1.5 oz/1oz/1oz/1.5 oz). Ambient temperature in simulation is 22°C in still
air. Power dissipation is 1W. The value of θJA of this product in the micro SMD package could fall in a range as wide as 60°C/W to 110°C/W (if not wider), depending
on PCB material, layout, and environmental conditions. In applications where high maximum power dissipation exists special care must be paid to thermal
dissipation issues.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Unless otherwise specified, conditions for typical specifications are: VIN = 3.6V and TA = +25°C.
Note 8: SCL and SDA must be glitch-free in order for proper brightness control to be realized.
Note 9: The human body model is a 100 pF capacitor discharged through 1.5 kΩ resistor into each pin. (MIL-STD-883 3015.7).
Note 10: All Current sinks for the matching spec are assigned to the same Control Bank.
Note 11: LED current sink matching between ILED2 and ILED3 is given by taking the difference between either (ILED2 or ILED3) and the average current between
the two, and dividing by the average current between the two (ILED2/3 – ILED(AVE))/ILED(AVE). This simplifies to (ILED2 – ILED3)/(ILED2 + ILED3). In this test,
both ILED2 and ILED3 are assigned to Bank A.
6
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Typical Performance Characteristics
VIN = 3.6V, LEDs (VF = 3.2V@20 mA, TA = 25°C), COUT = 1µF,
CIN = 2.2 µF, L = Coilcraft LPS4018 (10 µH or 22 µH), TA = +25°C unless otherwise specified.
Efficiency vs VIN
Single String, ILED = 20.2mA
L = LPS4018-103ML (10µH)
30115451
Efficiency vs VIN
Dual String, ILED = 20.2mA per string
L = LPS4018-103ML (10µH)
30115453
Efficiency vs VIN
Single String, ILED = 20.2mA
L = LPS4018-103ML (10µH)
30115452
Efficiency vs VIN
Dual String, ILED = 20.2mA per string
L = LPS4018-103ML (10µH)
30115454
Efficiency vs VIN
Triple String, ILED = 20.2mA per string
L = LPS4018-103ML (10µH)
Efficiency vs VIN
Triple String, ILED = 20.2mA per string
L = LPS4018-103ML (10µH)
30115455
30115456
Copyright © 1999-2012, Texas Instruments Incorporated
7
LM3532
Efficiency vs VIN
Single String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
30115457
Efficiency vs VIN
Dual String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
8
Efficiency vs VIN
Single String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
30115458
Efficiency vs VIN
Dual String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
30115459
30115460
Efficiency vs VIN
Triple String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
Efficiency vs VIN
Triple String, ILED = 20.2mA per string
L = LPS4018-223ML (22µH)
30115461
30115462
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Efficiency vs ILED
Triple String, VIN = 3.6V
L = LPS4018-103ML (10µH)
Efficiency vs ILED
Triple String, VIN = 3.6V
L = LPS4018-103ML (10µH)
30115463
Efficiency vs ILED
Triple String, VIN = 3.6V
L = LPS4018-223ML (22µH)
Efficiency vs ILED
Triple String, VIN = 3.6V
L = LPS4018-223ML (22µH)
30115465
Shutdown Current vs VIN
HWEN = GND
30115466
Current Sink Matching vs VIN
ILED2 to ILED3
30115479
Copyright © 1999-2012, Texas Instruments Incorporated
30115464
30115489
9
LM3532
Current Sink Matching vs VIN
ILED1 to ILED2 to ILED3
(ΔILED is worst case difference between all three strings)
ALS Resistance vs VIN
RALS1, (2.44kΩ setting)
30115478
30115482
Integral Non Linearity vs Code
(Endpoint Method)
ALS Resistor Matching vs VIN
(2.44kΩ setting)
30115480
Differential Non Linearity vs Code
30115477
10
30115476
Peak to Peak LED Current Ripple vs fPWM
30115490
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
LED Current vs Headroom Voltage
30115473
Operational Description
40V BOOST CONVERTER
The LM3532 contains a 40V maximum output voltage, asynchronous boost converter with an integrated 250 mΩ switch and three
low-side current sinks. Each low-side current sink is independently programmable from 0 to 30 mA.
HARDWARE ENABLE INPUT
HWEN is the LM3532's global hardware enable input. This pin must be driven high to enable the device. HWEN is a high-impedance
input so cannot be left floating. Typically HWEN would be connected through a pullup resistor to the logic supply voltage or driven
high from a micro controller. Driving HWEN low will place the LM3532 into a low-current shutdown state and force all the internal
registers to their power on reset (POR) states.
FEEDBACK ENABLE
Each current sink can be set for feedback enable or feedback disable. When feedback is enabled, the boost converter maintains
at least 400 mV across each active current sink. This causes the boost output voltage (VOUT) to raise up or down depending on
how many LEDs are placed in series in the highest voltage string. This ensures there is a minimum headroom voltage across each
current sink. The potential drawback is that for large differentials in LED counts between strings, the LED voltage can be drastically
different causing the excess voltage in the lower LED string to be dropped across its current sink. In situations where there are
other voltage sources available, or where the LED count is low enough to use VIN as the power source, the feedback can be
disabled on the specific current sink. This allows for the current sink to be active, but eliminates its control over the boost output
voltage (see Figure 1). In this situation care must be taken to ensure there is always at least 400 mV of headroom voltage across
each active current sink to avoid the current from going out of regulation. Control over the feedback enable/disable is programmable
via the Feedback Enable Register (see Table 13) .
Copyright © 1999-2012, Texas Instruments Incorporated
11
LM3532
30115437
FIGURE 1. LM3532 Feedback Enable/Disable
LM3532 CURRENT SINK CONFIGURATION
Control of the LM3532’s three current sinks is done by configuring the three internal control banks (Control A, Control B, and Control
C) (see Figure 2). Any of the current sinks (ILED1, ILED2, or ILED3) can be mapped to any of the three control banks. Configuration
of the control banks is done via the Output Configuration register.
30115414
FIGURE 2. LM3532 Functional Control Diagram
12
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
PWM INPUTS
The LM3532 provides two PWM inputs (PWM1 and PWM2) which can be mapped to any of the three Control Banks. PWM input
mapping is done through the Control A PWM Configuration register, the Control B PWM Configuration register, and the Control C
PWM Configuration register.
Both PWM inputs (PWM1 and PWM2) feed into internal level shifters and lowpass filters. This allows the PWM inputs to accept
logic level signals and convert them to analog control signals which can control the assigned Control Banks LED current. The
internal lowpass filter at each PWM input has a typical corner frequency of 540 Hz with a Q of 0.5. This gives a low end useful
PWM frequency of around 2kHz. Frequencies lower then this will cause the LED current to show larger ripple and result in nonlinear behavior vs. duty cycle due to the response time of the boost circuit. The upper boundary of the PWM frequency is greater
than 100 kHz. Frequencies above 200 kHz will begin to show non linear behavior due to propagation delays through the PWM
input circuitry.
FULL-SCALE LED CURRENT
There are 32 programmable full-scale current settings for each of the three control banks (Control A, Control B, and Control C).
Each control bank has its own independent full-scale current setting (ILED_FULL_SCALE). Full-scale current for the respective Control
Bank is set via the Control A Full-Scale Current Register, the Control B Full-Scale Current Register, and the Control C Full-Scale
Current Register (see Table 12).
LED CURRENT RAMPING
The LM3532 provides 4 methods to control the rate of rise or fall of the LED current during these events:
1. Startup from 0 to the initial target
2. Shutdown
3. Ramp up from one brightness level to the next
4. Ramp down from one brightness level to the next
See Table 4 and Table 5.
STARTUP AND SHUTDOWN CURRENT RAMPING
The startup and shutdown ramp rates are independently programmable in the startup/Shutdown Ramp Rate Register (see Table
4). There are 8 different startup and 8 different shutdown ramp rates. The startup ramp rates are independently programmable
from the shutdown ramp rates, but not independently programmable for each Control Bank. For example, programming a startup
or shutdown ramp rate, programs the same ramp rate for each Control Bank.
RUN TIME RAMP RATES
Current ramping from one brightness level to the next is programmed via the Run Time Ramp Rate Register (see Table 5). There
are 8 different ramp-up and 8 different ramp-down rates. The ramp-up rate is independently programmable from the ramp-down
rate, but not independently programmable for each Control Bank. For example, programming a ramp-up or a ramp-down rate
programs the same rate for each Control Bank.
LED CURRENT MAPPING MODES
All LED current brightness codes are 8 bits (256 different levels), where each bit represents a percentage of the programmed fullscale current setting for that particular Control Bank. The percentage of the full-scale current is different depending on which
mapping mode is selected. The mapping mode can be either exponential or linear. Mapping mode is selected via bit [1] of the
Control A, B, or C Brightness Configuration Registers.
EXPONENTIAL CURRENT MAPPING MODE
In exponential mapping mode, the backlight code to LED current approximates the following equation:
where Code is the 8-bit code in the programmed brightness register and DPWM is the duty cycle of the PWM input that is assigned
to the particular control bank. For the exponential mapped mode (Figure 3) shows the typical response of % full-scale current setting
vs 8-bit brightness code.
Copyright © 1999-2012, Texas Instruments Incorporated
13
LM3532
30115493
FIGURE 3. Exponential Mapping Response
LINEAR CURRENT MAPPING
In linear mapping mode the backlight code to LED current approximates the following equation:
where Code is the 8-bit code in the programmed brightness register and DPWM is the duty cycle of the PWM input that is assigned
to the particular control bank. For the linear mapped mode (Figure 4) shows the typical response of % full-scale current setting vs
8-bit brightness code.
30115494
FIGURE 4. Linear Mapping Response
LED CURRENT CONTROL
Once the Full-Scale Current is set, control of the LM3532’s LED current can be done via 2 methods:
1. I2C Current Control
2. Ambient Light Sensor Current Control
I2C current control allows for the direct control of the LED current by writing directly to the specific brightness register. In ambient
light sensor current control the LED current is automatically set by the ambient light sensor interface.
I2C CURRENT CONTROL
I2C Current Control is accomplished by using one of the Zone Target Registers (for the respective Control Bank) as the brightness
register. This is done via bits[4:2] of the Control (A, B, or C) Brightness Registers (see Table 9, Table 10, and Table 11). For
14
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
example, programming bits[4:2] of the Control A Brightness Register with (000) makes the brightness register for Bank A (in I2C
Current Control) the Control A Zone Target 0 Register.
I2C CURRENT CONTROL WITH PWM
I2C Current Control can also incorporate the PWM duty cycle at one of the PWM inputs (PWM1 or PWM2). In this situation the LED
current is then a function of both the code in the programmed brightness register and the duty cycle input into the assigned PWM
inputs (PWM1 or PWM2).
ASSIGNING and ENABLING A PWM INPUT
To make the backlight current a function of the PWM input duty cycle, one of the PWM inputs must first be assigned to a particular
Control Bank. This is done via bit [0] of the Control A, B, or C PWM Registers (see Table 6, Table 7, or Table 8). After assigning a
PWM input to a Control Bank, the PWM input is then enabled via bits [6:2] of the Control A/B/C PWM Enable Registers. Each
enable bit is associated with a specific Zone Target Register in I2C Current Control. For example, if Control A Zone Target 0 Register
is configured as the brightness register, then to enable PWM for that brightness register, Control A PWM bit [2] would be set to 1.
ENABLING A CURRENT SINK
Once the brightness register and PWM inputs are configured in I2C Current Control, the current sinks assigned to the specific
control bank are enabled via the Control Enable Register (see Table 14). Table 1 below shows the possible configurations for
Control Bank A in I2C Current Control. This table would also apply to Control Bank B and Control Bank C.
TABLE 1. I2C Current Control + PWM Bit Settings (For Control Bank A)
Current Sink
Assignment
Output Configuration
Register
Bits[1:0] = 00, assigns
ILED1 to Control Bank A
Bits[3:2] = 00 assigns
ILED2 to Control Bank A
Bits[5:4] = 00, assigns
ILED3 to Control Bank A
Brightness Register
Control A Brightness
Configuration
Register Bits [4:2]
000 selects Control A
Zone Target 0 as
brightness register
001 selects Control A
Zone Target 1
brightness register
010 selects Control A
Zone Target 2
brightness register
011 selects Control A
Zone Target 3
brightness register
1XX selects Control A
Zone Target 4
brightness register
PWM Select
Control A PWM
Register Bit[0]
0 selects PWM1
1 selects PWM2
PWM Enable
Control A PWM Register
Bit[2] is PWM enable when
Control A Zone Target 0 is
configured as the brightness
register
Bit[3] is PWM enable when
Control A Zone Target 1 is
configured as the brightness
register
Bit[4] is PWM enable when
Control A Zone Target 2 is
configured as the brightness
register
Bit[5] is PWM enable when
Control A Zone Target 3 is
configured as the brightness
register
Bit[6] is PWM enable when
Control A Zone Target 4 is
configured as the brightness
register
Current Sink Enable
Control Enable
Register Bit [0]
0 = Bank A Disabled
1 = Bank A Enabled
AMBIENT LIGHT SENSOR CURRENT CONTROL
In Ambient Light Sensor (ALS) Current Control the LM3532’s backlight current is automatically set based upon the voltage at the
ambient light sensor inputs (ALS1 and/or ALS2). These inputs are designed to connect to the outputs of analog ambient light
sensors. Each ALS input has an active input voltage range of 0 to 2V.
ALS LIGHT SENSOR RESISTORS
The LM3532 offers 32 separate programmable internal resistors at the ALS1 and ALS2 inputs. These resistors take the ambient
light sensor's output current and convert it into a voltage. The value of the resistor selected is typically chosen such that the ambient
light sensors output voltage swing goes from 0 to 2V across the intended measured ambient light (LUX) range. The ALS resistor
values are programmed via the ALS1 and ALS2 Resistor select registers (see Table 15). The code to resistor selection (assuming
a 2V full-scale voltage range) is shown in the following equation:
Each higher code in the specific ALS Resistor Select Register increases the allowed ALS sensor current by 54 µA ( for a 2V fullscale). When the ALS is disabled (ALS Configuration Register bit [3] = 0) the ALS inputs are set to a high impedance mode no
Copyright © 1999-2012, Texas Instruments Incorporated
15
LM3532
matter what the ALS resistor selection is. Alternatively, ALS Resistor Select Register Code 00000 will set the specific ALS input to
high impedance.
AMBIENT LIGHT ZONE BOUNDARIES
The LM3532 provides 5 ambient light brightness zones which are defined by 4 Zone Boundary Registers. The LM3532 has one
set of zone boundary registers that is shared globally by all Control Banks. As the voltage at the ALS input changes in response
to the ambient light sensors received light, the ALS voltage transitions through the 5 defined brightness zones. Each brightness
zone can be assigned a brightness target via the 5 Zone Target registers. Each Control Bank has its own set of Zone Target
registers. Therefore, in response to changes in a Brightness Zone at the ALS input, the LED current can transition to a new
brightness level. This allows for backlit LCD displays to reduce the LED Current when the ambient light is dim or increase the LED
current when the ambient light increases. Each Zone Boundary register is 8 bits with a full-scale voltage of 2V. This gives a 2V/
255 = 7.8 mV per bit. Figure 5 describes the ambient light to brightness mapping.
30115408
FIGURE 5. Ambient Light Input to Backlight Mapping
AMBIENT LIGHT ZONE HYSTERESIS
For each Zone Boundary there are two Zone Boundary Registers: a Zone Boundary High Register and a Zone Boundary Low
Register. The difference between the Zone Boundary High and Zone Boundary Low Register set points (for a specific zone) creates
the hysteresis that is required to transition between two adjacent zones. This hysteresis prevents the backlight current from oscillating between zones when the ALS voltage is close to a Zone Boundary Threshold. Figure 6 describes this Zone Boundary
Hysteresis. The arrows indicate the direction of the ALS input voltage. The black dots indicate the threshold used when transitioning
to a new zone.
16
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
30115410
FIGURE 6. ALS Zone Boundaries + Hysteresis
PWM ENABLED FOR A PARTICULAR ZONE
The active PWM input for a specified Control Bank can be enabled/disabled for each ALS Brightness Zone. This is done via bits
[6:2] of the corresponding Control A, B, or C PWM Registers (see Table 6, Table 7, and Table 8). For example, assuming Control
Bank A is being used, then to make the PWM input active in Zones 0, 2, and 4, but not active in Zones 1, and 3, bits[6:2] of the
Control A PWM Register would be set to (1, 0, 1, 0, 1).
ALS OPERATION
Figure 7 shows a functional block diagram of the LM3532's ambient light sensor interface.
30115425
FIGURE 7. ALS Functional Block Diagram
Copyright © 1999-2012, Texas Instruments Incorporated
17
LM3532
ALS INPUT SELECT and ALS ADC INPUT
The internal 8-bit ADC digitizes the active ambient light sensor inputs (ALS1 or ALS2). The active ALS input is determined by the
bit settings of the ALS input select bits, bits [7:6] in the ALS Configuration register. The active ALS input can be the average of
ALS1 and ALS2, the maximum of ALS1 and ALS2, ALS1 only, or ALS2 only. Once the ALS input select stage selects the active
ALS input, the result is sent to the internal 8-bit ADC. For example, if the active ALS input select is set to be the average of ALS1
and ALS2, then the voltage at ALS1 and ALS2 is first averaged, then applied to the ADC. The output of the ADC (ADC Register)
will be the digitized average value of ALS1 and ALS2.
The LM3532's internal ADC samples at 7.143 ksps. ADC timing is shown in Figure 8. When the ALS is Enabled (ALS Configuration
Register bit [3] = 1) the ADC begins sampling and converting the active ALS input. Each conversion takes 140 µs. After each
conversion the ADC register is updated with new data.
30115488
FIGURE 8. ADC Timing
ALS ADC READBACK
The digitized value of the LM3532's ADC is read back from the ADC Readback Register. Once the ALS is enabled the ADC begins
converting the active ALS input and updating the ALS Readback Register every 140 µs. The ADC Readback register contains the
updated data after each conversion.
ALS AVERAGING
ALS averaging is used to filter out any fast changes in the ambient light sensor inputs. This prevents the backlight current from
constantly changing due to rapid fluctuations in the ambient light. There are 8 separate averaging periods available for the ALS
inputs (see Table 17). During an average period the ADC continually samples at 7.143 ksps. Therefore, during an average period,
the ALS Averager output will be the average of 7143/tAVE.
ALS ADC AVERAGE READBACK
The output of the LM3532's averager is read back via the Average ADC Register. This data is the ADC register data, averaged
over the programmed ALS average time.
INITIALIZING THE ALS
On initial startup of the ALS Block, the Ambient Light Zone will default to Zone 0. This allows the ALS to start off in a predictable
state. The drawback is that Zone 0 is often not representative of the true ALS Brightness Zone since the ALS inputs can get to their
ambient light representative voltage much faster then the backlight is allowed to change. In order to avoid a multiple average time
wait for the backlight current to get to its correct state, the LM3532 switches over to a fast average period (1.1 ms) on ALS startup.
This will quickly bring the ALS Brightness Zone (and the backlight current) to its correct setting (see Figure 9).
18
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
30115413
FIGURE 9. ALS Startup Sequence
ASL OPERATION
The LM3532's Ambient Light Sensor Interface has 3 different algorithms that can be used to control the ambient light to backlight
current response.
ALS Algorithms
1. Direct ALS Control
2. Down Delay
For each algorithm, the ALS follows these basic rules:
ALS Rules
1. For the ALS Interface to force a change in the backlight current (to a higher zone target), the averager output must have shown
an increase for 3 consecutive average periods, or an increase and a remain at the new zone for 3 consecutive average periods.
2. For the ALS Interface to force a change in the backlight current (to a lower zone target), the averager output must have shown
a decrease for 3 consecutive average periods, or a decrease and remain at the new zone for 3 consecutive average periods.
3. If condition #1 or #2 is satisfied, and during the next average period, the averager output changes again in the same direction
as the last change, the LED current will immediately change at the beginning of the next average period.
4. If condition #1 or #2 is satisfied and the next average period shows no change in the average zone, or shows a change in the
opposite direction, then the criteria in step #1 or #2 must be satisfied again before the ALS interface can force a change in the
backlight current.
5. The Averager Output (see Figure 7) contains the zone that is determined from the most recent full average period.
6. The ALS Interface only forces a change in the backlight current at the beginning of an average period.
7. When the ALS forces a change in the backlight current the change will be to the brightness target pointed to by the zone in
the Averager Output.
DIRECT ALS CONTROL
In direct ALS control the LM3532’s ALS Interface can force the backlight current to either a higher zone target or a lower zone
target using the rules described in the ALS Rules section.
In the example of Figure 10 the plot shows the ALS voltage, the current average zone which is the zone determined by averaging
the ALS voltage in the current average period, the Averager Output which is the zone determined from the previous full average
period, and the target backlight current that is controlled by the ALS Interface. The following steps detail the Direct ALS algorithm:
1. When the ALS is enabled the ALS fast startup (1.1ms average period) quickly brings the Averager Output to the correct zone.
This takes 3 fast average periods or approximately 3.3ms.
2. The 1st average period the ALS voltage averages to Zone 4.
Copyright © 1999-2012, Texas Instruments Incorporated
19
LM3532
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
The 2nd average period the ALS voltage averages to Zone 3.
The 3rd average period the ALS voltage averages to Zone 3 and the Averager Output shows a change from Zone 4 to Zone
3.
The 4th average period the ALS voltage averages to Zone 2 and the Averager Output remains at its changed state of Zone 3.
The 5th average period the ALS voltage averages to Zone 1. The Averager Output shows a change from Zone 3 to Zone 2.
Since this is the 3rd average period that the Averager Output has shown a change in the decreasing direction from the initial
Zone 4, the backlight current is forced to change to the current Averager Output (Zone 2's) target current.
The 6th average period the ALS voltage averages to Zone 2. The Averager Output changes from Zone 2 to Zone 1. Since this
is in the same direction as the previous change, the backlight current is forced to change to the current Averager Output (Zone
1's) target current.
The 7th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 1 to Zone 2. Since this
change is in the opposite direction from the previous change, the backlight current remains at Zone 1's target.
The 8th average period the ALS voltage averages to Zone 3. The Averager Output changes from Zone 2 to Zone 3.
The 9th average period the ALS voltage averages to Zone 3. The Averager Output remains at Zone 3. Since this is the 3rd
average period that the Averager Output has shown a change in the increasing direction from the initial Zone 1, the backlight
current is forced to change to the current Averager Output (Zone 3's) target current.
The 10th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 3.
The 11th average period the ALS voltage averages to Zone 4. The Averager Output changes to Zone 4.
The 12th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4.
The 13th average period the ALS voltage averages to Zone 4. The Averager Output remains at Zone 4. Since this is the 3rd
average period that the Averager Output has shown a change in the increasing direction from the initial Zone 3, the backlight
current is forced to change to the current Averager Output (Zone 4's) target current.
30115434
FIGURE 10. Direct ALS Control
20
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
DOWN DELAY
The Down-Delay algorithm uses all the same rules from the ALS Rules section, except it provides for adding additional average
period delays required for decreasing transitions of the Averager Output, before the LED current is programmed to a lower zone
target current. The additional average period delays are programmed via the ALS Down Delay register. The register provides 32
settings for increasing the down delay from 3 extra (code 00000) up to 34 extra (code 11111). For example, if the down delay
algorithm is enabled, and the ALS Down Delay register were programmed with 0x00 (3 extra delays), then the Averager Output
would need to see 6 consecutive changes in decreasing Zones (or 6 consecutive average periods that changed and remained
lower), before the backlight current was programmed to the lower zones target current. Referring to Figure 11, assume that Down
Delay is enabled and the ALS Down Delay register is programmed with 0x02 (5 extra delays, 8 average period total delay for
downward changes in the backlight target current):
1. When the ALS is enabled the ALS fast startup (1.1 ms average period) quickly brings the Averager Output to the correct zone.
This takes 3 fast average periods or approximately 3.3 ms.
2. The first average period the ALS averages to Zone 3.
3. The second average period the ALS averages to Zone 2. The Averager Output remains at Zone 3.
4. The 3rd through 7th average period the ALS input averages to Zone 2, and the Averager Output stays at Zone 2.
5. The 8th average period the ALS input averages to Zone 4. The Averager Output remains at Zone 2.
6. The 9th and 10th average periods the ALS input averages to Zone 4. The Averager Output is at Zone 4. Since the Averager
Output increased from Zone 2 to Zone 4 and the required Down Delay time was not met (8 average periods), the backlight
current was never changed to the Zone 2's target current.
7. The 11th average period the ALS input averages to Zone 2. The Averager Output remains at Zone 4. Since this is the 3rd
consecutive average period where the Averager Output has shown a change since the change from Zone 2, the backlight
current transitions to Zone 4's target current.
8. The 12th through 26th average periods the ALS input averages to Zone 2. The Averager Output remains at Zone 2. At the
start of average period #20 the Down Delay algorithm has shown the required 8 average period delay from the initial change
from Zone 4 to Zone 2. As a result the backlight current is programmed to Zone 2's target current.
Copyright © 1999-2012, Texas Instruments Incorporated
21
LM3532
30115409
FIGURE 11. ALS Down-Delay Control
INTERRUPT OUTPUT
INT is an open drain output that pulls low when the ALS is enabled and when one of the ALS inputs transitions into a new zone.
At the same time, the ALS Zone Information register is updated with the current ALS zone, and the software flag (bit 3 of the ALS
Zone Information register) is written high. A readback of the Zone Information Register will clear the software interrupt flag and
reset the INT output to the open drain state. The active pulldown at INT is typically 125Ω.
22
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Protection Features
OVERVOLTAGE PROTECTION
The LM3532’s boost converter provides open-load protection, by monitoring the OVP pin. The OVP pin is designed to connect as
close as possible to the positive terminal of the output capacitor. In the event of a disconnected load (LED current string with
feedback enabled), the output voltage will rise in order to try and maintain the correct headroom across the feedback enabled
current sinks (see Table 13). Once VOUT climbs to the OVP threshold (VOVP) the boost converter is turned off, and switching will
stop until VOUT falls below the OVP hysteresis (VOVP – 1V). Once the OVP hysteresis is crossed the LM3532’s boost converter
begins switching again. In open load conditions this would result in a pulsed on/off operation.
CURRENT LIMIT
The LM3532’s peak current limit in the NFET is set at typically 1A (880 mA min.). During the positive portion of the switching cycle,
if the NFET's current rises up to the current limit threshold, the NFET turns off for the rest of the switching cycle. At the start of the
next switching cycle the NFET turns on again. For loads that cause the LM3532 to hit current limit each switching cycle, the output
power can become clamped since the headroom across the feedback enabled current sinks is no longer being regulated when the
device is in current limit. See MAXIMUM OUTPUT POWER below for guidelines on how peak current affects the LM3532's maximum output power.
MAXIMUM OUTPUT POWER
The LM3532's maximum output power is governed by two factors: the peak current limit (ICL = 880 mA min.), and the maximum
output voltage (VOVP = 40V min.). When the application causes either of these limits to be reached it is possible that the proper
current regulation and matching between LED current strings will not be met.
Peak Current Limited
In the case of a peak current limited situation, when the peak of the inductor current hits the LM3532's current limit the NFET switch
turns off for the remainder of the switching period. If this happens, each switching cycle the LM3532 begins to regulate the peak
of the inductor current instead of the headroom across the current sinks. This can result in the dropout of the feedback-enabled
current sinks and the current dropping below its programmed level.
The peak current in a boost converter is dependent on the value of the inductor, total LED current (IOUT), the output voltage (VOUT)
(which is the highest voltage LED string + 0.4V regulated headroom voltage), the input voltage VIN, and the efficiency (Output
Power/Input Power). Additionally, the peak current is different depending on whether the inductor current is continuous during the
entire switching period (CCM) or discontinuous (DCM) where it goes to 0 before the switching period ends.
For Continuous Conduction Mode the peak inductor current is given by:
For Discontinuous Conduction Mode the peak inductor current is given by:
To determine which mode the circuit is operating in (CCM or DCM) it is necessary to perform a calculation to test whether the
inductor current ripple is less than the anticipated input current (IIN). If ΔIL is < then IIN then the device will be operating in CCM.
If ΔIL is > IIN then the device is operating in DCM.
Typically at currents high enough to reach the LM3532's peak current limit, the device will be operating in CCM.
The following figures show the output current and voltage derating for a 10 µH and a 22 µH inductor. These plots take equations
(1) and (2) from above and plot VOUT and IOUT with varying VIN, a constant peak current of 880 mA (ICL min), and a constant
efficiency of 85%. Using these curves can give a good design guideline on selecting the correct inductor for a given output power
requirement. A 10 µH will typically be a smaller device with lower on resistance, but the peak currents will be higher. A 22 µH
provides for lower peak currents, but to match the DC resistance of a 10 µH requires a larger sized device.
Copyright © 1999-2012, Texas Instruments Incorporated
23
LM3532
30115475
30115483
FIGURE 12. Maximum Output Power (22 µH)
30115427
30115433
FIGURE 13. Maximum Output Power (10 µH)
Output Voltage Limited
When the LM3532's output voltage (highest voltage LED string + 400 mV headroom voltage) reaches 40V, the OVP threshold is
hit, and the NFET turns off and remains off until the output voltage drops 1V below the OVP threshold. Once VOUT falls below this
hysteresis, the boost converter will turn on again. In high output voltage situations the LM3532 will begin to regulate the output
voltage to the VOVP level instead of the current sink headroom voltage. This can result in a loss of headroom voltage across the
feedback enabled current sinks resulting in the LED current dropping below its programmed level.
24
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
I2C-Compatible Interface
START AND STOP CONDITION
The LM3532 is controlled via an I2C-compatible interface. START and STOP conditions classify the beginning and the end of the
I2C session. A START condition is defined as SDA transitioning from HIGH-to-LOW while SCL is HIGH. A STOP condition is defined
as SDA transitioning from LOW-to-HIGH while SCL is HIGH. The I2C master always generates the START and STOP conditions.
The I2C bus is considered busy after a START condition and free after a STOP condition. During data transmission, the I2C master
can generate repeated START conditions. A START and a repeated START conditions are equivalent function-wise. The data on
SDA must be stable during the HIGH period of the clock signal (SCL). In other words, the state of SDA can only be changed when
SCL is LOW.
30115403
FIGURE 14. Start and Stop Sequences
I2C-Compatible Address
The 7-bit chip address for the LM3532 is (0x38) . After the START condition, the I2C master sends the 7-bit chip address followed
by an eighth bit (LSB) read or write (R/W). R/W = 0 indicates a WRITE and R/W = 1 indicates a READ. The second byte following
the chip address selects the register address to which the data will be written. The third byte contains the data for the selected
register.
30115438
FIGURE 15. I2C-Compatible Chip Address (0x38)
Transferring Data
Every byte on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte of data must be
followed by an acknowledge bit (ACK). The acknowledge related clock pulse (9th clock pulse) is generated by the master. The
master then releases SDA (HIGH) during the 9th clock pulse. The LM3532 pulls down SDA during the 9th clock pulse, signifying
an acknowledge. An acknowledge is generated after each byte has been received.
Copyright © 1999-2012, Texas Instruments Incorporated
25
LM3532
LM3532 Register Descriptions
TABLE 2. LM3532 Register Descriptions
Name
I2C Address
26
Address
Power On Reset
0x38 (7 bit), 0x70 for Write and 0x71 for Read
Output Configuration
0x10
0xE4
Startup/Shutdown Ramp Rate
0x11
0xC0
Run Time Ramp Rate
0x12
0xC0
Control A PWM
0x13
0x82
Control B PWM
0x14
0x82
Control C PWM
0x15
0x82
Control A Brightness
0x16
0xF1
Control A Full-Scale Current
0x17
0xF3
Control B Brightness
0x18
0xF1
Control B Full-Scale Current
0x19
0xF3
Control C Brightness
0x1A
0xF1
Control C Full-Scale Current
0x1B
0xF3
Feedback Enable
0x1C
0xFF
Control Enable
0x1D
0xF8
ALS1 Resistor Select
0x20
0xE0
ALS2 Resistor Select
0x21
0xE0
ALS Down Delay
0x22
0xE0
ALS Configuration
0x23
0x44
ALS Zone Information
0x24
0xF0
ALS Brightness Zone
0x25
0xF8
ADC
0x27
0x00
ADC Average
0x28
0x00
ALS Zone Boundary 0 High
0x60
0x35
ALS Zone Boundary 0 Low
0x61
0x33
ALS Zone Boundary 1 High
0x62
0x6A
ALS Zone Boundary 1 Low
0x63
0x66
ALS Zone Boundary 2 High
0x64
0xA1
ALS Zone Boundary 2 Low
0x65
0x99
ALS Zone Boundary 3 High
0x66
0xDC
ALS Zone Boundary 3 Low
0x67
0xCC
Control A Zone Target 0
0x70
0x33
Control A Zone Target 1
0x71
0x66
Control A Zone Target 2
0x72
0x99
Control A Zone Target 3
0x73
0xCC
Control A Zone Target 4
0x74
0xFF
Control B Zone Target 0
0x75
0x33
Control B Zone Target 1
0x76
0x66
Control B Zone Target 2
0x77
0x99
Control B Zone Target 3
0x78
0xCC
Control B Zone Target 4
0x79
0xFF
Control C Zone Target 0
0x7A
0x33
Control C Zone Target 1
0x7B
0x66
Control C Zone Target 2
0x7C
0x99
Control C Zone Target 3
0x7D
0xCC
Control C Zone Target 4
0x7E
0xFF
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
OUTPUT CONFIGURATION
This register configures how the three control banks are routed to the current sinks (ILED1, ILED2, ILED3)
TABLE 3. Output Configuration Register Description (Address 0x10)
Bits [5:4]
ILED3 Control
Bits [3:2]
ILED2 Control
Bits [1:0]
ILED1 Control
00 = ILED3 is controlled by Control
A PWM and Control A Brightness
Registers (default)
01 = ILED3 is controlled by Control
B PWM and Control B Brightness
Registers
1X = ILED3 is controlled by Control
C PWM and Control C Brightness
Registers
00 = ILED2 is controlled by Control A
PWM and Control A Brightness
Registers (default)
01 = ILED2 is controlled by Control B
PWM and Control B Brightness
Registers
1X = ILED2 is controlled by Control C
PWM and Control C Brightness
Registers
00 = ILED1 is controlled by Control A
PWM and Control A Brightness
Registers (default)
01 = ILED1 is controlled by Control B
PWM and Control B Brightness
Registers
1X = ILED1 is controlled by Control
C PWM and Control C Brightness
Registers
Bit [7:6]
Not Used
STARTUP/SHUTDOWN RAMP RATE
This register controls the ramping of the LED current in current sinks ILED1, ILED2, and ILED3 during startup and shutdown. The
startup ramp rates/step are from when the device is enabled via I2C to when the target current is reached. The Shutdown ramp
rates/step are from when the device is shut down via I2C until the LED current is 0. To start up and shut down the current sinks via
I2C, see the Control Enable Register.
TABLE 4. Startup/Shutdown Ramp Rate Register Description (Address 0x11)
Bits [7:6]
Not Used
Bits [5:3]
Shutdown Ramp
000 = 8µs/step (2.048ms from Full-Scale to 0)
(default)
001 = 1.024 ms/step (261 ms)
010 = 2.048 ms/step (522 ms)
011 = 4.096 ms/step (1.044s)
100 = 8.192 ms/step (2.088s)
101 = 16.384 ms/step (4.178s)
110 = 32.768 ms/step (8.356s)
111 = 65.536 ms/step (16.711s)
Bits [2:0]
Startup Ramp
000 = 8µs/step (2.048ms from Full-Scale to 0)
(default)
001 = 1.024 ms/step (261ms)
010 = 2.048 ms/step (522ms)
011 = 4.096 ms/step (1.044s)
100 = 8.192 ms/step (2.088s)
101 = 16.384 ms/step (4.178s)
110 = 32.768 ms/step (8.356s)
111 = 65.536 ms/step (16.711s)
RUN TIME RAMP RATE
This register controls the ramping of the current in current sinks ILED1, ILED2, and ILED3. The Run Time ramp rates/step are from
one current set-point to another after the device has reached its initial target set point from turn-on.
TABLE 5. Run Time Ramp Rate Register Description (Address 0x12)
Bits [7:6]
Not Used
Bits [5:3]
Ramp Down
000 = 8µs/step (default)
001 = 1.024 ms/step
010 = 2.048 ms/step
011 = 4.096 ms/step
100 = 8.192 ms/step
101 = 16.384 ms/step
110 = 32.768 ms/step
111 = 65.536 ms/step
Copyright © 1999-2012, Texas Instruments Incorporated
Bits [2:0]
Ramp Up
000 = 8µs/step (default)
001 = 1.024 ms/step
010 = 2.048 ms/step
011 = 4.096 ms/step
100 = 8.192 ms/step
101 = 16.384 ms/step
110 = 32.768 ms/step
111 = 65.536 ms/step
27
LM3532
CONTROL A PWM
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank A and which zones the selected PWM
input is active in.
TABLE 6. Control A PWM Register Description (Address 0x13)
Bit 7
N/A
Not Used
Bit 6
Zone 4 PWM
Enable
Bit 5
Zone 3 PWM
Enable
Bit 2
Bit 2
Zone 2 PWM Zone 1 PWM
Enable
Enable
Bit 2
Zone 0 PWM
Enable
Bit 1
PWM Input
Polarity
0 = Active
PWM input is
disabled in
Zone 4
(default)
1 = Active
PWM input is
enabled in
Zone 4
0 = Active PWM
input is disabled
in Zone 3
(default)
0 = Active
PWM input is
disabled in
Zone 2
(default)
1 = Active
PWM input is
enabled in
Zone 2
0 = Active PWM
input is
disabled in
Zone 0
(default)
1 = Active PWM
input is enabled
in Zone 0
0 = active low 0 = PWM1
polarity
input is
mapped to
Control Bank
A (default)
1 = active high 1 = PWM2 is
polarity
mapped to
(default)
Control Bank
A
1 = Active PWM
input is enabled
in Zone 3
0 = Active
PWM input is
disabled in
Zone 1
(default)
1 = Active
PWM input is
enabled in
Zone 1
Bit 0
PWM Select
CONTROL B PWM
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank B and which zones the selected PWM
input is active in.
TABLE 7. Control B PWM Register Description (Address 0x14)
Bit 7
N/A
Not Used
Bit 6
Zone 4 PWM
Enable
Bit 5
Zone 3 PWM
Enable
0 = Active PWM
input is
disabled in
Zone 4
(default)
1 = Active PWM
input is enabled
in Zone 4
0 = Active PWM
input is disabled
in Zone 3
(default)
Bit 2
Bit 2
Zone 2 PWM Zone 1 PWM
Enable
Enable
0 = Active
PWM input is
disabled in
Zone 2
(default)
1 = Active PWM 1 = Active
input is enabled PWM input is
in Zone 3
enabled in
Zone 2
0 = Active
PWM input is
disabled in
Zone 1
(default)
1 = Active
PWM input is
enabled in
Zone 1
Bit 2
Zone 0 PWM
Enable
Bit 1
PWM Input
Polarity
Bit 0
PWM Select
0 = Active PWM
input is
disabled in
Zone 0
(default)
1 = Active PWM
input is enabled
in Zone 0
0 = active low 0 = PWM1
polarity
input is
mapped to
Control Bank
B (default)
1 = active high 1 = PWM2 is
polarity
mapped to
(default)
Control Bank
B
CONTROL C PWM
This register configures which PWM input (PWM1 or PWM2) is mapped to Control Bank C and which zones the selected PWM
input is active in.
TABLE 8. Control C PWM Register Description (Address 0x15)
Bit 7
N/A
Not Used
28
Bit 6
Zone 4 PWM
Enable
Bit 5
Zone 3 PWM
Enable
0 = Active PWM
input is
disabled in
Zone 4
(default)
1 = Active PWM
input is enabled
in Zone 4
0 = Active PWM
input is disabled
in Zone 3
(default)
Bit 2
Bit 2
Zone 2 PWM Zone 1 PWM
Enable
Enable
0 = Active
PWM input is
disabled in
Zone 2
(default)
1 = Active PWM 1 = Active
input is enabled PWM input is
in Zone 3
enabled in
Zone 2
0 = Active
PWM input is
disabled in
Zone 1
(default)
1 = Active
PWM input is
enabled in
Zone 1
Bit 2
Zone 0 PWM
Enable
Bit 1
PWM Input
Polarity
Bit 0
PWM Select
0 = Active PWM
input is
disabled in
Zone 0
(default)
1 = Active PWM
input is enabled
in Zone 0
0 = active low 0 = PWM1
polarity
input is
mapped to
Control Bank
C (default)
1 = active high 1 = PWM2 is
polarity
mapped to
(default)
Control Bank
C
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
CONTROL A BRIGHTNESS CONFIGURATION
The Control A Brightness Configuration Register has 3 functions:
1. Selects how the LED current sink which is mapped to Control Bank A is controlled (either directly through the I2C or via the
ALS interface)
2. Programs the LED current mapping mode for Control Bank A (Linear or Exponential)
3. Programs which Control A Zone Target Register is the Brightness Register for Bank A in I2C Current Control
TABLE 9. Control A Brightness Configuration Register Description (Address 0x16)
Bits [7:5]
Not Used
Bits [4:2]
Control A Brightness Pointer (I2C
Current Control Only)
Bit 1
LED Current Mapping Mode
Bit 0
Bank A Current Control
N/A
000 = Control A Zone Target 0
001 = Control A Zone Target 1
010 = Control A Zone Target 2
011 = Control A Zone Target 3
1XX = Control A Zone Target 4
(default)
0 = Exponential Mapping
(default)
1 = Linear Mapping
0 = ALS Current Control
1 = I2C Current Control (default)
CONTROL B BRIGHTNESS CONFIGURATION
The Control B Brightness Configuration Register has 3 functions:
1. Selects how the LED current sink which is mapped to Control Bank B is controlled (either directly through the I2C or via the
ALS interface)
2. Programs the LED current mapping mode for Control Bank B (Linear or Exponential)
3. Programs which Control B Zone Target Register is the Brightness Register for Bank B in I2C Current Control
TABLE 10. Control B Brightness Configuration Register Description (Address 0x18)
Bits [7:5]
Not Used
Bits [4:2]
Control A Brightness Pointer (I2C
Current Control Only)
Bit 1
LED Current Mapping Mode
Bit 0
Bank B Current Control
N/A
000 = Control B Zone Target 0
001 = Control B Zone Target 1
010 = Control B Zone Target 2
011 = Control B Zone Target 3
1XX = Control B Zone Target 4
(default)
0 = Exponential Mapping
(default)
1 = Linear Mapping
0 = ALS Current Control
1 = I2C Current Control (default)
CONTROL C BRIGHTNESS CONFIGURATION
The Control C Brightness Configuration Register has 3 functions:
1. Selects how the LED current sink which is mapped to Control Bank C is controlled (either directly through the I2C or via the
ALS interface)
2. Programs the LED current mapping mode for Control Bank C (Linear or Exponential)
3. Programs which Control C Zone Target Register is the Brightness Register for Bank C in I2C Current Control
TABLE 11. Control C Brightness Configuration Register Description (Address 0x1A)
Bits [7:5]
Not Used
Bits [4:2]
Control C Brightness Pointer (I2C
Current Control Only)
Bit 1
LED Current Mapping Mode
Bit 0
Bank C Current Control
N/A
000 = Control C Zone Target 0
001 = Control C Zone Target 1
010 = Control C Zone Target 2
011 = Control C Zone Target 3
1XX = Control C Zone Target 4
(default)
0 = Exponential Mapping
(default)
1 = Linear Mapping
0 = ALS Current Control
1 = I2C Current Control (default)
Copyright © 1999-2012, Texas Instruments Incorporated
29
LM3532
CONTROL A/B/C FULL-SCALE CURRENT
These registers program the full-scale current setting for the current sink(s) assigned to Control Bank A/B/C. Each Control Bank
has its own full-scale current setting (Control Bank A, Address 0x17), (Control Bank B, address 0x19), (Control Bank C, address
0x1B).
TABLE 12. Control A/B/C Full-Scale Current Registers Descriptions (Address 0x17, 0x19, 0x1B)
30
Bits [7:5]
Not Used
Bits [4:0]
Control A/B/C Full-Scale Current Select Bits
N/A
00000 = 5 mA
00001 = 5.8 mA
00010 = 6.6 mA
00011 = 7.4 mA
00100 = 8.2 mA
00101 = 9 mA
00110 = 9.8 mA
00111 = 10.6 mA
01000 = 11.4 mA
01001 = 12.2 mA
01010 = 13 mA
01011 = 13.8 mA
01100 = 14.6 mA
01101 = 15.4 mA
01110 = 16.2 mA
01111 = 17 mA
10000 = 17.8 mA
10001 = 18.6mA
10010 = 19.4 mA
10011 = 20.2 mA (default)
10100 = 21 mA
10101 = 21.8 mA
10110 = 22.6 mA
10111 = 23.4 ma
11000 = 24.2 mA
11001 = 25 mA
11010 = 25.8 mA
11011 = 26.6 mA
11100 = 27.4 mA
11101 = 28.2 mA
11110 = 29 mA
11111 = 29.8 mA
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
FEEDBACK ENABLE
The Feedback Enable Register configures which current sinks are or are not part of the boost control loop.
TABLE 13. Feedback Enable Register Description (Address 0x1C)
Bits [7:3]
Not Used
Bit 2
ILED3 Feedback Enable
Bit 1
ILED2 Feedback Enable
Bit 0
ILED1 Feedback Enable
N/A
0 = ILED3 is not part of the
boost control loop
1 = ILED3 is part of the boost
control loop (default)
0 = ILED2 is not part of the
boost control loop
1 = ILED2 is part of the
boost control loop (default)
0 = ILED1 is not part of the
boost control loop
1 = ILED1 is part of the
boost control loop (default)
CONTROL ENABLE
The Control Enable register contains the bits to turn on/off the individual Control Banks (A, B, or C). Once one of these bits is
programmed high, the current sink(s) assigned to the selected control banks are enabled.
TABLE 14. Control Enable Register Description (Address 0x1D)
Bits (7:3)
(Not Used)
Bit 2
Control C Enable
Bit 1
Bit 0
Control B Enable Control A Enable
N/A
0 = Control C is
disabled (default)
1 = Control C is
enabled
0 = Control B is
disabled (default)
1 = Control B is
enabled
Copyright © 1999-2012, Texas Instruments Incorporated
0 = Control A is
disabled (default)
1 = Control A is
enabled
31
LM3532
ALS1 & 2 RESISTOR SELECT
The ALS Resistor Select Registers program the internal pulldown resistor at the ALS1/ALS2 input. Each ALS input has its own
resistor select register (ALS1 Resistor Select Register, Address 0x20) and (ALS2 Resistor Select Register, Address 0x21). Each
ALS input can be set independent of the other. There are 32 available resistors including a high impedance setting. The full-scale
input voltage range at either ALS input is 2V.
TABLE 15. ALS Resistor Select Register Description (Address 0x20, Address 0x21)
Bit [7:5]
Not Used
Bit [4:0]
ALS1/ALS2 Resistor Select Bits
00000 = High Impedance (default)
00001 = 37 kΩ
00010 = 18.5 kΩ
00011 = 12.33 kΩ
00100 = 9.25 kΩ
00101 = 7.4 kΩ
00110 = 6.17 kΩ
00111 = 5.29 kΩ
01000 = 4.63 kΩ
01001 = 4.11 kΩ
01010 = 3.7 kΩ
01011 = 3.36 kΩ
01100 = 3.08 kΩ
01101 = 2.85 kΩ
01110 = 2.64 kΩ
N/A
01111 = 2.44 kΩ
10000 = 2.31 kΩ
10001 = 2.18 kΩ
10010 = 2.06 kΩ
10011 = 1.95 kΩ
10100 = 1.85 kΩ
10101 = 1.76 kΩ
10110 = 1.68 kΩ
10111 = 1.61 kΩ
11000 = 1.54 kΩ
11001 = 1.48 kΩ
11010 = 1.42 kΩ
11011 = 1.37 kΩ
11100 = 1.32 kΩ
11101 = 1.28 kΩ
11110 = 1.23 kΩ
11111 = 1.19 kΩ
32
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
ALS DOWN DELAY
The ALS Down Delay Register adds additional average time delays for ALS changes in the backlight current during falling ALS
input voltages. Code 00000 adds 3 extra average period delays on top of the 3 default delays (6 total). Code 11111 adds 34 extra
average period delays.
TABLE 16. ALS Down Delay Register Description (Address 0x22)
Bits [7:6]
Not Used
Bit [5]
ALS Fast startup Enable
Bits [4:0]
Down Delay
0 = ALS Fast startup is Disabled
1 = ALS Fast startup is Enabled (default)
N/A
00000 = 6 total Average Period delay for Down
Delay Control (default)
:
:
:
11111 = 34 total Average Periods of Delay for
Down Delay Control
ALS CONFIGURATION
The ALS Configuration register controls the ALS average times, the ALS enable bit, and the ALS input select.
TABLE 17. ALS Configuration Register Description (Address 0x23)
Bits [7:6]
ALS Input Select
00 = Average of ALS1 and
ALS2 is used to determine
backlight current
01 = Only the ALS1 input is
used to determine backlight
current (default)
10 = Only the ALS2 input is
used to determine the
backlight current
11 = The maximum of ALS1
and ALS2 is used to
determine the backlight
current
Bit [5:4]
ALS Control
Bit 3
ALS Enable
Bits [2:0]
ALS Average Time
00 = Direct ALS Control. ALS
0 = ALS is disabled
inputs respond to up and down
(default)
transitions (default)
1 = ALS is enabled
01 = This setting is for a future
mode.
1X = Down Delay Control. Extra
delays of 3 x tAVE to 34 x tAVE are
added for down transitions, before
the new backlight target is
programmed. (see DOWN
DELAY section).
000 = 17.92 ms
001 = 35.84 ms
010 = 71.68 ms
011 = 143.36 ms
100 = 286.72 ms (default)
101 = 573.44 ms
110 = 1146.88 ms
111 = 2293.76 ms
Copyright © 1999-2012, Texas Instruments Incorporated
33
LM3532
ALS ZONE READBACK / INFORMATION
The ALS Zone Readback and ALS Zone Information Readback registers each contain information on the current ambient light
brightness zone. The ALS Zone Readback register contains the ALS Zone after the averager and discriminator block and reflects
both up and down changes in the ambient light brightness zone. The ALS Zone Information register reflects the contents of either
the ALS Zone Readback register (with up and down transition). This register also includes a Zone Change bit (bit 3) which is written
with a 1 each time the ALS zone changes. This bit is cleared upon read back of the ALS Zone Information register.
TABLE 18. ALS Zone Information Register Description (Address 0x24)
Bits [7:4]
Not Used
N/A
Bit 3
Zone Change Bit
0 = No change in ALS Zone (default)
1 = There was a change in the ALS Zone
since the last read of this register. This bit
is cleared on read back.
Bits [2:0]
Brightness Zone
000 = Zone 0 (default)
001 = Zone 1
010 = Zone 2
011 = Zone 3
1XX = Zone 4
TABLE 19. ALS Zone Readback Register Description (Address 0x25)
Bits [7:3]
Not Used
N/A
34
Bits [2:0]
Brightness Zone
000 = Zone 0 (default)
001 = Zone 1
010 = Zone 2
011 = Zone 3
1XX = Zone 4
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
ALS ZONE BOUNDARIES
There are 4 ALS Zone Boundary registers which form the boundaries for the 5 Ambient Light Zones. Each Zone Boundary register
is 8 bits with a maximum voltage of 2V. This gives a step size for each Zone Boundary Register bit of:
ALS Zone Boundary 0 High (Address 0x60), default = 0x35 (415.7 mV)
ALS Zone Boundary 0 Low (Address 0x61), default = 0x33 (400 mV)
ALS Zone Boundary 1 High (Address 0x62), default = 0x6A (831.4 mV)
ALS Zone Boundary 1 Low (Address 0x63), default = 0x66 (800 mV)
ALS Zone Boundary 2 High (Address 0x64), default = 0xA1 (1262.7 mV)
ALS Zone Boundary 2 Low (Address 0x65), default = 0x99 (1200 mV)
ALS Zone Boundary 3 High (Address 0x66), default = 0xDC (1725.5 mV)
ALS Zone Boundary 3 Low (Address 0x67), default = 0xCC (1600 mV)
(See ALS Zone Boundaries + Hysteresis Figure 6)
ZONE TARGET REGISTERS
There are 3 groups of Zone Target Registers (Control A, Control B, and Control C). The Zone Target registers have 2 functions.
In Ambient Light Current control, they map directly to the corresponding ALS Zone. When the active ALS input lands within the
programmed Zone, the backlight current is programmed to the corresponding zone target registers set point (see below).
Control A Zone Target Register 0 maps directly to Zone 0 (Address 0x70)
Control A Zone Target Register 1 maps directly to Zone 1 (Address 0x71)
Control A Zone Target Register 2 maps directly to Zone 2 (Address 0x72)
Control A Zone Target Register 3 maps directly to Zone 3 (Address 0x73)
Control A Zone Target Register 4 maps directly to Zone 4 (Address 0x74)
Control B Zone Target Register 0 maps directly to Zone 0 (Address 0x75)
Control B Zone Target Register 1 maps directly to Zone 1 (Address 0x76)
Control B Zone Target Register 2 maps directly to Zone 2 (Address 0x77)
Control B Zone Target Register 3 maps directly to Zone 3 (Address 0x78)
Control B Zone Target Register 4 maps directly to Zone 4 (Address 0x79)
Control C Zone Target Register 0 maps directly to Zone 0 (Address 0x7A)
Control C Zone Target Register 1 maps directly to Zone 1 (Address 0x7B)
Control C Zone Target Register 2 maps directly to Zone 2 (Address 0x7C)
Control C Zone Target Register 3 maps directly to Zone 3 (Address 0x7D)
Control C Zone Target Register 4 maps directly to Zone 4 (Address 0x7E)
(See Ambient Light Input to Backlight Mapping, Figure 5)
In I2C Current Control, any of the 5 Zone Target Registers for the particular Control Bank can be the LED brightness registers. This
is set according to Control A, B, or C Brightness Configuration Registers (Bits [4:2]).
Copyright © 1999-2012, Texas Instruments Incorporated
35
LM3532
Applications Information
INDUCTOR SELECTION
The LM3532 is designed to work with a 10 µH to 22 µH inductor. When selecting the inductor, ensure that the saturation rating is
high enough to accommodate the applications peak inductor current . The inductance value must also be large enough so that the
peak inductor current is kept below the LM3532's switch current limit. See the MAXIMUM OUTPUT POWER Section for more
details. Table 20 lists various inductors that can be used with the LM3532. The inductors with higher saturation currents are more
suitable for applications with higher output currents or voltages (multiple strings). The smaller devices are geared toward single
string applications with lower series LED counts.
TABLE 20. Inductors
Manufacturer
Part Number
Value
Size
Current
Rating
DC Resistance
TDK
VLS252010T-100M
10 µH
2.5 mm × 2
mm × 1 mm
590 mA
0.712Ω
TDK
VLS2012ET-100M
10 µH
2 mm × 2 mm
× 1.2 mm
695 mA
0.47Ω
TDK
VLF301512MT-100M
10 µH
3.0 mm × 2.5
mm × 1.2mm
690 mA
0.25Ω
TDK
VLF4010ST-100MR80
10 µH
2.8 mm × 3
mm × 1 mm
800 mA
0.25Ω
TDK
VLS252012T-100M
10 µH
2.5 mm × 2
mm × 1.2mm
810 mA
0.63Ω
TDK
VLF3014ST-100MR82
10 µH
2.8 mm × 3
mm × 1.4mm
820 mA
0.25Ω
TDK
VLF4014ST-100M1R0
10 µH
3.8 mm × 3.6
mm × 1.4 mm
1000 mA
0.22Ω
Coilcraft
XPL2010-103ML
10 µH
1.9 mm × 2
mm × 1 mm
610 mA
0.56Ω
Coilcraft
LPS3010-103ML
10 µH
2.95 mm ×
2.95 mm × 0.9
mm
550 mA
0.54Ω
Coilcraft
LPS4012-103ML
10 µH
3.9mm ×
3.9mm ×
1.1mm
1000 mA
0.35Ω
Coilcraft
LPS4012-223ML
22 µH
3.9 mm × 3.9
mm × 1.1 mm
780 mA
0.6Ω
Coilcraft
LPS4018-103ML
10 µH
3.9 mm × 3.9
mm × 1.7 mm
1100 mA
0.2Ω
Coilcraft
LPS4018-223ML
22 µH
3.9 mm × 3.9
mm × 1.7 mm
700 mA
0.36Ω
CAPACITOR SELECTION
The LM3532’s output capacitor has two functions: filtering of the boost converter's switching ripple, and to ensure feedback loop
stability. As a filter, the output capacitor supplies the LED current during the boost converter's on time and absorbs the inductor's
energy during the switch's off time. This causes a sag in the output voltage during the on time and a rise in the output voltage during
the off time. Because of this, the output capacitor must be sized large enough to filter the inductor current ripple that could cause
the output voltage ripple to become excessive. As a feedback loop component, the output capacitor must be at least 1µF and have
low ESR; otherwise, the LM3532's boost converter can become unstable. This requires the use of ceramic output capacitors. Table
21 lists part numbers and voltage ratings for different output capacitors that can be used with the LM3532.
TABLE 21. Input/Output Capacitors
36
Manufacturer
Part Number
Value
Size
Rating
Description
Murata
GRM21BR71H105KA12
1 µF
0805
50V
COUT
Murata
GRM188B31A225KE33
2.2 µF
0805
10V
CIN
TDK
C1608X5R0J225
2.2 µF
0603
6.3V
CIN
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
DIODE SELECTION
The diode connected between SW and OUT must be a Schottky diode and have a reverse breakdown voltage high enough to
handle the maximum output voltage in the application. Table 22 lists various diodes that can be used with the LM3532.
TABLE 22. Diodes
Manufacturer
Part Number
Value
Size
Rating
Diodes Inc.
B0540WS
Schottky
SOD-323
40V/500 mA
Diodes Inc.
SDM20U40
Schottky
SOD-523 (1.2 mm × 0.8
mm × 0.6 mm)
40V/200 mA
On Semiconductor
NSR0340V2T1G
Schottky
SOD-523 (1.2 mm × 0.8
mm × 0.6 mm)
40V/250 mA
On Semiconductor
NSR0240V2T1G
Schottky
SOD-523 (1.2 mm × 0.8
mm × 0.6 mm)
40V/250 mA
LAYOUT GUIDELINES
The LM3532 contains an inductive boost converter which sees a high switched voltage (up to 40V) at the SW pin, and a step current
(up to 1A) through the Schottky diode and output capacitor each switching cycle. The high switching voltage can create interference
into nearby nodes due to electric field coupling (I = CdV/dt). The large step current through the diode, and the output capacitor can
cause a large voltage spike at the SW pin and the OVP pin due to parasitic inductance in the step current conducting path (V =
LdI/dt). Board layout guidelines are geared towards minimizing this electric field coupling and conducted noise. Figure 16 highlights
these two noise generating components.
Copyright © 1999-2012, Texas Instruments Incorporated
37
LM3532
301154101
FIGURE 16. LM3532's Boost Converter Showing Pulsed Voltage at SW (High dV/dt) and
Current Through Schottky and COUT (High dI/dt)
38
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
The following lists the main (layout sensitive) areas of the LM3532 in order of decreasing importance:
Output Capacitor
• Schottky Cathode to COUT+
• COUT− to GND
Schottky Diode
• SW Pin to Schottky Anode
• Schottky Cathode to COUT+
Inductor
• SW Node PCB capacitance to other traces
Input Capacitor
• CIN+ to IN pin
• CIN− to GND
Output Capacitor Placement
The output capacitor is in the path of the inductor current discharge current. As a result, COUT sees a high current step from 0 to
IPEAK each time the switch turns off and the Schottky diode turns on. Typical turn-off/turn-on times are around 5ns. Any inductance
along this series path from the cathode of the diode through COUT and back into the LM3532's GND pin will contribute to voltage
spikes (VSPIKE = LPX × dI/dt) at SW and OUT which can potentially over-voltage the SW pin, or feed through to GND. To avoid this,
COUT+ must be connected as close as possible to the Cathode of the Schottky diode and COUT− must be connected as close as
possible to the LM3532's GND bump. The best placement for COUT is on the same layer as the LM3532 so as to avoid any vias
that will add extra series inductance (see Layout Examples).
Schottky Diode Placement
The Schottky diode is in the path of the inductor current discharge. As a result the Schottky diode sees a high current step from 0
to IPEAK each time the switch turns off and the diode turns on. Any inductance in series with the diode will cause a voltage spike
(VSPIKE = LPX × dI/dt) at SW and OUT which can potentially over-voltage the SW pin, or feed through to VOUT and through the
output capacitor and into GND. Connecting the anode of the diode as close as possible to the SW pin and the cathode of the diode
as close as possible to COUT+ will reduce the inductance (LPX) and minimize these voltage spikes (Layout Examples).
Inductor Placement
The node where the inductor connects to the LM3532’s SW bump has 2 issues. First, a large switched voltage (0 to VOUT +
VF_SCHOTTKY) appears on this node every switching cycle. This switched voltage can be capacitively coupled into nearby nodes.
Second, there is a relatively large current (input current) on the traces connecting the input supply to the inductor and connecting
the inductor to the SW bump. Any resistance in this path can cause large voltage drops that will negatively affect efficiency.
To reduce the capacitively coupled signal from SW into nearby traces, the SW bump to inductor connection must be minimized in
area. This limits the PCB capacitance from SW to other traces. Additionally, other nodes need to be routed away from SW and not
directly beneath. This is especially true for high impedance nodes that are more susceptible to capacitive coupling such as (SCL,
SDA, HWEN, PWM, and possibly ASL1 and ALS2). A GND plane placed directly below SW will help isolate SW and dramatically
reduce the capacitance from SW into nearby traces.
To limit the trace resistance of the VBATT to inductor connection and from the inductor to SW connection, use short, wide traces
(see Layout Examples).
Input Capacitor Selection and Placement
The input bypass capacitor filters the inductor current ripple, and the internal MOSFET driver currents during turn on of the power
switch.
The driver current requirement can be a few hundred mA's with 5ns rise and fall times. This will appear as high dI/dt current pulses
coming from the input capacitor each time the switch turns on. Close placement of the input capacitor to the IN pin and to the GND
pin is critical since any series inductance between IN and CIN+ or CIN− and GND can create voltage spikes that could appear on
the VIN supply line and in the GND plane.
Close placement of the input bypass capacitor at the input side of the inductor is also critical. The source impedance (inductance
and resistance) from the input supply, along with the input capacitor of the LM3532, form a series RLC circuit. If the output resistance
from the source (RS) is low enough the circuit will be underdamped and will have a resonant frequency (typically the case). Depending on the size of LS the resonant frequency could occur below, close to, or above the LM3532's switching frequency. This
can cause the supply current ripple to be:
•
•
•
approximately equal to the inductor current ripple when the resonant frequency occurs well above the LM3532's switching
frequency;
greater then the inductor current ripple when the resonant frequency occurs near the switching frequency; or
less then the inductor current ripple when the resonant frequency occurs well below the switching frequency.
Copyright © 1999-2012, Texas Instruments Incorporated
39
LM3532
Figure 17 shows this series RLC circuit formed from the output impedance of the supply and the input capacitor. The circuit is redrawn for the AC case where the VIN supply is replaced with a short to GND and the LM3532 + Inductor is replaced with a current
source (ΔIL).
Equation 1 is the criteria for an underdamped response. Equation 2 is the resonant frequency. Equation 3 is the approximated
supply current ripple as a function of LS, RS, and CIN.
As an example, consider a 3.6V supply with 0.1Ω of series resistance connected to CIN through 50 nH of connecting traces. This
results in an underdamped input filter circuit with a resonant frequency of 712 kHz. Since the switching frequency lies near to the
resonant frequency of the input RLC network, the supply current is probably larger then the inductor current ripple. In this case,
using equation 3 from Figure 17, the supply current ripple can be approximated as 1.68 times the inductor current ripple. Increasing
the series inductance (LS) to 500 nH causes the resonant frequency to move to around 225 kHz and the supply current ripple to
be approximately 0.25 times the inductor current ripple.
301154102
FIGURE 17. Input RLC Network
40
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Example Layouts
The following figures show example layouts which apply the required (proper) layout guidelines. These figures should be used as
guides for laying out the LM3532's boost circuit.
30115485
FIGURE 18. Layout Example #1
30115486
FIGURE 19. Layout Example #2
Copyright © 1999-2012, Texas Instruments Incorporated
41
LM3532
Physical Dimensions inches (millimeters) unless otherwise noted
16-Bump Thin Micro SMD Package
For Ordering, Refer to Ordering Information Table
NS Package Number TMD16
X1 = 1.745 mm (±0.1 mm), X2 = 1.845 mm (±0.1 mm), X3 = 0.600 mm
42
Copyright © 1999-2012, Texas Instruments Incorporated
LM3532
Notes
Copyright © 1999-2012, Texas Instruments Incorporated
43
Notes
Copyright © 1999-2012, Texas Instruments
Incorporated
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www.ti.com/audio
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DLP® Products
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dsp.ti.com
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www.ti.com/energy
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Logic
logic.ti.com
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Microcontrollers
microcontroller.ti.com
Video and Imaging
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RFID
www.ti-rfid.com
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www.ti.com/omap
TI E2E Community
e2e.ti.com
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www.ti.com/wirelessconnectivity
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