ICSI IC61C256AH-12T 32k x 8 high-speed cmos static ram Datasheet

IC61C256AH
Document Title
32K x 8 High Speed SRAM
Revision History
Revision No
History
Draft Date
0A
0B
0C
0D
Initial Draft
Revise typo of tHA on page 7
Add SOP package type
Revise typo of sop size at page 2,9
March 23,2001
October 18,2001
February 18,2002
April 19,2002
Remark
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
1
IC61C256AH
32K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
• High-speed access times: 10, 12, 15, 20, 25 ns
• Low active power: 400 mW (typical)
• Low standby power
-- 250 µW (typical) CMOS standby
-- 55 mW (typical) TTL standby
• Fully static operation: no clock or refresh
required
• TTL compatible interface and outputs
• Single 5V power supply
DESCRIPTION
The ICSI IC61C256AH is very high-speed, low power, 32,768
word by 8-bit static RAMs. They are fabricated using ICSI's
high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields
access times as fast as 8 ns maximum.
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
50 µW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (CE). The active LOW Write Enable (WE) controls
both writing and reading of the memory.
The IC61C256AH is pin compatible with other 32k x 8 SRAMs
and are available in 28-pin 300mil PDIP, 300mil SOJ, and
8*13.4mm TSOP-1 package, 330 mil SOP.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
32K X 8
MEMORY ARRAY
I/O
DATA
CIRCUIT
COLUMN I/O
VCC
GND
I/O0-I/O7
CE
OE
CONTROL
CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
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Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
PIN CONFIGURATION
PIN CONFIGURATION
28-Pin DIP and SOJ and SOP
A14
1
28
VCC
A12
2
27
WE
A7
3
26
A13
A6
4
25
A8
A5
5
24
A9
A4
6
23
A11
A3
7
22
OE
A2
8
21
A10
A1
9
20
CE
A0
10
19
I/O7
I/O0
11
18
I/O6
I/O1
12
17
I/O5
I/O2
13
16
I/O4
GND
14
15
I/O3
PIN DESCRIPTIONS
8x13.4mm TSOP-1
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
21
20
19
18
17
16
15
14
13
12
11
10
9
8
22
23
24
25
26
27
28
1
2
3
4
5
6
7
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
TRUTH TABLE
A0-A14
Address Inputs
Mode
CE
Chip Enable Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7
Input/Output
Not Selected
(Power-down)
Output Disabled
Read
Write
Vcc
Power
GND
Ground
WE
CE
OE
I/O Operation
Vcc Current
X
H
X
High-Z
ISB1, ISB2
H
H
L
L
L
L
H
L
X
High-Z
DOUT
DIN
ICC1,ICC2
ICC1, ICC2
ICC1, ICC2
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
VTERM
TBIAS
TSTG
PD
IOUT
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
Power Dissipation
DC Output Current (LOW)
Value
–0.5 to +7.0
–55 to +125
–65 to +150
1.5
20
Unit
V
°C
°C
W
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
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IC61C256AH
OPERATING RANGE
Range
Commercial
Ambient Temperature
0°C to +70°C
Industrial
–40°C to +85°C
Speed
-10, -12
-15, -20
-12
VCC
5V, ± 5%
5V ± 10%
5V ± 5%
-15, -20, -25
5V± 10%
Notes:
1. 8 ns is preliminary.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min., IOH = –4.0 mA
2.4
—
V
VOL
Output LOW Voltage
VCC = Min., IOL = 8.0 mA
—
0.4
V
2.2
VCC + 0.5
V
–0.5
0.8
V
(1)
VIH
Input HIGH Voltage
VIL
Input LOW Voltage(2)
ILI
Input Leakage
GND ≤ VIN ≤ VCC
Com.
Ind.
–5
–10
5
10
µA
ILO
Output Leakage
GND ≤ VOUT ≤ VCC,
Outputs Disabled
Com.
Ind.
–5
–10
5
10
µA
Notes:
1. VIH=VCC +3.0V for pulse width less than 10ns.
2. VIL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
Com.
Ind.
— 145
— 180
— 135
— 170
— 125
— 160
— 120
— 150
— 120
— 140
mA
VCC = Max.,
VIN = VIH or VIL
CE ≥VIH, f = 0
Com.
Ind.
— 25
— 30
— 25
— 30
— 25
— 30
— 25
— 30
— 25
— 30
mA
VCC = Max.,
CE ≥ VCC – 0.2V,
VIN ≥ VCC – 0.2V, or
VIN ≤ 0.2V, f = 0
Com.
Ind.
— 2
— 10
— 2
— 10
— 2
— 10
— 2
— 10
— 2
— 10
mA
Sym. Parameter
Test Conditions
ICC
Vcc Dynamic Operating
Supply Current
VCC = Max., CE = VIL
IOUT = 0 mA, f = fMAX
ISB1
TTL Standby Current
(TTL Inputs)
ISB2
CMOS Standby
Current (CMOS Inputs)
-25
Notes:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
Conditions
Max.
Unit
VIN = 0V
8
pF
VOUT = 0V
10
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5V.
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Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
-25
Symbol Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
tRC
10
—
12
—
15
—
20
—
25
—
ns
tAA Address Access Time
—
10
—
12
—
15
—
20
—
25
ns
tOHA
Output Hold Time
2
—
2
—
2
—
2
—
2
—
ns
tACE
CE Access Time
—
10
—
12
—
15
—
20
—
25
ns
tDOE
OE Access Time
—
5
—
5
—
7
—
8
—
9
ns
tLZOE(2)OE to Low-Z Output
0
—
0
—
0
—
0
—
0
—
ns
tHZOE(2)OE to High-Z Output
—
5
—
6
—
7
—
9
—
10
ns
tLZCE CE to Low-Z Output
2
—
3
—
3
—
3
—
3
—
ns
tHZCE CE to High-Z Output
—
5
—
7
—
8
—
9
—
10
ns
0
—
0
—
0
—
0
—
0
—
ns
—
10
—
12
—
15
—
18
—
20
ns
Read Cycle Time
(2)
(2)
tPU(3)
CE to Power-Up
tPD(3) CE to Power-Down
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
480 Ω
480 Ω
5V
5V
OUTPUT
OUTPUT
30 pF
Including
jig and
scope
Figure 1.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
255 Ω
5 pF
Including
jig and
scope
255 Ω
Figure 2.
5
IC61C256AH
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
t RC
ADDRESS
t AA
t OHA
t OHA
DOUT
DATA VALID
PREVIOUS DATA VALID
READ CYCLE NO. 2(1,3)
t RC
ADDRESS
t AA
t OHA
OE
t HZOE
t DOE
t LZOE
CE
t ACE
t HZCE
t LZCE
DOUT
HIGH-Z
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
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Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-10
-12
-15
-20
-25
Parameter
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
tWC
Write Cycle Time
10
—
12
—
15
—
20
—
25
—
ns
tSCE
CE to Write End
9
—
10
—
10
—
13
—
15
—
ns
tAW
Address Setup Time
to Write End
9
—
10
—
12
—
15
—
20
—
ns
tHA
Address Hold
from Write End
0
—
0
—
0
—
0
—
0
—
ns
Address Setup Time
0
—
0
—
0
—
0
—
0
—
ns
tPWE
WE Pulse Width
8
—
8
—
10
—
13
—
15
—
ns
tSD
Data Setup to Write End
7
—
7
—
9
—
10
—
12
—
ns
tHD
Data Hold from Write End
0
—
0
—
0
—
0
—
0
—
ns
tHZWE(2) WE LOW to High-Z Output
—
6
—
6
—
7
—
8
—
10
ns
WE HIGH to Low-Z Output
0
—
0
—
0
—
0
—
0
—
ns
Symbol
tSA
(4)
tLZWE
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled) (1,2 )
t WC
VALID ADDRESS
ADDRESS
t SA
t SCE
t HA
CE
t AW
t PWE1
t PWE2
WE
t HZWE
DOUT
DATA UNDEFINED
t LZWE
HIGH-Z
t SD
DIN
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
t HD
DATAIN VALID
7
IC61C256AH
WRITE CYCLE NO. 2 (CE Controlled) (1,2)
t WC
ADDRESS
VALID ADDRESS
t HA
OE
CE
LOW
t AW
t PWE1
WE
t SA
DOUT
t HZWE
DATA UNDEFINED
t LZWE
HIGH-Z
t SD
DIN
t HD
DATAIN VALID
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE ≥ VIH.
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Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
ORDERING INFORMATION:
IC61C256AH
Commercial Range: 0°C to +70°C
ORDERING INFORMATION:
IC61C256AH
Industrial Range: –40°C to +85°C
Speed (ns)
Speed (ns)
Order Part No.
Package
10
10
10
10
IC61C256AH-10N
IC61C256AH-10J
IC61C256AH-10T
IC61C256AH-10U
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
12
12
12
12
IC61C256AH-12N
IC61C256AH-12J
IC61C256AH-12T
IC61C256AH-12U
15
15
15
15
20
20
20
20
Order Part No.
Package
12
12
12
12
IC61C256AH-12NI
IC61C256AH-12JI
IC61C256AH-12TI
IC61C256AH-12UI
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
15
15
15
15
IC61C256AH-15NI
IC61C256AH-15JI
IC61C256AH-15TI
IC61C256AH-15UI
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
IC61C256AH-15N
IC61C256AH-15J
IC61C256AH-15T
IC61C256AH-15U
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
20
20
20
20
IC61C256AH-20NI
IC61C256AH-20JI
IC61C256AH-20TI
IC61C256AH-20UI
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
IC61C256AH-20N
IC61C256AH-20J
IC61C256AH-20T
IC61C256AH-20U
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
25
25
25
25
IC61C256AH-25NI
IC61C256AH-25JI
IC61C256AH-25TI
IC61C256AH-25UI
300mil DIP
300mil SOJ
8*13.4mm TSOP-1
330mil SOP
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
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