Intersil ISL21009DFB850Z Precision, low noise fgaâ ¢ voltage reference Datasheet

ISL21009
®
Data Sheet
PRELIMINARY
February 14, 2007
Precision, Low Noise FGA™ Voltage
References
FN6327.1
Features
• Output Voltages . . . . . . . . . . . . . . . 1.25V, 2.500V, 5.000V
The ISL21009 FGA™ voltage references are extremely low
power, high precision, and low noise voltage references
fabricated on Intersil’s proprietary Floating Gate Analog
technology. The ISL21009 features very low noise (4µVP-P
for 0.1Hz to 10Hz), low operating current (180µA, Max), and
3ppm/°C of temperature drift. In addition, the ISL21009
family features guaranteed initial accuracy as low as ±0.5mV
This combination of high initial accuracy, low drift, and low
output noise performance of the ISL21009 enables versatile
high performance control and data acquisition applications
with low power consumption.
• Initial Accuracy . . . . . . . . . . . . . .±0.5mV, ±1.0mV, ±2.0mV
• Input Voltage Range. . . . . . . . . . . . . . . . . . . . Up to 16.5V
• Output Voltage Noise . . . . . . . . . . 4uVP-P (0.1Hz to 10Hz)
• Supply Current . . . . . . . . . . . . . . . . . . . . . . . .180µA (Max)
• Temperature Coefficient . . . 3ppm/°C, 5ppm/°C, 10ppm/°C
• Output Current Capability. . . . . . . . . . . . . . . . . . . . ±7.0mA
• Operating Temperature Range. . . . . . . . . -40°C to +125°C
• Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ld SOIC
• Pb-Free Plus Anneal Available (RoHS Compliant)
Available Options
Applications
VOUT
OPTION
(V)
INITIAL
ACCURACY
(mV)
TEMPCO.
(ppm/°C)
ISL21009BFB812Z
Coming Soon
1.250
±0.5
3
ISL21009CFB812Z
Coming Soon
1.250
±1.0
5
ISL21009DFB812Z
Coming Soon
1.250
±2.0
10
ISL21009BFB825Z
2.500
±0.5
3
ISL21009CFB825Z
2.500
±1.0
5
ISL21009DFB825Z
2.500
±2.0
10
ISL21009BFB850Z
5.000
±0.5
3
ISL21009CFB850Z
5.000
±1.0
5
GND or NC 1
8 DNC
ISL21009DFB850Z
5.000
±2.0
10
VIN 2
7 DNC
DNC 3
6 VOUT
GND 4
5 TRIM or NC
PART NUMBER
• High Resolution A/Ds and D/As
• Digital Meters
• Bar Code Scanners
• Basestations
• Battery Management/Monitoring
• Industrial/Instrumentation Equipment
Pinout
ISL21009
(8 LD SOIC)
TOP VIEW
Pin Descriptions
PIN NUMBER
PIN NAME
1
GND or NC
4
GND
Ground Connection
2
VIN
Power Supply Input Connection
6
VOUT
Voltage Reference Output Connection
5
TRIM
Allows user trim typically ±2.5%. Leave Unconnected when unused.
3,7,8
DNC
Do Not Connect; Internal Connection – Must Be Left Floating
1
DESCRIPTION
Can be either Ground or No Connect
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL21009
Ordering Information
PART NUMBER
(Note)
PART MARKING
VOUT
OPTION
(V)
GRADE
QUANTITY PER
TEMP.
REEL/TUBE
RANGE (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL21009BFB825Z
21009BF Z25
2.500
±0.5mV, 3ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009BFB825Z-TK
21009BF Z25
2.500
±0.5mV, 3ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
ISL21009CFB825Z
21009CF Z25
2.500
±1.0mV, 5ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009CFB825Z-TK
21009CF Z25
2.500
±1.0mV, 5ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
ISL21009DFB825Z
21009DF Z25
2.500
±2.0mV, 10ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009DFB825Z-TK
21009DF Z25
2.500
±2.0mV, 10ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
ISL21009BFB850Z
21009BF Z50
5.000
±0.5mV, 3ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009BFB850Z-TK
21009BF Z50
5.000
±0.5mV, 3ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
ISL21009CFB850Z
21009CF Z50
5.000
±1.0mV, 5ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009CFB850Z-TK
21009CF Z50
5.000
±1.0mV, 5ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
ISL21009DFB850Z
21009DF Z50
5.000
±2.0mV, 10ppm/°C
100
-40 to +125
8 Ld SOIC
M8.15
ISL21009DFB850Z-TK
21009DF Z50
5.000
±2.0mV, 10ppm/°C
1000
-40 to +125
8 Ld SOIC
M8.15
NOTES:
A) Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020
B) Add “-T” suffix for tape and reel
1
+5V
2
C1
10µF
3
4
GND
NC
VIN
NC
NC
VOUT
GND
NC
8
7
6
5
ISL21009-25
SPI BUS
X79000
1
SCK
2
3
4
5
6
A0
CLR
A1
VCC
A2
VH
SI
VL
SO
7
/RDY
8
9
10
/CS
VREF
VSS
UP
VOUT
DOWN
VBUF
OE
VFB
20
19
18
17
16
C1
0.001µF
15
14
13
12
LOW NOISE DAC OUTPUT
11
FIGURE 1. TYPICAL APPLICATION PRECISION 12-BIT SUBRANGING DAC
2
FN6327.1
February 14, 2007
ISL21009
Absolute Voltage Ratings
Recommended Operating Conditions
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Max Voltage VIN to Gnd . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +18V
Max Voltage VOUT to Gnd (10s). . . . . . . . . . . . . . -0.5V to VOUT +1V
Voltage on “DNC” pins . . . . No connections permitted to these pins.
Lead Temperature, soldering (10s) . . . . . . . . . . . . . . . . . . . . +260°C
ESD Ratings
(HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6kV
(CBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2kV
Temperature Range (Industrial) . . . . . . . . . . . . . . . -40°C to +125°C
Thermal Information
Continuous Power Dissipation (TA = +70°C)
8 Ld SOIC derate 5.88mW/°C above +70°C. . . . . . . . . . . . . 471mW
Pb-free reflow profile. . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Common Electrical Specifications (ISL21009-25, -50)
PARAMETER
VOA
TC VOUT
ΔVOUT/Δt
DESCRIPTION
VOUT Accuracy @ TA = +25°C
Output Voltage Temperature
Coefficient (Note 1)
Long Term Stability (Note 4)
TA = -40°C to +125°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
UNIT
ISL21009B
-0.5
+0.5
mV
ISL21009C
-1.0
+1.0
mV
ISL21009D
-2.0
+2.0
mV
ISL21009B
3
ppm/°C
ISL21009C
5
ppm/°C
ISL21009D
10
ppm/°C
TA = +25°C
Trim Range
±2.0
50
ppm/√1kHrs
±2.5
%
ISC
Short Circuit Current (Note 3)
TA = +25°C, VOUT tied to Gnd
10
mA
tR
Turn on Settling Time
VOUT = ±0.1%
100
µs
Ripple Rejection
f = 10kHz
60
dB
eN
Output Voltage Noise
0.1Hz ≤ f ≤ 10Hz
4
µVP-P
VN
Broadband Voltage Noise
10Hz ≤ f ≤ 1kHz
2.2
µVRMS
Noise Density
f = 1kHz
60
nV/√Hz
Electrical Specifications (ISL21009-25, VOUT = 2.50V)
PARAMETER
DESCRIPTION
VOUT
Output Voltage
VIN
Input Voltage Range
IIN
Supply Current
ΔVOUT /ΔVIN
Line Regulation
ΔVOUT/ΔIOUT
ΔVOUT/ΔTA
Load Regulation
Thermal Hysteresis (Note 2)
3
VIN = 5.0V, TA = -40°C to +125°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
2.500
3.5
UNIT
V
16.5
V
95
180
µA
3.5V < VIN < 5.5V
50
150
µV/V
5.5V < VIN < 16.5V
10
50
µV/V
Sourcing: 0mA ≤ IOUT ≤ 7mA
10
50
µV/mA
Sinking: -7mA ≤ IOUT ≤ 0mA
20
100
µV/mA
ΔTA = +125°C
100
ppm
FN6327.1
February 14, 2007
ISL21009
Electrical Specifications (ISL21009-50, VOUT = 5.0V)
PARAMETER
DESCRIPTION
VOUT
Output Voltage
VIN
Input Voltage Range
IIN
Supply Current
ΔVOUT /ΔVIN
Line Regulation
ΔVOUT/ΔIOUT
Load Regulation
ΔVOUT/ΔTA
VIN = 10.0V, TA = -40°C to +125°C, unless otherwise specified.
CONDITIONS
MIN
TYP
MAX
UNIT
5.000
V
5.5
Thermal Hysteresis (Note 2)
16.5
V
95
180
µA
5.5V < VIN < 16.5V
20
90
µV/V
Sourcing: 0mA ≤ IOUT ≤ 7mA
10
60
µV/mA
Sinking: -7mA ≤ IOUT ≤ 0mA
20
100
µV/mA
ΔTA = +125°C
50
ppm
NOTES:
1. Over the specified temperature range. Temperature coefficient is measured by the box method whereby the change in VOUT is divided by the
temperature range; in this case, -40°C to +125°C = +165°C.
2. Thermal Hysteresis is the change of VOUT measured @ TA = +25°C after temperature cycling over a specified range, ΔTA. VOUT is read initially
at TA = +25°C for the device under test. The device is temperature cycled and a second VOUT measurement is taken at +25°C. The difference
between the initial VOUT reading and the second VOUT reading is then expressed in ppm. For Δ TA = +165°C, the device under test is cycled
from +25°C to +125°C to -40°C to +25°C.
3. Guaranteed by device characterization and/or correlation to other device tests.
4. FGA voltage reference long term drift is a logarithmic characteristic. Changes that occur after the first few hundred hours of operation are
significantly smaller with time, asymptotically approaching zero beyond 1,000 hours. Because of this decreasing characteristics, long term drift
is specified in ppm/√1kHrs.
Typical Performance Curves (ISL21009-25) (REXT = 100kΩ)
140
120
115µA
105µA
120
IIN (µA)
100
IIN (µA)
+125°C
+25°C
110
80
81µA
60
100
-40°C
40
90
20
0
3.5
5.5
7.5
9.5
11.5
13.5
80
3.5
15.5
5.5
7.5
13.5
15.5
60
2.50010
115µA
2.50000
DELTA VO (µV)
2.50005
105µA
81µA
2.49995
2.49990
2.49985
5.5
7.5
9.5
11.5
VIN (V)
FIGURE 4. LINE REGULATION
4
13.5
15.5
(NORMALIZED TO VIN = 5.0V)
VOUT (V)
(NORMALIZED TO 2.50V at VIN = 5V)
11.5
FIGURE 3. IIN vs VIN, 3 TEMPERATURES
FIGURE 2. IIN vs VIN 3 UNITS
2.49980
3.5
9.5
VIN (V)
VIN (V)
40
+25°C
20
-40°C
0
-20
+125°C
-40
-60
-80
-100
3.5
5.5
7.5
9.5
11.5
VIN (V)
13.5
15.5
FIGURE 5. LINE REGULATION OVER TEMPERATURE
FN6327.1
February 14, 2007
ISL21009
(Continued)
0.10
2.5002
0.08
2.5001
0.06
2.5000
0.04
-40°C
0.00
-0.02
2.4998
UNIT 2
2.4997
2.4996
-0.04
+25°C
-0.06
UNIT 1
2.4995
2.4994
-0.08
-0.10
-7
UNIT 3
2.4999
+125°C
0.02
VOUT (V)
DELTA VOUT (mV)
Typical Performance Curves (ISL21009-25) (REXT = 100kΩ)
-6
-5
-4
SINKING
-3
-2
-1
0
1
2
3
OUTPUT CURRENT (mA)
4
5
6
2.4993
-40
7
-20
0
20
40
60
80
100
120
140
TEMPERATURE (°C)
SOURCING
FIGURE 7. VOUT vs TEMPERATURE
FIGURE 6. LOAD REGULATION
0
500kHz PEAK
VIN (DC) = 10V
-10
-20
NO LOAD
PSRR (dB)
-30
-40
-50
-60
10nF
-70
100nF
-80
1nF
-90
-100
1
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FIGURE 9. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
VIN AND VOUT (V)
FIGURE 8. PSRR AT DIFFERENT CAPACITIVE LOADS
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
VIN
HIGH IIN
MEDIUM IIN
LOW IIN
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
TIME (ms)
FIGURE 10. LINE TRANSIENT RESPONSE, 0.001µF LOAD
CAPACITANCE
5
FIGURE 11. TURN ON TIME
FN6327.1
February 14, 2007
ISL21009
Typical Performance Curves (ISL21009-25) (REXT = 100kΩ)
(Continued)
GAIN IS x1000, NOISE
IS 4µVp-p
160
140
10nF
ZOUT (Ω)
120
1nF
100
NO LOAD
80
60
100nF
40
20
0
1
10
100
1k
10k
FREQUENCY (Hz)
100k
FIGURE 12. ZOUT vs FREQUENCY
NO OUTPUT
CAPACITANCE
1M
FIGURE 13. VOUT NOISE, 0.1Hz to 10Hz
NO OUTPUT CAPACITANCE
7mA
50µA
-50µA
-7mA
FIGURE 14. LOAD TRANSIENT RESPONSE
6
FIGURE 15. LOAD TRANSIENT RESPONSE
FN6327.1
February 14, 2007
ISL21009
Typical Performance Curves (ISL21009-50) (REXT = 100kΩ)
140
110
112µA
+25°C
104µA
120
100
80
IIN (µA)
IIN (µA)
100
95µA
60
+125°C
90
40
-40°C
20
0
5.5
6.5
7.5
8.5
80
5.5
9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
6.5
7.5
8.5
9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
VIN (V)
VIN (V)
FIGURE 17. IIN vs VIN, 3 TEMPERATURES
5.0001
ΔVO (µV)
(NORMALIZED TO VIN = 10.0V)
100
5.0000
4.9999
4.9998
104µA
4.9997
4.9996
95µA
4.9995
112µA
4.9994
5.5
6.5
7.5
8.5
0
+125°C
-100
+25°C
-200
-40°C
-300
-400
-500
-600
-700
5.5
9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
6.5
7.5
8.5
VIN (V)
9.5 10.5 11.5 12.5 13.5 14.5 15.5 16.5
VIN (V)
FIGURE 19. LINE REGULATION OVER TEMPERATURE
FIGURE 18. LINE REGULATION
0.10
-40°C
0.05
0.00
ΔVOUT (mV)
VOUT (V)
(NORMALIZED to 5.0V AT VIN = 10V)
FIGURE 16. IIN vs VIN 3 UNITS
-0.05
+25°C
-0.10
+125°C
-0.15
-0.20
-0.25
-7 -6 -5
SINKING
-4
-3 -2 -1 0 1 2 3
OUTPUT CURRENT (mA)
4
5 6 7
SOURCING
FIGURE 20. LOAD REGULATION
7
FN6327.1
February 14, 2007
ISL21009
Typical Performance Curves (ISL21009-50) (REXT = 100kΩ)
0
5.001
NORMALIZED TO 25°C
5.000
PSRR (dB)
VOUT (V)
5.001
UNIT 1
UNIT 2
5.000
4.999
4.999
4.998
-40
(Continued)
NO LOAD
-10
VIN (DC) = 10V
-20
VIN (AC) RIPPLE = 50mVP-P
-30
-40
-50
-60
10nF
-70
100nF
-80
UNIT 3
-20
1nF
-90
0
20
40
60
80
100
120
140
-100
1
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
TEMPERATURE (°C)
FIGURE 22. PSRR AT DIFFERENT CAPACITIVE LOADS
FIGURE 21. VOUT vs TEMPERATURE
VIN = 10V
ΔVIN = 1V
VIN = 10V
ΔVIN = 1V
FIGURE 23. LINE TRANSIENT RESPONSE, NO CAPACITIVE
LOAD
FIGURE 24. LINE TRANSIENT RESPONSE, 0.001µF LOAD
CAPACITANCE
12
120
10
100
VIN
8
6
ZOUT (W)
VIN (V) AND VOUT (V)
1nF
450nA
60
NO LOAD
40
4
2
0
80
270nA
10nF
20
340nA
0
0
50
100
150
200
TIME (µs)
FIGURE 25. TURN ON TIME
8
250
300
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FIGURE 26. ZOUT vs FREQUENCY
FN6327.1
February 14, 2007
ISL21009
Typical Performance Curves (ISL21009-50) (REXT = 100kΩ)
(Continued)
GAIN IS x1000, NOISE
IS 4µVp-p
50µA
-50µA
FIGURE 27. VOUT NOISE, 0.1Hz to 10Hz
FIGURE 28. LOAD TRANSIENT RESPONSE
7mA
-7mA
FIGURE 29. LOAD TRANSIENT RESPONSE
Applications Information
FGA Technology
The ISL21009 voltage reference uses floating gate
technology to create references with very low drift and
supply current. Essentially the charge stored on a floating
gate cell is set precisely in manufacturing. The reference
voltage output itself is a buffered version of the floating gate
voltage. The resulting reference device has excellent
characteristics which are unique in the industry: very low
temperature drift, high initial accuracy, and almost zero
supply current. Also, the reference voltage itself is not limited
by voltage bandgaps or zener settings, so a wide range of
reference voltages can be programmed (standard voltage
settings are provided, but customer-specific voltages are
available).
9
The process used for these reference devices is a floating
gate CMOS process, and the amplifier circuitry uses CMOS
transistors for amplifier and output transistor circuitry. While
providing excellent accuracy, there are limitations in output
noise level and load regulation due to the MOS device
characteristics. These limitations are addressed with circuit
techniques discussed in other sections.
Micropower Operation
The ISL21009 consumes extremely low supply current due
to the proprietary FGA technology. Low noise performance is
achieved using optimized biasing techniques. Supply current
is typically 95µA and noise is 4µVP-P benefitting precision,
low noise portable applications such as handheld meters
and instruments.
FN6327.1
February 14, 2007
ISL21009
Data Converters in particular can utilized the ISL21009 as an
external voltage reference. Low power DAC and ADC
circuits will realize maximum resolution with lowest noise.
Board Mounting Considerations
For applications requiring the highest accuracy, board
mounting location should be reviewed. The device uses a
plastic SOIC package which will subject the die to mild
stresses when the PC board is heated and cooled and
slightly changes shape. Placing the device in areas subject
to slight twisting can cause degradation of the accuracy of
the reference voltage due to these die stresses. It is normally
best to place the device near the edge of a board, or the
shortest side, as the axis of bending is most limited at that
location. Mounting the device in a cutout also minimizes flex.
Obviously mounting the device on flexprint or extremely thin
PC material will likewise cause loss of reference accuracy.
Noise Performance and Reduction
The output noise voltage in a 0.1Hz to 10Hz bandwidth is
typically 4µVP-P. The noise measurement is made with a
bandpass filter made of a 1 pole high-pass filter with a corner
frequency at 0.1Hz and a 2-pole low-pass filter with a corner
frequency at 12.6Hz to create a filter with a 9.9Hz bandwidth.
Noise in the 10kHz to 1MHz bandwidth is approximately
40µVP-P with no capacitance on the output. This noise
measurement is made with a 2 decade bandpass filter made
of a 1 pole high-pass filter with a corner frequency at 1/10 of
the center frequency and 1-pole low-pass filter with a corner
frequency at 10 times the center frequency. Load capacitance
up to 1000pF can be added but will result in only marginal
improvements in output noise and transient response. The
output stage of the ISL21009 is not designed to drive heavily
capactive loads, so for load capacitances above 0.001µF the
noise reduction network shown in Figure 30 is recommended.
This network reduces noise significantly over the full
bandwidth. Noise is reduced to less than 20µVP-P from 1Hz to
1MHz using this network with a 0.01µF capacitor and a 2kΩ
resistor in series with a 10µF capacitor. Also, transient
response is improved with higher value output capacitor. The
0.01µF value can be increased for better load transient
response with little sacrifice in output stability.
10
VIN = 3.5V
10µF
0.1µF
VIN
VO
ISL21009
GND
2kΩ
0.01µF
10µF
FIGURE 30. HANDLING HIGH LOAD CAPACITANCE
Turn-On Time
The ISL21009 devices have low supply current and thus the
time to bias up internal circuitry to final values will be longer
than with higher power references. Normal turn-on time is
typically 100µs. This is shown in Figure 11. Circuit design
must take this into account when looking at power up delays
or sequencing.
Temperature Coefficient
The limits stated for temperature coefficient (tempco) are
governed by the method of measurement. The overwhelming
standard for specifying the temperature drift of a reference is to
measure the reference voltage at two temperatures, take the
total variation, (VHIGH – VLOW), and divide by the temperature
extremes of measurement (THIGH – TLOW). The result is
divided by the nominal reference voltage (at T = +25°C) and
multiplied by 106 to yield ppm/°C. This is the “Box” method for
specifying temperature coefficient.
Output Voltage Adjustment
The output voltage can be adjusted up or down by 2.5% by
placing a potentiometer from Vout to ground, and connecting
the wiper to the TRIM pin. The TRIM input is high impedance,
so no series resistance is needed. The resistor in the
potentiometer should be a low tempco (<50ppm/°C) and the
resulting voltage divider should have very low tempco
<5ppm/°C. A digital potentiometer such as the ISL95810
provides a low tempco resistance and excellent resistor and
tempco matching for trim applications.
FN6327.1
February 14, 2007
ISL21009
Typical Application Circuits
VIN = +5.0V
R = 200Ω
2N2905
VIN
ISL21009 VOUT
VOUT = 2.50V
2.5V/50mA
0.001µF
GND
FIGURE 31. PRECISION 2.5V 50mA REFERENCE
+3.5 to 16.5V
10µF
0.1µF
VIN
VOUT
ISL21009-25
VOUT = 2.50V
GND
0.001µF
VCC
RH
VOUT
X9119
(UNBUFFERED)
+
SDA
2-WIRE BUS
EL8178
SCL
VSS
–
VOUT
(BUFFERED)
RL
FIGURE 32. 2.5V FULL SCALE LOW-DRIFT, LOW NOISE, 10-BIT ADJUSTABLE VOLTAGE SOURCE
11
FN6327.1
February 14, 2007
ISL21009
+3.5 to 16.5V
0.1µF
10µF
VIN
EL8178
+
VOUT
VOUT SENSE
–
ISL21009-25
LOAD
GND
FIGURE 33. KELVIN SENSED LOAD
10µF
+3.5 to 16.5V
0.1µF
VIN
2.5V ±2.5%
VOUT
ISL21009-25
TRIM
GND
VCC
I2C BUS
RH
SDA
SCL
ISL95810
VSS
RL
FIGURE 34. OUTPUT ADJUSTMENT USING THE TRIM PIN
12
FN6327.1
February 14, 2007
ISL21009
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INDEX
AREA
H
0.25(0.010) M
B M
INCHES
E
SYMBOL
-B1
2
3
L
SEATING PLANE
-A-
A
D
h x 45°
-C-
e
A1
B
0.25(0.010) M
C
0.10(0.004)
C A M
MIN
MAX
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
A1
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
e
α
B S
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
N
a
NOTES:
MILLIMETERS
8
0°
8
8°
0°
7
8°
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
Rev. 1 6/05
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
13
FN6327.1
February 14, 2007
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