Intersil ISL43110IB Low-voltage, single supply, spst, high performance analog switch Datasheet

ISL43110, ISL43111
®
Data Sheet
October 2002
Low-Voltage, Single Supply, SPST, High
Performance Analog Switches
Features
The Intersil ISL4311X are precision, high performance analog
switches that are fully specified for 3.3V, 5V, and 12V
operation, and feature improved leakage, Icc, and switching
time specifications.
• Available in SOT-23 Packaging
Designed to operate from a single +2.4V to +12V supply, the
low supply current (1µA Max over the temperature and
voltage ranges) and low leakage currents (1nA) make these
switches ideal for battery powered applications.
Low RON and fast switching speeds over a wide operating
supply range increase these devices usefulness in industrial
equipment, portable instruments, and as input signal
multiplexers for new generation, low supply voltage data
converters. Some of the smallest packages are available
alleviating board space limitations, and making Intersil’s
newest line of low-voltage switches an ideal solution.
The ISL4311X are single-pole/single-throw (SPST) switches,
with the ISL43110 being normally open (NO), and the
ISL43111 being normally closed (NC).
TABLE 1. FEATURES AT A GLANCE
ISL43110
ISL43111
1
1
Configuration
NO
NC
3.3V RON
15Ω
15Ω
55ns / 28ns
55ns / 28ns
3.3V tON / tOFF
11Ω
11Ω
45ns / 20ns
45ns / 20ns
7Ω
7Ω
37ns / 21ns
37ns / 21ns
5V RON
5V tON / tOFF
12V RON
12V tON / tOFF
Packages
• Fully Specified at 3.3V, 5V, and 12V Supplies
• Single Supply Operation. . . . . . . . . . . . . . . . . +2.4V to +12V
• ON Resistance (RON Max). . . . . . . . . . . . . 20Ω (V+ = 5V)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Ω (V+ = 12V)
• RON Flatness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5Ω
• Charge Injection (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 10pC
• Low Power Consumption (PD Max). . . . . . . . . . . . . . . .<5µW
• Low Leakage Current (Max at 85oC) . 10nA (Off Leakage)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20nA (On Leakage)
• Fast Switching Action
- tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80ns
- tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ns
• Minimum 2000V ESD Protection per Method 3015.7
• TTL, CMOS Compatible
Applications
• Battery Powered, Handheld, and Portable Equipment
- Cellular/Mobile Phones, Pagers
- Laptops, Notebooks, Palmtops, PDAs
Table 1 summarizes the performance of this family. For
similar performance ±5V supply versions, see the
ISL43112/13 data sheet.
Number of Switches
FN6028.1
8 Ld SOIC, 5 Ld SOT-23
• Communications Systems
- Radios
- PBX, PABX
• Test Equipment
- Logic and Spectrum Analyzers
- Portable Meters, DVM, DMM
• Medical Equipment
- Ultrasound, MRI, CAT SCAN
- Electrocardiograph, Blood Analyzer
• Heads-Up Displays
• Audio and Video Switching
Ordering Information
PART NO.
(BRAND)
TEMP.
RANGE (oC)
PACKAGE
PKG.
NO.
ISL43110IB
-40 to 85
8 Ld SOIC
M8.15
ISL43110IB-T
-40 to 85
Tape and Reel
M8.15
ISL43110IH-T
(110I)
-40 to 85
5 Ld SOT-23, Tape P5.064
and Reel
ISL43111IB
-40 to 85
8 Ld SOIC
M8.15
ISL43111IB-T
-40 to 85
Tape and Reel
M8.15
ISL43111IH-T
(111I)
-40 to 85
5 Ld SOT-23, Tape P5.064
and Reel
1
• General Purpose Circuits
- +3V/+5V DACs and ADCs
- Sample and Hold Circuits
- Digital Filters
- Operational Amplifier Gain Switching Networks
- High Frequency Analog Switching
- High Speed Multiplexing
- Integrator Reset Circuits
Related Literature
• Tech Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, All Rights Reserved
ISL43110, ISL43111
Pinouts
(Note 1)
ISL43110 (SOIC)
TOP VIEW
COM 1
ISL43110 (SOT-23)
TOP VIEW
8 NO
N.C.
2
7 GND
N.C.
3
6 IN
V+
4
5 N.C.
NO
N.C.
3
6 IN
V+
4
5 N.C.
5 V+
COM 1
7 GND
2
4 IN
ISL43111 (SOT-23)
TOP VIEW
8 NC
N.C.
2
GND 3
ISL43111 (SOIC)
TOP VIEW
COM 1
5 V+
COM 1
NC
2
4 IN
GND 3
NOTE:
1. Switches Shown for Logic “0” Input.
Pin Descriptions
PIN
V+
Truth Table
FUNCTION
GND
Ground Connection
IN
Digital Control Input
COM
LOGIC
ISL43110
ISL43111
0
OFF
ON
1
ON
OFF
System Power Supply Input (+2.4V to +12V)
Analog Switch Common Pin
NO
Analog Switch Normally Open Pin
NC
Analog Switch Normally Closed Pin
N.C.
No Internal Connection
2
NOTE:
Logic “0” ≤ 0.8V. Logic “1” ≥ 2.4V.
ISL43110, ISL43111
Absolute Maximum Ratings
Thermal Information
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to15V
Input Voltages
IN (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
NO, NC (Note 2) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Output Voltages
COM (Note 2). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to ((V+) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current NO, NC, or COM
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . . . . 30mA
ESD Rating (Per MIL-STD-883 Method 3015). . . . . . . . . . . . . >2kV
Thermal Resistance (Typical, Note 3)
θJA (oC/W)
5 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . .
225
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . .
170
Maximum Junction Temperature (Plastic Package) . . . . . . . 150oC
Moisture Sensitivity (See Technical Brief TB363)
All Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Storage Temperature Range. . . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
(Lead Tips Only)
Operating Conditions
Temperature Range
ISL4311XIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
2. Signals on NO, NC, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current ratings.
3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(oC)
(NOTE 5)
MIN
TYP
Full
0
-
V+
V
25
-
11
20
Ω
Full
-
15
25
Ω
25
-
1.5
3
Ω
Full
-
2.5
5
Ω
25
-1
0.01
1
nA
Full
-10
-
10
nA
25
-1
0.01
1
nA
Full
-10
-
10
nA
25
-1
0.01
1
nA
Full
-20
-
20
nA
Input Voltage High, VINH
Full
2.4
-
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
V+ = 5.5V, VIN = 0V or V+
Full
-1
-
1
µA
VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, See Figure 1
25
-
45
80
ns
Full
-
50
120
ns
25
-
20
50
ns
Full
-
28
75
ns
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 4.5V, ICOM = 1.0mA, VCOM = 3.5V,
See Figure 4
RON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 1V, 2V, 3V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 5.5V, VCOM = 1V, 4.5V, VNO or VNC = 4.5V, 1V,
Note 6
COM OFF Leakage Current,
ICOM(OFF)
V+ = 5.5V, VCOM = 4.5V, 1V, VNO or VNC = 1V, 4.5V,
Note 6
COM ON Leakage Current,
ICOM(ON)
V+ = 5.5V, VCOM = 1V, 4.5V, or VNO or VNC = 1V,
4.5V, Note 6
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
VNO or VNC = 3V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V, See Figure 1
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω, See Figure 2
25
-
2
10
pC
OFF Isolation
RL = 50Ω, CL = 15pF, f = 100kHz, See Figure 3
25
-
>90
-
dB
3
ISL43110, ISL43111
Electrical Specifications: 5V Supply
Test Conditions: V+ = +4.5V to +5.5V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
TEMP
(oC)
(NOTE 5)
MIN
TYP
25
-
60
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
15
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
15
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V, See Figure 5
25
-
40
-
pF
Full
-1
-
1
µA
PARAMETER
TEST CONDITIONS
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
(NOTE 5)
MAX
UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 5.5V, VIN = 0V or V+, Switch On or Off
NOTES:
4. VIN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at 25oC.
Electrical Specifications: 12V Supply
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 5V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(oC)
(NOTE 5)
MIN
TYP
Full
0
-
V+
V
25
-
7
10
Ω
Full
-
8
15
Ω
25
-
1
3
Ω
Full
-
1.5
5
Ω
25
-1
-
1
nA
Full
-10
-
10
nA
25
-1
-
1
nA
Full
-10
-
10
nA
25
-1
-
1
nA
Full
-20
-
20
nA
Input Voltage High, VINH
Full
4
3
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
V+ = 13V, VIN = 0V or V+
Full
-1
-
1
µA
VNO or VNC = 10V, RL = 300Ω, CL = 35pF
25
-
37
80
ns
Full
-
42
120
ns
25
-
21
50
ns
Full
-
26
75
ns
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 10.8V, ICOM = 1.0mA, VCOM = 10V
RON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 3V, 6V, 9V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 13V, VCOM = 1V, 10V, VNO or VNC = 10V, 1V,
Note 6
COM OFF Leakage Current,
ICOM(OFF)
V+ = 13V, VCOM = 10V, 1V, VNO or VNC = 1V, 10V,
Note 6
COM ON Leakage Current,
ICOM(ON)
V+ = 13V, VCOM = 1V, 10V, or VNO or VNC = 1V, 10V,
Note 6
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
Turn-OFF Time, tOFF
VNO or VNC = 10V, RL = 300Ω, CL = 35pF
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω
25
-
8
20
pC
OFF Isolation
RL = 50Ω, CL = 15pF, f = 100kHz
25
-
>90
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
67
-
dB
25
-
15
-
pF
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
4
ISL43110, ISL43111
Electrical Specifications: 12V Supply
PARAMETER
Test Conditions: V+ = +10.8V to +13V, GND = 0V, VINH = 5V, VINL = 0.8V (Note 4),
Unless Otherwise Specified (Continued)
TEST CONDITIONS
TEMP
(oC)
(NOTE 5)
MIN
TYP
(NOTE 5)
MAX
UNITS
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
15
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
40
-
pF
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 13V, VIN = 0V or V+, Switch On or Off
Electrical Specifications: 3.3V Supply
Test Conditions: V+ = +3.0V to +3.6V, GND = 0V, VINH = 2.4V, VINL = 0.8V (Note 4),
Unless Otherwise Specified
TEMP
(oC)
(NOTE 5)
MIN
TYP
Full
0
-
V+
V
25
-
15
30
Ω
Full
-
18
40
Ω
25
-
3
5.5
Ω
Full
-
4
7
Ω
25
-1
-
1
nA
Full
-10
-
10
nA
25
-1
-
1
nA
Full
-10
-
10
nA
25
-1
-
1
nA
Full
-20
-
20
nA
Input Voltage High, VINH
Full
2.4
-
-
V
Input Voltage Low, VINL
Full
-
-
0.8
V
V+ = 3.6V, VIN = 0V or V+
Full
-1
-
1
µA
VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V
25
-
55
100
ns
Full
-
70
150
ns
25
-
28
60
ns
Full
-
35
85
ns
PARAMETER
TEST CONDITIONS
(NOTE 5)
MAX
UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
ON Resistance, RON
V+ = 3V, ICOM = 1.0mA, VCOM = 1.5V
RON Flatness, RFLAT(ON)
ICOM = 1.0mA, VCOM = 0.5V, 1V, 1.5V
NO or NC OFF Leakage Current,
INO(OFF) or INC(OFF)
V+ = 3.6V, VCOM = 1V, 3V, VNO or VNC = 3V, 1V, Note
6
COM OFF Leakage Current,
ICOM(OFF)
V+ = 3.6V, VCOM = 3V, 1V, VNO or VNC = 1V, 3V, Note
6
COM ON Leakage Current,
ICOM(ON)
V+ = 3.6V, VCOM = 1V, 3V, or VNO or VNC = 1V, 3V,
or floating, Note 6
DIGITAL INPUT CHARACTERISTICS
Input Current, IINH, IINL
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VNO or VNC = 1.5V, RL = 300Ω, CL = 35pF,
VIN = 0 to 3V
Turn-OFF Time, tOFF
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω
25
-
2
10
pC
OFF Isolation
RL = 50Ω, CL = 15pF, f = 100kHz
25
-
>90
-
dB
Power Supply Rejection Ratio
RL = 50Ω, CL = 5pF, f = 1MHz
25
-
58
-
dB
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V
25
-
15
-
pF
COM OFF Capacitance,
CCOM(OFF)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
15
-
pF
COM ON Capacitance, CCOM(ON)
f = 1MHz, VNO or VNC = VCOM = 0V
25
-
40
-
pF
Full
-1
-
1
µA
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+, Switch On or Off
5
ISL43110, ISL43111
Test Circuits and Waveforms
3V or 5V
LOGIC
INPUT
V+
tr < 20ns
tf < 20ns
50%
C
0V
tOFF
SWITCH
INPUT
SWITCH
INPUT
COM
IN
VOUT
90%
SWITCH
OUTPUT
VOUT
NO or NC
90%
0V
LOGIC
INPUT
CL
35pF
RL
300Ω
GND
tON
Logic input waveform is inverted for switches that have the opposite
logic sense.
CL includes fixture and stray capacitance. R
L
-----------------------------V OUT = V
(NO or NC) R + R
L
( ON )
FIGURE 1B. TEST CIRCUIT
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1. SWITCHING TIMES
V+
SWITCH
OUTPUT
VOUT
∆VOUT
RG
ON
ON
LOGIC
INPUT
VOUT
COM
NO or NC
VG
OFF
C
GND
IN
CL
LOGIC
INPUT
Q = ∆VOUT x CL
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
V+
V+
C
C
RON = V1/1mA
SIGNAL
GENERATOR
COM
NO or NC
VCOM
IN
0V or V+
1mA
IN
V1
COM
ANALYZER
GND
NO or NC
GND
RL
FIGURE 3. OFF ISOLATION TEST CIRCUIT
6
FIGURE 4. RON TEST CIRCUIT
0.8V or VINH
ISL43110, ISL43111
Test Circuits and Waveforms (Continued)
V+
NO or NC
IN
IMPEDANCE
ANALYZER
0V or V+
COM
GND
FIGURE 5. CAPACITANCE TEST CIRCUIT
Detailed Description
The ISL43110 and ISL43111 analog switches offer precise
switching capability from a single 2.4V to 12V supply with
low on-resistance and high speed operation. The devices
are especially well suited to portable battery powered
equipment thanks to the low operating supply voltage (2.4V),
low power consumption (5µW), low leakage currents (1nA
max), and the tiny SOT-23 packaging. High frequency
applications also benefit from the wide bandwidth, and the
very high off isolation.
Supply Sequencing And Overvoltage Protection
As with any CMOS device, proper power supply sequencing
is required to protect the device from excessive input
currents which might permanently damage the IC. All I/O
pins contain ESD protection diodes from the pin to V+ and to
GND (see Figure 6). To prevent forward biasing these
diodes, V+ must be applied before any input signals, and
input signal voltages must remain between V+ and GND. If
these conditions cannot be guaranteed, then one of the
following two protection methods should be employed.
Logic inputs can easily be protected by adding a 1kΩ
resistor in series with the input (see Figure 6). The resistor
limits the input current below the threshold that produces
permanent damage, and the sub-microamp input current
produces an insignificant voltage drop during normal
operation.
Adding a series resistor to the switch input defeats the
purpose of using a low RON switch, so two small signal
diodes can be added in series with the supply pins to provide
overvoltage protection for all pins (see Figure 6). These
additional diodes limit the analog signal from 1V below V+ to
1V above GND. The low leakage current performance is
7
unaffected by this approach, but the switch resistance may
increase, especially at low supply voltages.
OPTIONAL PROTECTION
DIODE
V+
OPTIONAL
PROTECTION
RESISTOR
IN
VNO or NC
VCOM
GND
OPTIONAL PROTECTION
DIODE
FIGURE 6. OVERVOLTAGE PROTECTION
Power-Supply Considerations
The ISL4311X construction is typical of most CMOS analog
switches, except that there are only two supply pins: V+ and
GND. Unlike switches with a 13V maximum supply voltage,
the ISL4311X 15V maximum supply voltage provides plenty
of room for the 10% tolerance of 12V supplies, as well as
room for overshoot and noise spikes.
The minimum recommended supply voltage is 2.4V. It is
important to note that the input signal range, switching times,
and on-resistance degrade at lower supply voltages. Refer
ISL43110, ISL43111
to the electrical specification tables and Typical Performance
Curves for details.
response is very consistent over a wide V+ range, and for
varying analog signal levels.
V+ and GND power the internal CMOS switches and set
their analog voltage limits. These supplies also power the
internal logic and level shifters. The level shifters convert the
input logic levels to switched V+ and GND signals to drive
the analog switch gate terminals.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal
feedthrough from a switch’s input to its output. Off Isolation
is the resistance to this feedthrough. Figure 16 details the
high Off Isolation provided by this family. At 10MHz, off
isolation is about 50dB in 50Ω systems, decreasing
approximately 20dB per decade as frequency increases.
Higher load impedances decrease Off Isolation due to the
voltage divider action of the switch OFF impedance and the
load impedance.
This family of switches cannot be operated with bipolar
supplies, because the input switching point becomes
negative in this configuration. For a ±5V single SPST switch,
see the ISL43112/13 data sheet.
Logic-Level Thresholds
This switch family is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V, and the full temperature range
(see Figure 10). At 12V the low temperature VIH level is
about 2.5V. This is still below the TTL guaranteed high
output minimum level of 2.8V, but noise margin is reduced.
For best results with a 12V supply, use a logic family the
provides a VOH greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat to
20MHz, with a -3dB bandwidth exceeding 200MHz (see
Figure 15). Figure 15 also illustrates that the frequency
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One
of these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the analogsignal-path leakage current. All analog leakage current flows
between each pin and one of the supply terminals, not to the
other switch terminal. This is why both sides of a given
switch can show leakage currents of the same or opposite
polarity. There is no connection between the analog-signal
paths and V+ or GND.
Typical Performance Curves TA = 25oC, Unless Otherwise Specified
20
25
VCOM = (V+) - 1V
ICOM = 1mA
85oC
12
25oC
15
V+ = 5V
13
85oC
10
-40oC
25oC
11
85oC
9
25oC
7
-40oC
5
9
5
85oC
7
5
0
3
4
5
V+ = 3.3V
-40oC
8
15
RON (Ω)
RON (Ω)
20
ICOM = 1mA
16
6
7
8
V+ (V)
9
10
11
FIGURE 7. ON RESISTANCE vs SUPPLY VOLTAGE
8
12
13
3
V+ = 12V
25oC
-40oC
0
2
4
6
VCOM (V)
8
10
FIGURE 8. ON RESISTANCE vs SWITCH VOLTAGE
12
ISL43110, ISL43111
Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
150
3.0
V+ = 12V
-40oC
2.5
100
VINH AND VINL (V)
Q (pC)
VINH
50
V+ = 5V
V+ = 3.3V
0
85oC
25oC
-40oC
VINL
1.5
25oC
85oC
1.0
V+ = 12V
-50
2.0
0.5
0
2
4
6
8
10
VCOM (V)
6
5
7
8
V+ (V)
9
10
11
13
VCOM = (V+) - 1V
RL = 300Ω
120
12
60
VCOM = (V+) - 1V
130
4
FIGURE 10. DIGITAL SWITCHING POINT vs SUPPLY VOLTAGE
FIGURE 9. CHARGE INJECTION vs SWITCH VOLTAGE
140
3
2
12
RL = 300Ω
50
110
90
tOFF (ns)
tON (ns)
100
85oC
80
70
40
85oC
30
25oC
25oC
60
50
-40oC
40
30
20
2
3
4
5
6
7
V+ (V)
8
9
10
11
10
12
FIGURE 11. TURN - ON TIME vs SUPPLY VOLTAGE
-40oC
2
3
4
5
6
7
V+ (V)
8
9
10
11
12
FIGURE 12. TURN - OFF TIME vs SUPPLY VOLTAGE
40
60
RL = 300Ω
V+ = 3.3V
RL = 300Ω
V+ = 3.3V
35
50
30
tON (ns)
tOFF (ns)
V+ = 5V
40
V+ = 12V
30
25
V+ = 5V
20
V+ = 12V
20
10
0
15
1
2
3
4
5
6
7
8
9
10
VCOM (V)
FIGURE 13. TURN - ON TIME vs SWITCH VOLTAGE
9
11
12
10
0
1
2
3
4
5
6
7
8
9
10
VCOM (V)
FIGURE 14. TURN - OFF TIME vs SWITCH VOLTAGE
11
12
ISL43110, ISL43111
10
0
V+ = 3V to 13V
20 RL = 50Ω
GAIN
V+ = 3.3V
-3
30
-6
OFF ISOLATION (dB)
V+ = 12V
0
PHASE
V+ = 12V
PHASE (DEGREES)
NORMALIZED GAIN (dB)
Typical Performance Curves TA = 25oC, Unless Otherwise Specified (Continued)
20
40
V+ = 3.3V
80
RL = 50Ω
VIN = 0.2VP-P to 2.5VP-P (V+ = 3.3V)
VIN = 0.2VP-P to 5VP-P (V+ = 12V)
1
60
100
50
60
70
80
90
100
100
10
40
110
1k
600
10k
FREQUENCY (MHz)
100k
FIGURE 15. FREQUENCY RESPONSE
RL = 50Ω
V+ = 12V, SWITCH OFF
10
PSRR (dB)
20
V+ = 3.3V, SWITCH OFF
40
V+ = 12V, SWITCH ON
50
60
V+ = 3.3V, SWITCH ON
70
80
0.3
1
10
100
FREQUENCY (MHz)
FIGURE 17. PSRR vs FREQUENCY
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
ISL43110: 40
ISL43111: 40
PROCESS:
Si Gate CMOS
10
10M
FIGURE 16. OFF ISOLATION
0
30
1M
FREQUENCY (Hz)
1000
100M
500M
ISL43110, ISL43111
Small Outline Plastic Packages (SOIC)
M8.15 (JEDEC MS-012-AA ISSUE C)
N
INDEX
AREA
0.25(0.010) M
H
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
B M
E
INCHES
-B-
1
2
SYMBOL
3
L
SEATING PLANE
-A-
h x 45o
A
D
-C-
µa
e
A1
B
0.25(0.010) M
C
C A M
B S
7. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
8. Dimensioning and tolerancing per ANSI Y14.5M-1982.
9. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
10. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch)
per side.
11. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
12. “L” is the length of terminal for soldering to a substrate.
13. “N” is the number of terminal positions.
14. Terminal numbers are shown for reference only.
15. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
16. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
11
MILLIMETERS
MIN
MAX
NOTES
A
0.0532
0.0688
1.35
1.75
-
0.0040
0.0098
0.10
0.25
-
B
0.013
0.020
0.33
0.51
9
C
0.0075
0.0098
0.19
0.25
-
D
0.1890
0.1968
4.80
5.00
3
E
0.1497
0.1574
3.80
4.00
4
0.050 BSC
1.27 BSC
-
H
0.2284
0.2440
5.80
6.20
-
h
0.0099
0.0196
0.25
0.50
5
L
0.016
0.050
0.40
1.27
6
8o
0o
N
NOTES:
MAX
A1
e
0.10(0.004)
MIN
α
8
0o
8
7
8o
Rev. 0 12/93
ISL43110, ISL43111
Small Outline Transistor Plastic Packages (SOT23-5)
P5.064
D
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e1
INCHES
SYMBOL
L
E
CL
CL
e
E1
b
CL
α
0.20 (0.008) M
C
C
CL
A
A2
A1
SEATING
PLANE
-C-
MIN
MAX
MILLIMETERS
MIN
MAX
NOTES
A
0.036
0.057
0.90
1.45
-
A1
0.000
0.0059
0.00
0.15
-
A2
0.036
0.051
0.90
1.30
-
b
0.0138
0.0196
0.35
0.50
-
C
0.0036
0.0078
0.09
0.20
-
D
0.111
0.118
2.80
3.00
3
E
0.103
0.118
2.60
3.00
-
E1
0.060
0.068
1.50
1.75
3
e
0.0374 Ref
0.95 Ref
-
e1
0.0748 Ref
1.90 Ref
-
L
0.004
N
α
0.023
0.10
5
0o
0.60
5
10o
0o
4, 5
6
10o
0.10 (0.004) C
Rev. 0 10/98
NOTES:
17. Dimensioning and tolerances per ANSI 14.5M-1982.
18. Package conforms to EIAJ SC-74A (1992).
19. Dimensions D and E1 are exclusive of mold flash, protrusions, or
gate burrs.
20. Footlength L measured at reference to seating plane.
21. “L” is the length of flat foot surface for soldering to substrate.
22. “N” is the number of terminal positions.
23. Controlling dimension: MILLIMETER. Converted inch
dimensions are not necessarily exact.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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12
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