NXP NX3L1T3157 Low-ohmic single-pole double-throw analog switch Datasheet

NX3L1T3157
Low-ohmic single-pole double-throw analog switch
Rev. 07 — 21 January 2010
Product data sheet
1. General description
The NX3L1T3157 is a low-ohmic single-pole double-throw analog switch suitable for use
as an analog or digital 2:1 multiplexer/demultiplexer. It has a digital select input (S), two
independent inputs/outputs (Y0 and Y1) and a common input/output (Z).
Schmitt trigger action at the digital input makes the circuit tolerant to slower input rise and
fall times. Low threshold digital input allows this device to be driven by 1.8 V logic levels in
3.3 V applications without significant increase in supply current ICC. The NX3L1T3157
allows signals with amplitude up to VCC to be transmitted from Z to Y0 or Y1, or from Y0 or
Y1 to Z. Its low ON resistance (0.5 Ω) and flatness (0.13 Ω) ensures minimal attenuation
and distortion of transmitted signals.
2. Features
„ Wide supply voltage range from 1.4 V to 4.3 V
„ Very low ON resistance (peak):
‹ 1.6 Ω (typical) at VCC = 1.4 V
‹ 1.0 Ω (typical) at VCC = 1.65 V
‹ 0.55 Ω (typical) at VCC = 2.3 V
‹ 0.50 Ω (typical) at VCC = 2.7 V
‹ 0.50 Ω (typical) at VCC = 4.3 V
„ Break-before-make switching
„ High noise immunity
„ ESD protection:
‹ HBM JESD22-A114E Class 3A exceeds 7500 V
‹ MM JESD22-A115-A exceeds 200 V
‹ CDM AEC-Q100-011 revision B exceeds 1000 V
‹ IEC61000-4-2 contact discharge exceeds 8000 V for switch ports
„ CMOS low-power consumption
„ Latch-up performance exceeds 100 mA per JESD 78 Class II Level A
„ 1.8 V control logic at VCC = 3.6 V
„ Control input accepts voltages above supply voltage
„ Very low supply current, even when input is below VCC
„ High current handling capability (350 mA continuous current under 3.3 V supply)
„ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
3. Applications
„ Cell phone
„ PDA
„ Portable media player
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range
Name
Description
Version
NX3L1T3157GW
−40 °C to +125 °C
SC-88
plastic surface-mounted package; 6 leads
SOT363
NX3L1T3157GM
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads;
6 terminals; body 1 × 1.45 × 0.5 mm
SOT886
5. Marking
Table 2.
Marking codes[1]
Type number
Marking code
NX3L1T3157GW
MI
NX3L1T3157GM
MI
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
6. Functional diagram
Y1
S
Z
S 6
1 Y1
Z 4
Y0
3 Y0
001aac355
001aac354
Fig 1.
Logic symbol
Fig 2.
Logic diagram
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
7. Pinning information
7.1 Pinning
NX3L1T3157
NX3L1T3157
Y1
1
6
Y1
1
6
S
GND
2
5
VCC
Y0
3
4
Z
S
GND
2
5
VCC
Y0
3
4
Z
001aah441
Transparent top view
001aai329
Fig 3. Pin configuration SOT363 (SC-88)
Fig 4.
Pin configuration SOT886 (XSON6)
7.2 Pin description
Table 3.
Pin description
Symbol
Pin
Description
Y1
1
independent input or output
GND
2
ground (0 V)
Y0
3
independent input or output
Z
4
common output or input
VCC
5
supply voltage
S
6
select input
8. Functional description
Table 4.
Function table[1]
Input S
Channel on
L
Y0
H
Y1
[1]
H = HIGH voltage level; L = LOW voltage level.
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
3 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
9. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Max
Unit
−0.5
+4.6
V
[1]
−0.5
+4.6
V
[2]
−0.5
VCC + 0.5 V
VI
input voltage
VSW
switch voltage
IIK
input clamping current
VI < −0.5 V
−50
-
mA
ISK
switch clamping current
VI < −0.5 V or VI > VCC + 0.5 V
-
±50
mA
ISW
switch current
VSW > −0.5 V or VSW < VCC + 0.5 V;
source or sink current
-
±350
mA
VSW > −0.5 V or VSW < VCC + 0.5 V;
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
-
±500
mA
−65
+150
°C
-
250
mW
Tstg
select input S
Min
storage temperature
Ptot
total power dissipation
Tamb = −40 °C to +125 °C
[3]
[1]
The minimum input voltage rating may be exceeded if the input current rating is observed.
[2]
The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not
exceed 4.6 V.
[3]
For SC-88 package: above 87.5 °C the value of Ptot derates linearly with 4.0 mW/K.
For XSON6 package: above 118 °C the value of Ptot derates linearly with 7.8 mW/K.
10. Recommended operating conditions
Table 6.
Recommended operating conditions
Symbol Parameter
VCC
supply voltage
VI
input voltage
VSW
switch voltage
Tamb
ambient temperature
Δt/ΔV
input transition rise and fall rate
Conditions
select input S
[1]
VCC = 1.4 V to 4.3 V
[2]
Min
Max
Unit
1.4
4.3
V
0
4.3
V
0
VCC
V
−40
+125
°C
-
200
ns/V
[1]
To avoid sinking GND current from terminal Z when switch current flows in terminal Yn, the voltage drop across the bidirectional switch
must not exceed 0.4 V. If the switch current flows into terminal Z, no GND current will flow from terminal Yn. In this case, there is no limit
for the voltage drop across the switch.
[2]
Applies to control signal levels.
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
11. Static characteristics
Table 7.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground 0 V).
Symbol Parameter
VIH
VIL
HIGH-level
input voltage
LOW-level
input voltage
Max
Min
VCC = 1.4 V to 1.6 V
0.9
-
-
0.9
-
-
V
VCC = 1.65 V to 1.95 V
0.9
-
-
0.9
-
-
V
VCC = 2.3 V to 2.7 V
1.1
-
-
1.1
-
-
V
VCC = 2.7 V to 3.6 V
1.3
-
-
1.3
-
-
V
VCC = 3.6 V to 4.3 V
1.4
-
-
1.4
-
-
V
VCC = 1.4 V to 1.6 V
-
-
0.3
-
0.3
0.3
V
VCC = 1.65 V to 1.95 V
-
-
0.4
-
0.4
0.3
V
VCC = 2.3 V to 2.7 V
-
-
0.4
-
0.4
0.4
V
VCC = 2.7 V to 3.6 V
-
-
0.5
-
0.5
0.5
V
VCC = 3.6 V to 4.3 V
-
-
0.6
-
0.6
0.6
V
-
-
-
-
±0.5
±1
μA
VCC = 1.4 V to 3.6 V
-
-
±5
-
±50
±500
nA
VCC = 3.6 V to 4.3 V
-
-
±10
-
±50
±500
nA
VCC = 1.4 V to 3.6 V
-
-
±5
-
±50
±500
nA
VCC = 3.6 V to 4.3 V
-
-
±10
-
±50
±500
nA
VCC = 3.6 V
-
-
100
-
690
6000
nA
VCC = 4.3 V
select input S;
VI = GND to 4.3 V;
VCC = 1.4 V to 4.3 V
IS(OFF)
OFF-state
leakage
current
Y0 and Y1 port;
see Figure 5
ICC
ΔICC
Unit
Typ
input leakage
current
ON-state
leakage
current
Tamb = −40 °C to +125 °C
Min
II
IS(ON)
Tamb = 25 °C
Conditions
Max
Max
(85 °C) (125 °C)
Z port; see Figure 6
supply current VI = VCC or GND;
VSW = GND or VCC
-
-
150
-
800
7000
nA
additional
VSW = GND or VCC
supply current
VI = 2.6 V; VCC = 4.3 V
-
2.0
4.0
-
7
7
μA
VI = 2.6 V; VCC = 3.6 V
-
0.35
0.7
-
1
1
μA
VI = 1.8 V; VCC = 4.3 V
-
7.0
10.0
-
15
15
μA
VI = 1.8 V; VCC = 3.6 V
-
2.5
4.0
-
5
5
μA
VI = 1.8 V; VCC = 2.5 V
-
50
200
-
300
500
nA
CI
input
capacitance
-
1.0
-
-
-
-
pF
CS(OFF)
OFF-state
capacitance
-
35
-
-
-
-
pF
CS(ON)
ON-state
capacitance
-
130
-
-
-
-
pF
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
11.1 Test circuits
VCC
VIL or VIH
S
Y0
1
Z
Y1
2
switch
switch
S
1
VIH
2
VIL
IS
VI
VO
GND
001aac358
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 5.
Test circuit for measuring OFF-state leakage current
VCC
VIL or VIH
IS
S
Y0
1
Z
Y1
2
VI
switch
S
1
VIH
2
VIL
switch
VO
GND
001aac359
VI = 0.3 V or VCC − 0.3 V; VO = VCC − 0.3 V or 0.3 V.
Fig 6.
Test circuit for measuring ON-state leakage current
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
11.2 ON resistance
Table 8.
ON resistance
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 8 to Figure 14.
Symbol
RON(peak)
Parameter
ON resistance
(peak)
Tamb = −40 °C to +85 °C Tamb = −40 °C to +125 °C Unit
Conditions
Min
Typ[1]
Max
Min
Max
VCC = 1.4 V
-
1.6
3.7
-
4.1
Ω
VCC = 1.65 V
-
1.0
1.6
-
1.7
Ω
VCC = 2.3 V
-
0.55
0.8
-
0.9
Ω
VCC = 2.7 V
-
0.5
0.75
-
0.9
Ω
-
0.5
0.75
-
0.9
Ω
VCC = 1.4 V
-
0.04
0.3
-
0.3
Ω
VCC = 1.65 V
-
0.04
0.2
-
0.3
Ω
VCC = 2.3 V
-
0.02
0.08
-
0.1
Ω
VCC = 2.7 V
-
0.02
0.075
-
0.1
Ω
VCC = 4.3 V
-
0.02
0.075
-
0.1
Ω
VCC = 1.4 V
-
1.0
3.3
-
3.6
Ω
VCC = 1.65 V
-
0.5
1.2
-
1.3
Ω
VCC = 2.3 V
-
0.15
0.3
-
0.35
Ω
VCC = 2.7 V
-
0.13
0.3
-
0.35
Ω
VCC = 4.3 V
-
0.2
0.4
-
0.45
Ω
VI = GND to VCC;
ISW = 100 mA; see Figure 7
VCC = 4.3 V
ΔRON
RON(flat)
ON resistance
mismatch
between
channels
ON resistance
(flatness)
[2]
VI = GND to VCC;
ISW = 100 mA
[3]
VI = GND to VCC;
ISW = 100 mA
[1]
Typical values are measured at Tamb = 25 °C.
[2]
Measured at identical VCC, temperature and input voltage.
[3]
Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and
temperature.
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
7 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
11.3 ON resistance test circuit and graphs
001aag564
1.6
RON
(Ω)
1.2
(1)
VSW
V
VCC
S
VIL or VIH
Z
Y0 1 switch
Y1 2
VI
0.8
switch
S
1
VIL
2
VIH
(2)
(3)
(4)
0.4
(5)
(6)
ISW
0
GND
0
1
2
RON = VSW / ISW.
3
4
5
VI (V)
001aag563
(1) VCC = 1.5 V.
(2) VCC = 1.8 V.
(3) VCC = 2.5 V.
(4) VCC = 2.7 V.
(5) VCC = 3.3 V.
(6) VCC = 4.3 V.
Measured at Tamb = 25 °C.
Fig 7.
Test circuit for measuring ON resistance
Fig 8.
Typical ON resistance as a function of input
voltage
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
001aag565
1.6
001aag566
1.0
RON
(Ω)
RON
(Ω)
0.8
1.2
(1)
(2)
(3)
(4)
0.6
(1)
(2)
(3)
(4)
0.8
0.4
0.4
0.2
0
0
0
1
2
3
0
1
2
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 9.
ON resistance as a function of input voltage;
VCC = 1.5 V
001aag567
1.0
3
VI (V)
RON
(Ω)
Fig 10. ON resistance as a function of input voltage;
VCC = 1.8 V
001aag568
1.0
RON
(Ω)
0.8
0.8
0.6
0.6
(1)
(2)
(3)
(4)
0.4
0.4
0.2
0.2
0
(1)
(2)
(3)
(4)
0
0
1
2
3
0
VI (V)
2
3
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 11. ON resistance as a function of input voltage;
VCC = 2.5 V
Fig 12. ON resistance as a function of input voltage;
VCC = 2.7 V
NX3L1T3157_7
Product data sheet
1
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
9 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
001aag569
1.0
RON
(Ω)
001aaj896
1.0
RON
(Ω)
0.8
0.8
0.6
0.6
(1)
(2)
(3)
(4)
0.4
(1)
(2)
(3)
(4)
0.4
0.2
0.2
0
0
0
1
2
3
4
0
1
2
3
4
VI (V)
5
VI (V)
(1) Tamb = 125 °C.
(1) Tamb = 125 °C.
(2) Tamb = 85 °C.
(2) Tamb = 85 °C.
(3) Tamb = 25 °C.
(3) Tamb = 25 °C.
(4) Tamb = −40 °C.
(4) Tamb = −40 °C.
Fig 13. ON resistance as a function of input voltage;
VCC = 3.3 V
Fig 14. ON resistance as a function of input voltage;
VCC = 4.3 V
12. Dynamic characteristics
Table 9.
Dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17.
Symbol Parameter
ten
tdis
enable time
disable time
25 °C
Conditions
Unit
Min
Max
Min
Max
(85 °C)
Max
(125 °C)
VCC = 1.4 V to 1.6 V
-
50
90
-
120
120
ns
VCC = 1.65 V to 1.95 V
-
36
70
-
80
90
ns
VCC = 2.3 V to 2.7 V
-
24
45
-
50
55
ns
VCC = 2.7 V to 3.6 V
-
22
40
-
45
50
ns
VCC = 3.6 V to 4.3 V
-
22
40
-
45
50
ns
VCC = 1.4 V to 1.6 V
-
32
70
-
80
90
ns
VCC = 1.65 V to 1.95 V
-
20
55
-
60
65
ns
VCC = 2.3 V to 2.7 V
-
12
25
-
30
35
ns
VCC = 2.7 V to 3.6 V
-
10
20
-
25
30
ns
VCC = 3.6 V to 4.3 V
-
10
20
-
25
30
ns
S to Z or Yn;
see Figure 15
S to Z or Yn;
see Figure 15
NX3L1T3157_7
Product data sheet
−40 °C to +125 °C
Typ[1]
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
10 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
Table 9.
Dynamic characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 17.
Symbol Parameter
tb-m
25 °C
Conditions
−40 °C to +125 °C
Unit
Min
Typ[1]
Max
Min
Max
(85 °C)
Max
(125 °C)
-
19
-
9
-
-
ns
VCC = 1.65 V to 1.95 V
-
17
-
7
-
-
ns
VCC = 2.3 V to 2.7 V
-
13
-
4
-
-
ns
VCC = 2.7 V to 3.6 V
-
10
-
3
-
-
ns
VCC = 3.6 V to 4.3 V
-
10
-
2
-
-
ns
break-before-make see Figure 16
time
VCC = 1.4 V to 1.6 V
[2]
[1]
Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 and 4.3 V respectively.
[2]
Break-before-make guaranteed by design.
12.1 Waveform and test circuits
VI
VM
S input
GND
ten
VOH
Y1 connected to VEXT
tdis
VX
Z output
OFF to HIGH
HIGH to OFF
VX
GND
tdis
Y0 connected to VEXT
Z output
HIGH to OFF
OFF to HIGH
VOH
ten
VX
VX
001aag570
GND
Measurement points are given in Table 10.
Logic level: VOH is typical output voltage level that occurs with the output load.
Fig 15. Enable and disable times
Table 10.
Measurement points
Supply voltage
Input
Output
VCC
VM
VX
1.4 V to 4.3 V
0.5VCC
0.9VOH
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
VCC
S
Y0
Z
G
VI
V
VO
RL
Y1
VEXT = 1.5 V
CL
GND
001aag571
a. Test circuit
VI
0.5VI
0.9VO
0.9VO
VO
tb-m
001aag572
b. Input and output measurement points
Fig 16. Test circuit for measuring break-before-make timing
VCC
G
VI
V
VO
RL
S
Y0
1
Z
Y1
2
switch
VEXT = 1.5 V
CL
GND
001aag642
Test data is given in Table 11.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
VEXT = External voltage for measuring switching times.
Fig 17. Load circuit for switching times
Table 11.
Test data
Supply voltage
Input
Load
VCC
VI
tr, tf
CL
RL
1.4 V to 4.3 V
VCC
≤ 2.5 ns
35 pF
50 Ω
NX3L1T3157_7
Product data sheet
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Rev. 07 — 21 January 2010
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NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
12.2 Additional dynamic characteristics
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf ≤ 2.5 ns; Tamb = 25 °C.
Symbol Parameter
Conditions
THD
fi = 20 Hz to 20 kHz; RL = 32 Ω; see Figure 18
f(−3dB)
αiso
total harmonic
distortion
Min
Qinj
0.15
-
%
VCC = 1.65 V; VI = 1.2 V (p-p)
-
0.10
-
%
VCC = 2.3 V; VI = 1.5 V (p-p)
-
0.02
-
%
VCC = 2.7 V; VI = 2 V (p-p)
-
0.02
-
%
VCC = 4.3 V; VI = 2 V (p-p)
-
0.02
-
%
-
60
-
MHz
-
−90
-
dB
VCC = 1.4 V to 3.6 V
-
0.2
-
V
VCC = 3.6 V to 4.3 V
-
0.3
-
V
VCC = 1.5 V
-
3
-
pC
VCC = 1.8 V
-
4
-
pC
VCC = 2.5 V
-
6
-
pC
VCC = 3.3 V
-
9
-
pC
VCC = 4.3 V
-
15
-
pC
RL = 50 Ω; see Figure 19
isolation (OFF-state)
fi = 100 kHz; RL = 50 Ω; see Figure 20
[1]
charge injection
Unit
-
−3 dB frequency
response
crosstalk voltage
Max
VCC = 1.4 V; VI = 1 V (p-p)
[1]
VCC = 1.4 V to 4.3 V
[1]
VCC = 1.4 V to 4.3 V
Vct
Typ
[1]
between digital inputs and switch;
fi = 1 MHz; CL = 50 pF; RL = 50 Ω; see Figure 21
fi = 1 MHz; CL = 0.1 nF; RL = 1 MΩ; Vgen = 0 V;
Rgen = 0 Ω; see Figure 22
fi is biased at 0.5VCC.
12.3 Test circuits
VCC
0.5VCC
RL
S
VIL or VIH
Z
Y0 1 switch
Y1 2
fi
switch
S
1
VIL
2
VIH
D
GND
001aag573
Fig 18. Test circuit for measuring total harmonic distortion
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
13 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
VCC
0.5VCC
RL
S
VIL or VIH
Y0 1 switch
Y1 2
Z
fi
switch
S
1
VIL
2
VIH
dB
GND
001aag574
Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3 dB.
Fig 19. Test circuit for measuring the frequency response when channel is in ON-state
0.5VCC
VCC
0.5VCC
RL
RL
S
VIL or VIH
Y0 1 switch
Y1 2
Z
fi
switch
S
1
VIH
2
VIL
dB
GND
001aag561
Adjust fi voltage to obtain 0 dBm level at input.
Fig 20. Test circuit for measuring isolation (OFF-state)
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
14 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
VCC
VI
G
logic
input
S
Y0
1
Z
Y1
2
switch
S
1
VIL
2
VIH
switch
RL
RL
0.5VCC
0.5VCC
CL
V
VO
001aah442
a. Test circuit
logic
input (S)
off
on
off
Vct
VO
001aah443
b. Input and output pulse definitions
Fig 21. Test circuit for measuring crosstalk voltage between digital inputs and switch
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
15 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
VCC
S
Y0
1
Z
Y1
2
switch
Rgen
VI
G
VO
RL
CL
Vgen
GND
001aac366
a. Test circuit
logic
(S) off
input
on
VO
off
ΔVO
001aac478
b. Input and output pulse definitions
Definition: Qinj = ΔVO × CL.
ΔVO = output voltage variation.
Rgen = generator resistance.
Vgen = generator voltage.
Fig 22. Test circuit for measuring charge injection
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
16 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
13. Package outline
Plastic surface-mounted package; 6 leads
SOT363
D
E
B
y
X
A
HE
6
5
v M A
4
Q
pin 1
index
A
A1
1
2
e1
3
c
bp
Lp
w M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
max
bp
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.1
0.8
0.1
0.30
0.20
0.25
0.10
2.2
1.8
1.35
1.15
1.3
0.65
2.2
2.0
0.45
0.15
0.25
0.15
0.2
0.2
0.1
OUTLINE
VERSION
REFERENCES
IEC
SOT363
JEDEC
JEITA
SC-88
EUROPEAN
PROJECTION
ISSUE DATE
04-11-08
06-03-16
Fig 23. Package outline SOT363 (SC-88)
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
17 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
SOT886
b
1
2
3
4×
(2)
L
L1
e
6
5
4
e1
e1
6×
A
(2)
A1
D
E
terminal 1
index area
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A (1)
max
A1
max
b
D
E
e
e1
L
L1
mm
0.5
0.04
0.25
0.17
1.5
1.4
1.05
0.95
0.6
0.5
0.35
0.27
0.40
0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
SOT886
REFERENCES
IEC
JEDEC
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
MO-252
Fig 24. Package outline SOT886 (XSON6)
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
18 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
14. Abbreviations
Table 13.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
PDA
Personal Digital Assistant
15. Revision history
Table 14.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
NX3L1T3157_7
20100121
Product data sheet
-
NX3L1T3157_6
Modifications:
•
•
Section 2: IEC61000-4-2 added.
Table 8: ON resistance (flatness) changed at VCC = 4.3 V.
NX3L1T3157_6
20090415
Product data sheet
-
NX3L1T3157_5
NX3L1T3157_5
20080728
Product data sheet
-
NX3L1T3157_4
NX3L1T3157_4
20080718
Product data sheet
-
NX3L1T3157_3
NX3L1T3157_3
20080408
Product data sheet
-
NX3L1T3157_2
NX3L1T3157_2
20080306
Product data sheet
-
NX3L1T3157_1
NX3L1T3157_1
20080103
Product data sheet
-
-
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
19 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
NX3L1T3157_7
Product data sheet
© NXP B.V. 2010. All rights reserved.
Rev. 07 — 21 January 2010
20 of 21
NX3L1T3157
NXP Semiconductors
Low-ohmic single-pole double-throw analog switch
18. Contents
1
2
3
4
5
6
7
7.1
7.2
8
9
10
11
11.1
11.2
11.3
12
12.1
12.2
12.3
13
14
15
16
16.1
16.2
16.3
16.4
17
18
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7
ON resistance test circuit and graphs. . . . . . . . 8
Dynamic characteristics . . . . . . . . . . . . . . . . . 10
Waveform and test circuits . . . . . . . . . . . . . . . 11
Additional dynamic characteristics . . . . . . . . . 13
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19
Legal information. . . . . . . . . . . . . . . . . . . . . . . 20
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 20
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information. . . . . . . . . . . . . . . . . . . . . 20
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 21 January 2010
Document identifier: NX3L1T3157_7
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