ON NCV4276A 400 ma low−drop voltage regulator Datasheet

NCV4276, NCV4276A
400 mA Low−Drop Voltage
Regulator
The NCV4276 is a 400 mA output current integrated low dropout
regulator family designed for use in harsh automotive environments.
It includes wide operating temperature and input voltage ranges. The
device is offered with fixed output voltage options of 1.8 V and 2.5 V
with 4% output voltage accuracy while the 3.3 V, 5.0 V, and
adjustable voltage versions are available either in 2% or 4% output
voltage accuracy. It has a high peak input voltage tolerance and
reverse input voltage protection. It also provides overcurrent
protection, overtemperature protection and inhibit for control of the
state of the output voltage. The NCV4276 family is available in
DPAK and D2PAK surface mount packages. The output is stable over
a wide output capacitance and ESR range.
Features
• 2.5 V and 1.8 V ±4% Output Voltage
• 3.3 V, 5.0 V, and Adjustable Voltage Version (from 2.5 V to 20 V)
•
•
•
•
•
•
•
±4% or ±2% Output Voltage
400 mA Output Current
500 mV (max) Dropout Voltage (5.0 V Output)
Inhibit Input
Very Low Current Consumption
Fault Protection
♦ +45 V Peak Transient Voltage
♦ −42 V Reverse Voltage
♦ Short Circuit
♦ Thermal Overload
NCV Prefix for Automotive and Other Applications Requiring Site
and Control Changes
Pb−Free Packages are Available
http://onsemi.com
1
5
DPAK
5−PIN
DT SUFFIX
CASE 175AA
1
5
D2PAK
5−PIN
DS SUFFIX
CASE 936A
DEVICE MARKING INFORMATION
See general marking information in the device marking
section on page 20 of this data sheet.
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 21 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 18
1
Publication Order Number:
NCV4276/D
NCV4276, NCV4276A
I
Q
Bandgap
Reference
Error
Amplifier
Current Limit and
Saturation Sense
−
+
Thermal
Shutdown
INH
GND
NC
Figure 1. 4276 Block Diagram
I
Q
Bandgap
Reference
Error
Amplifier
Current Limit and
Saturation Sense
−
+
Thermal
Shutdown
INH
GND
VA
Figure 2. 4276 Adjustable Block Diagram
http://onsemi.com
2
NCV4276, NCV4276A
PIN FUNCTION DESCRIPTION
Pin No.
Symbol
Description
1
I
2
INH
Inhibit; Set low−to inhibit.
3
GND
Ground; Pin 3 internally connected to heatsink.
4
NC / VA
5
Q
Input; Battery Supply Input Voltage.
Not connected for fixed voltage version / Voltage Adjust Input for adjustable voltage version; use an external
voltage divider to set the output voltage
Use 22 mF, ESR < 2.5 W at 10 kHz to ground with the 5.0 V and adjustable regulators. See Figures 3, 4, and 5.
Use 10 mF, ESR < 1.8 W at 10 kHz to ground with the 3.3 V, 2.5 V, and 1.8 V regulators. See Figures 3 and 6.
MAXIMUM RATINGS*
Symbol
Min
Max
Unit
Input Voltage
Rating
VI
−42
45
V
Input Peak Transient Voltage
VI
−
45
V
VINH
−42
45
V
Output Voltage
VQ
−1.0
40
V
Ground Current
Iq
−
100
mA
Input Voltage Operating Range
VI
VQ + 0.5 V or 4.5 V
(Note 1)
40
V
−
−
−
4.5
250
1.25
−
−
−
kV
V
kV
Junction Temperature
TJ
−40
150
°C
Storage Temperature
Tstg
−50
150
°C
Inhibit INH Voltage
ESD Susceptibility
(Human Body Model)
(Machine Model)
(Charged Device Model)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal
dissipation must be observed closely.
LEAD TEMPERATURE SOLDERING REFLOW (Note 2)
Lead Temperature Soldering
Reflow (SMD styles only), Leaded, 60−150 s above 183, 30 s max at peak
Reflow (SMD styles only), Lead Free, 60−150 s above 217, 40 s max at peak
Wave Solder (through hole styles only), 12 sec max
TSLD
−
−
−
240
265
310
°C
THERMAL CHARACTERISTICS
Characteristic
Test Conditions (Typical Value)
Unit
DPAK 5−PIN PACKAGE
Min Pad Board (Note 3)
1, Pad Board (Note 4)
Junction−to−Tab (psi−JLx, yJLx)
4.2
4.7
C/W
Junction−to−Ambient (RqJA, qJA)
100.9
46.8
C/W
0.4 sq. in. Spreader Board (Note 5)
1.2 sq. in. Spreader Board (Note 6)
Junction−to−Tab (psi−JLx, yJLx)
3.8
4.0
C/W
Junction−to−Ambient (RqJA, qJA)
74.8
41.6
C/W
D2PAK
1.
2.
3.
4.
5.
6.
5−PIN PACKAGE
Minimum VI = 4.5 V or (VQ + 0.5 V), whichever is higher.
Per IPC / JEDEC J−STD−020C.
1 oz. copper, 0.26 inch2 (168 mm2) copper area, 0.062″ thick FR4.
1 oz. copper, 1.14 inch2 (736 mm2) copper area, 0.062″ thick FR4.
1 oz. copper, 0.373 inch2 (241 mm2) copper area, 0.062″ thick FR4.
1 oz. copper, 1.222 inch2 (788 mm2) copper area, 0.062″ thick FR4.
http://onsemi.com
3
NCV4276, NCV4276A
ELECTRICAL CHARACTERISTICS (VI = 13.5 V; −40°C < TJ < 150°C; unless otherwise noted.)
NCV4276
Characteristic
Symbol
Test Conditions
NCV4276A
Min
Typ
Max
Min
Typ
Max
Unit
OUTPUT
Output Voltage, 5.0 V Version
VQ
5.0 mA < IQ < 400 mA,
6.0 V < VI < 28 V
4.8
5.0
5.2
4.9
5.0
5.1
V
Output Voltage, 5.0 V Version
VQ
5.0 mA < IQ < 200 mA,
6.0 V < VI < 40 V
4.8
5.0
5.2
4.9
5.0
5.1
V
Output Voltage, 3.3 V Version
VQ
5.0 mA < IQ < 400 mA,
4.5 V < VI < 28 V
3.168
3.3
3.432
3.234
3.3
3.366
V
Output Voltage, 3.3 V Version
VQ
5.0 mA < IQ < 200 mA,
4.5 V < VI < 40 V
3.168
3.3
3.432
3.234
3.3
3.366
V
Output Voltage, 2.5 V Version
VQ
5.0 mA < IQ < 400 mA,
4.5 V < VI < 28 V
2.4
2.5
2.6
−
−
−
V
Output Voltage, 2.5 V Version
VQ
5.0 mA < IQ < 200 mA,
4.5 V < VI < 40 V
2.4
2.5
2.6
−
−
−
V
Output Voltage, 1.8 V Version
VQ
5.0 mA < IQ < 400 mA,
4.5 V < VI < 28 V
1.728
1.8
1.872
−
−
−
V
Output Voltage, 1.8 V Version
VQ
5.0 mA < IQ < 200 mA,
4.5 V < VI < 40 V
1.728
1.8
1.872
−
−
−
V
AVQ
5.0 mA < IQ < 400 mA
VQ+1 < VI < 40 V
VI > 4.5 V
−4%
−
+4%
−2%
−
+2%
V
400
700
1100
400
700
1100
mA
mA
Output Voltage, Adjustable
Version
Output Current Limitation
IQ
VQ = 90% VQTYP (VQTYP
= 2.5 V for ADJ version)
Quiescent Current (Sleep Mode)
Iq = II − IQ
Iq
VINH = 0 V
−
−
10
−
−
10
Quiescent Current, Iq = II − IQ
Iq
IQ = 1.0 mA
−
130
220
−
130
200
mA
Quiescent Current, Iq = II − IQ
Iq
IQ = 250 mA
−
10
15
−
10
15
mA
Quiescent Current, Iq = II − IQ
Iq
IQ = 400 mA
−
25
35
−
25
35
mA
IQ = 250 mA,
VDR = VI − VQ
VI = 5.0 V
VI = 4.5 V
VI = 4.5 V
VI = 4.5 V
VI > 4.5 V
−
−
−
−
−
250
−
−
−
250
500
1.332
2.1
2.772
500
−
−
−
−
−
−
−
−
−
250
−
−
−
−
500
mV
V
V
V
mV
IQ = 250 mA (Note 7)
−
−
−
−
250
500
mV
IQ = 5.0 mA to 400 mA
−
10
35
−
3.0
20
mV
DVI = 12 V to 32 V,
IQ = 5.0 mA
−
2.5
25
−
4.0
15
mV
fr = 100 Hz, Vr = 0.5 VPP
−
60
−
−
54
−
dB
−
0.5
−
−
0.5
−
mV/K
Dropout Voltage,
VDR
5.0 V Version
3.3 V Version
2.5 V Version
1.8 V Version
Adjustable Version
Dropout Voltage (5.0 V Version)
VDR
Load Regulation
DVQ,LO
Line Regulation
DVQ
Power Supply Ripple Rejection
PSRR
Temperature Output Voltage Drift
dVQ/dT
−
INHIBIT
Inhibit Voltage, Output High
VINH
VQ w VQMIN
−
2.8
3.5
−
2.3
3.5
V
Inhibit Voltage, Output Low (Off)
VINH
VQ v 0.1 V
0.5
1.7
−
0.5
2.2
−
V
Input Current
IINH
VINH = 5.0 V
5.0
10
20
5.0
10
20
mA
TSD
IQ = 5.0 mA
150
−
210
150
−
210
°C
THERMAL SHUTDOWN
Thermal Shutdown Temperature*
*Guaranteed by design, not tested in production.
7. Measured when the output voltage VQ has dropped 100 mV from the nominal valued obtained at V = 13.5 V.
http://onsemi.com
4
NCV4276, NCV4276A
II
5.5 − 45 V
Input
I 1
CI1
1.0 mF
CI2
100 nF
CQ
22 mF
NCV4276
INH
2
4
3
IINH
Output
IQ
5 Q
NC
RL
GND
Figure 3. Applications Circuit; Fixed Voltage Version
VQ = [(R1 + R2) * Vref] / R2
II
Input
I 1
CI1
1.0 mF
CI2
100 nF
CQ
22 mF
NCV4276
NCV4276A
INH
2
4
3
IINH
Output
IQ
5 Q
R1
VA
RL
GND
R2
Figure 4. Applications Circuit; Adjustable Voltage Version
TYPICAL PERFORMANCE CHARACTERISTICS
10.0
1000
9.0
Unstable ESR Region for
CQ = 1 mF − 22 mF
100
CQ = 10 mF for these
Output Voltages
8.0
ESR (W)
ESR (W)
7.0
10
1
0
50
100
150
2.5 V
4.0
1.8 V
2.0
1.0
Stable ESR Region
0.01
Unstable Region
5.0
3.0
Maximum ESR for
CQ = 1 mF − 22 mF
0.1
3.3 V
6.0
200 250 300 350
OUTPUT CURRENT (mA)
400
0.0
450
Figure 5. Output Stability with Output Capacitor
ESR, 5.0 V and Adjustable Regulator
Stable Region
0
50
100
150 200 250 300 350
OUTPUT CURRENT (mA)
400 450
Figure 6. Output Stability with Output Capacitor
ESR, 1.8 V, 2.5 V, 3.3 V Regulators
http://onsemi.com
5
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version
5.2
2.00
5.1
1.90
VQ, (V)
VQ, (V)
VI = 13.5 V
RL = 1 kW
1.95
VI = 13.5 V, RL = 1000 W
5.0
1.85
1.80
1.75
4.9
1.70
1.65
4.8
−40
0
40
80
120
1.60
−40
160
0
40
80
TJ (°C)
Figure 7. Output Voltage VQ vs. Temperature TJ,
5.0 V Version
Figure 8. Output Voltage VQ vs. Junction
Temperature TJ, 1.8 V Version
160
3.45
2.70
VI = 13.5 V
RL = 1 kW
2.65
VI = 13.5 V
RL = 1 kW
3.40
2.60
3.35
2.55
VQ, (V)
VQ, (V)
120
TJ (°C)
2.50
2.45
3.30
3.25
2.40
3.20
2.35
2.30
−40
0
40
80
120
3.15
−40
160
80
40
120
TJ (°C)
Figure 9. Output Voltage VQ vs. Junction
Temperature TJ, 2.5 V Version
Figure 10. Output Voltage VQ vs. Junction
Temperature TJ, 3.3 V Version
45
10
40
9.0
TJ = 25°C
RL = 20 W
35
160
TJ = 25°C
RL = 20 W
8.0
7.0
Iq, (mA)
30
Iq, (mA)
0
TJ (°C)
25
20
6.0
5.0
4.0
15
3.0
10
2.0
5
1.0
0
0
0
10
20
30
40
50
0
10
20
30
40
VI (V)
VI (V)
Figure 11. Current Consumption Iq vs.
Input Voltage VI, 5.0 V Version
Figure 12. Current Consumption Iq vs.
Input Voltage VI, 1.8 V Version
http://onsemi.com
6
50
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version
30
10
9.0
TJ = 25°C
RL = 20 W
8.0
7.0
20
6.0
Iq, (mA)
Iq, (mA)
TJ = 25°C
RL = 20 W
25
5.0
4.0
15
10
3.0
2.0
5.0
1.0
0
0
10
20
30
40
0
50
VI (V)
0
30
VI (V)
Figure 13. Current Consumption Iq vs. Input
Voltage VI, 2.5 V Version
Figure 14. Current Consumption Iq vs.
Input Voltage VI, 3.3 V Version
6
20
40
50
60
600
TJ = 25°C
RL = 6.8 kW
4
500
VDR, (mV)
2
II, (mA)
10
0
−2
400
TJ = 125°C
300
TJ = 25°C
200
−4
100
−6
−8
−50
−25
0
25
0
0
50
50
100
150
VI (V)
200
250
300
350
400
IQ (mA)
Figure 15. High Voltage Behavior
Figure 16. Dropout Voltage VDR vs.
Output Current IQ, 5.0 V Version
800
60
TJ = 25°C
VQ = 0 V
700
TJ = 25°C
VI = 13.5 V
50
600
40
Iq, (mA)
IQ, (mA)
500
400
300
30
20
200
10
100
0
0
0
10
20
30
40
50
0
VI (V)
100
200
300
400
500
IQ (mA)
Figure 17. Maximum Output Current IQ vs.
Input Voltage VI
Figure 18. Current Consumption Iq vs.
Output Current IQ (High Load)
http://onsemi.com
7
600
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version
1.6
1.4
TJ = 25°C
RL = 20 W
3.5
1.2
3.0
1.0
2.5
VQ, (V)
Iq, (mA)
4.0
TJ = 25°C
VI = 13.5 V
0.8
0.6
2.0
1.5
0.4
1.0
0.2
0.5
0
0
10
20
30
40
50
0
60
0
1.0
2.0
4.0
5.0
6.0
VI (V)
IQ (mA)
Figure 19. Current Consumption Iq vs.
Output Current IQ (Low Load)
Figure 20. Output Voltage VQ vs. Input Voltage
VI, 1.8 V Version
5.0
6.0
4.5
TJ = 25°C
RL = 20 W
4.0
TJ = 25°C
RL = 20 W
5.0
3.5
4.0
3.0
VQ, (V)
VQ, (V)
3.0
2.5
2.0
3.0
2.0
1.5
1.0
1.0
0.5
0
0
1.0
2.0
3.0
4.0
5.0
0
6.0
0
1.0
2.0
3.0
4.0
5.0
6.0
VI (V)
VI (V)
Figure 21. Output Voltage VQ vs. Input Voltage
VI, 2.5 V Version
Figure 22. Output Voltage VQ vs. Input Voltage
VI, 3.3 V Version
6
6.0
TJ = 25°C
RL = 20 W
5
4.0
2.0
0
II, (mA)
VQ, (V)
4
3
2
−2.0
−4.0
−6.0
1
0
TJ = 25°C
RL = 6.8 kW
−8.0
0
2
4
6
8
−10
−50
10
VI (V)
−25
0
25
VI (V)
Figure 23. Output Voltage VQ vs. Input Voltage
VI, 5.0 V Version
Figure 24. Input Current II vs. Input Voltage VI,
5.0 V Version
http://onsemi.com
8
50
NCV4276, NCV4276A
1.0
0
0
−1.0
−1.0
−2.0
−2.0
II, (mA)
1.0
−3.0
−4.0
−3.0
−4.0
−5.0
−5.0
TJ = 25°C
RL = 6.8 kW
−6.0
−7.0
−50
−25
0
25
TJ = 25°C
RL = 6.8 kW
−6.0
−7.0
−50
50
−25
0
VI (V)
50
Figure 26. Input Current II vs. Input Voltage VI,
2.5 V Version
6.0
4.0
2.0
0
−2.0
−4.0
−6.0
TJ = 25°C
RL = 6.8 kW
−8.0
−10
−50
25
VI (V)
Figure 25. Input Current II vs. Input Voltage VI,
1.8 V Version
II, (mA)
II, (mA)
TYPICAL PERFORMANCE CHARACTERISTICS − 4276 Version
−25
0
25
VI (V)
Figure 27. Input Current II vs. Input Voltage VI,
3.3 V Version
http://onsemi.com
9
50
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − 4276A Version
3.45
VI = 13.5 V
RL = 1 kW
VQ, OUTPUT VOLTAGE (V)
VQ, OUTPUT VOLTAGE (V)
5.2
5.1
5.0
4.9
4.8
−40
0
40
80
120
3.25
3.20
0
10
10
20
30
40
10
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0
50
0
10
5.0
5.0
VQ, OUTPUT VOLTAGE (V)
6.0
RL = 20 W
TJ = 25°C
3.0
2.0
1.0
4.0
6.0
30
40
50
Figure 31. Current Consumption Iq vs. Input
Voltage VI, 3.3 V Version
6.0
2.0
20
VI, INPUT VOLTAGE (V)
Figure 30. Current Consumption Iq vs.
Input Voltage VI, 5.0 V Version
4.0
160
RL = 20 W
TJ = 25°C
9.0
VI, INPUT VOLTAGE (V)
VQ, OUTPUT VOLTAGE (V)
120
TJ, JUNCTION TEMPERATURE (°C)
20
0
80
Figure 29. Output Voltage VQ vs.
Junction Temperature TJ, 3.3 V Version
30
0
40
TJ, JUNCTION TEMPERATURE (°C)
Iq, CURRENT CONSUMPTION (mA)
Iq, CURRENT CONSUMPTION (mA)
3.30
Figure 28. Output Voltage VQ vs.
Junction Temperature TJ, 5.0 V Version
TJ = 25°C
RL = 20 W
0
3.35
3.15
−40
160
40
0
VI = 13.5 V
RL = 1 kW
3.40
8.0
4.0
3.0
2.0
1.0
0
10
TJ = 25°C
RL = 20 W
0
1.0
2.0
3.0
4.0
5.0
VI, INPUT VOLTAGE (V)
VI, INPUT VOLTAGE (V)
Figure 33. Low Voltage Behavior, 5.0 V Version
Figure 32. Low Voltage Behavior, 3.3 V Version
http://onsemi.com
10
6.0
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − 4276A Version
2.0
6.0
4.0
0
−2.0
0
II (mA)
II (mA)
2.0
−2.0
RL = 6.8 kW
TJ = 25°C
−4.0
−4.0
−6.0
−6.0
−10
−50
−25
0
25
−10
−50
50
50
Figure 35. Input Current II vs. Input Voltage VI,
3.3 V Version
800
IQ, OUTPUT CURRENT (mA)
VDR, DROP VOLTAGE (mV)
25
Figure 34. Input Current vs. Input Voltage,
5.0 V Version
TJ = 125°C
400
300
TJ = 25°C
200
100
0
100
200
300
TJ = 25°C
VQ = 0 V
600
400
200
0
400
0
10
20
30
40
IQ, OUTPUT CURRENT (mA)
VI, INPUT VOLTAGE (V)
Figure 36. Dropout Voltage VDR vs.
Output Current IQ
Figure 37. Maximum Output Current IQ vs.
Input Voltage VI
50
1.6
Iq, CURRENT CONSUMPTION (mA)
60
Iq, CURRENT CONSUMPTION (mA)
0
VI, INPUT VOLTAGE (V)
500
50
VI = 13.5 V
TJ = 25°C
40
30
20
10
0
−25
VI, INPUT VOLTAGE (V)
600
0
RL = 6.8 kW
TJ = 25°C
−8.0
−8.0
0
100
200
300
400
500
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
600
VI = 13.5 V
0
10
20
30
40
50
IQ, OUTPUT CURRENT (mA)
IQ, OUTPUT CURRENT (mA)
Figure 38. Current Consumption Iq vs.
Output Current IQ (High Load)
Figure 39. Current Consumption Iq vs.
Output Current IQ (Low Load)
http://onsemi.com
11
60
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version
2.55
5.0
2.53
4.0
2.52
3.5
2.51
3.0
2.50
2.5
2.49
2.0
2.48
1.5
2.47
1.0
2.46
0.5
0
2.45
−40
0
40
80
120
160
0
10
20
30
40
TJ (°C)
VI (V)
Figure 40. Output Voltage VQ vs. Junction
Temperature TJ, Adjustable Version
Figure 41. Current Consumption Iq vs. Input
Voltage VI, Adjustable Version
4
50
2
TJ = 25°C
RL = 20 W
3.5
0
−2
3
−4
2.5
II (mA)
VQ (V)
TJ = 25°C
RL = 20 W
4.5
VI = 13.5 V, RL = 1 kW
Iq (mA)
VQ (V)
2.54
2
−6
−8
−10
1.5
−12
1
TJ = 25°C
RL = 6.8 kW
−14
0.5
−16
−18
−50
0
0
2
4
6
8
10
−25
0
25
VI (V)
VI (V)
Figure 42. Low Voltage Behavior,
Adjustable Version
Figure 43. High Voltage Behavior,
Adjustable Version
http://onsemi.com
12
50
NCV4276, NCV4276A
TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version
600
800
700
500
300
TJ = 25°C
IQ (mA)
VDR (mV)
600
TJ = 125°C
400
500
TJ = 25°C
VQ = 0 V
400
300
200
200
100
100
0
0
50
100
150
200
IQ (mA)
250
300
0
350 400
0
10
30
40
50
VI (V)
Figure 45. Maximum Output Current IQ vs.
Input Voltage VI, Adjustable Version
Figure 44. Dropout Voltage VDR vs. Output Current
IQ, Regulator Set at 5.0 V, Adjustable Version
60
1.6
TJ = 25°C
VI = 13.5 V
1.4
TJ = 25°C
VI = 13.5 V
50
1.2
Iq (mA)
40
IQ (mA)
20
30
1.0
0.8
0.6
20
0.4
10
0
0.2
0
100
200
300
400
500
0
600
0
10
20
30
40
50
IQ (mA)
IQ (mA)
Figure 46. Current Consumption Iq vs.
Output Current IQ (High Load), Adjustable Version
Figure 47. Current Consumption Iq vs. Output
Current IQ (Low Load), Adjustable Version
http://onsemi.com
13
60
NCV4276, NCV4276A
Circuit Description
The NCV4276 is an integrated low dropout regulator that
provides a regulated voltage at 400 mA to the output. It is
enabled with an input to the inhibit pin. The regulator
voltage is provided by a PNP pass transistor controlled by
an error amplifier with a bandgap reference, which gives it
the lowest possible dropout voltage. The output current
capability is 400 mA, and the base drive quiescent current
is controlled to prevent oversaturation when the input
voltage is low or when the output is overloaded. The
regulator is protected by both current limit and thermal
shutdown. Thermal shutdown occurs above 150°C to
protect the IC during overloads and extreme ambient
temperatures.
The value for the output capacitor CQ, shown in Figure 3,
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed
for CQ w 22 mF and an ESR v 2.5 W for the 5.0 V and
Adjustable regulator and CQ w 10 mF and an ESR v 1.8 W
for the 1.8 V, 2.5 V, and 3.3 V regulators. See Figures 5 and
6 for output stability at various load and capacitive ESR
conditions.
Inhibit Input
The inhibit pin is used to turn the regulator on or off. By
holding the pin down to a voltage less than 0.5 V, the output
of the regulator will be turned off. When the voltage on the
Inhibit pin is greater than 3.5 V, the output of the regulator
will be enabled to power its output to the regulated output
voltage. The inhibit pin may be connected directly to the
input pin to give constant enable to the output regulator.
Regulator
The error amplifier compares the reference voltage to a
sample of the output voltage (VQ) and drives the base of a
PNP series pass transistor via a buffer. The reference is a
bandgap design to give it a temperature−stable output.
Saturation control of the PNP is a function of the load
current and input voltage. Oversaturation of the output
power device is prevented, and quiescent current in the
ground pin is minimized. See Figure 5, Test Circuit, for
circuit element nomenclature illustration.
Setting the Output Voltage (Adjustable Version)
The output voltage range of the adjustable version can be
set between 2.5 V and 20 V (Figure ). This is accomplished
with an external resistor divider feeding back the voltage
to the IC back to the error amplifier by the voltage adjust
pin VA. The internal reference voltage is set to a
temperature stable reference of 2.5 V.
The output voltage is calculated from the following
formula. Ignoring the bias current into the VA pin:
Regulator Stability Considerations
The input capacitors (CI1 and CI2) are necessary to
stabilize the input impedance to avoid voltage line
influences. Using a resistor of approximately 1.0 W in
series with CI2 can stop potential oscillations caused by
stray inductance and capacitance.
The output capacitor helps determine three main
characteristics of a linear regulator: startup delay, load
transient response and loop stability. The capacitor value
and type should be based on cost, availability, size and
temperature constraints. The aluminum electrolytic
capacitor is the least expensive solution, but, if the circuit
operates at low temperatures (−25°C to −40°C), both the
value and ESR of the capacitor will vary considerably. The
capacitor manufacturer’s data sheet usually provides this
information.
VQ + [(R1 ) R2) * Vref]ńR2
Use R2 < 50 k to avoid significant voltage output errors
due to VA bias current.
Connecting VA directly to Q without R1 and R2 creates
an output voltage of 2.5 V.
Designers should consider the tolerance of R1 and R2
during the design phase.
The input voltage range for operation (pin 1) of the
adjustable version is between (VQ + 0.5 V) and 40 V.
Internal bias requirements dictate a minimum input voltage
of 4.5 V. The dropout voltage for output voltages less than
4.0 V is (4.5 V − VQ).
http://onsemi.com
14
NCV4276, NCV4276A
Calculating Power Dissipation
in a Single Output Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 48) is:
PD(max) + [VI(max) * VQ(min)] IQ(max)
Heatsinks
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
summed to determine the value of RqJA:
(1)
) VI(max)Iq
where
RqJA + RqJC ) RqCS ) RqSA
VI(max)
VQ(min)
IQ(max)
is the maximum input voltage,
is the minimum output voltage,
is the maximum output current for the
application,
Iq
is the quiescent current the regulator
consumes at IQ(max).
Once the value of PD(max) is known, the maximum
permissible value of RqJA can be calculated:
T
RqJA + 150°C * A
PD
where
RqJC is the junction−to−case thermal resistance,
RqCS is the case−to−heatsink thermal resistance,
RqSA is the heatsink−to−ambient thermal
resistance.
RqJC appears in the package section of the data sheet.
Like RqJA, it too is a function of package type. RqCS and
RqSA are functions of the package type, heatsink and the
interface between them. These values appear in data sheets
of heatsink manufacturers.
Thermal, mounting, and heatsinking considerations are
discussed in the ON Semiconductor application note
AN1040/D.
(2)
The value of RqJA can then be compared with those in the
package section of the data sheet. Those packages with
RqJA less than the calculated value in Equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
IQ
II
VI
SMART
REGULATOR®
(3)
VQ
} Control
Features
Iq
Figure 48. Single Output Regulator with Key
Performance Parameters Labeled
http://onsemi.com
15
NCV4276, NCV4276A
Thermal Model
A discussion of thermal modeling is in the ON Semiconductor web site: http://www.onsemi.com/pub/collateral/BR1487−D.PDF.
Table 1. DPAK 5−Lead Thermal RC Network Models
Drain Copper Area (1 oz thick)
168 mm2
(SPICE Deck Format)
736 mm2
168 mm2
Cauer Network
168
mm2
736 mm2
Foster Network
736
mm2
Units
Tau
Tau
Units
C_C1
Junction
GND
1.00E−06
1.00E−06
W−s/C
1.36E−08
1.361E−08
sec
C_C2
node1
GND
1.00E−05
1.00E−05
W−s/C
7.41E−07
7.411E−07
sec
C_C3
node2
GND
6.00E−05
6.00E−05
W−s/C
1.04E−05
1.029E−05
sec
C_C4
node3
GND
1.00E−04
1.00E−04
W−s/C
3.91E−05
3.737E−05
sec
C_C5
node4
GND
4.36E−04
3.64E−04
W−s/C
1.80E−03
1.376E−03
sec
C_C6
node5
GND
6.77E−02
1.92E−02
W−s/C
3.77E−01
2.851E−02
sec
C_C7
node6
GND
1.51E−01
1.27E−01
W−s/C
3.79E+00
9.475E−01
sec
C_C8
node7
GND
4.80E−01
1.018
W−s/C
2.65E+01
1.173E+01
sec
C_C9
node8
GND
3.740
2.955
W−s/C
8.71E+01
8.59E+01
sec
C_C10
node9
GND
10.322
0.438
W−s/C
168
mm2
736
mm2
sec
R’s
R’s
R_R1
Junction
node1
0.015
0.015
C/W
0.0123
0.0123
C/W
R_R2
node1
node2
0.08
0.08
C/W
0.0585
0.0585
C/W
R_R3
node2
node3
0.4
0.4
C/W
0.0304
0.0287
C/W
R_R4
node3
node4
0.2
0.2
C/W
0.3997
0.3772
C/W
R_R5
node4
node5
2.97519
2.6171
C/W
3.115
2.68
C/W
R_R6
node5
node6
8.2971
1.6778
C/W
3.571
1.38
C/W
R_R7
node6
node7
25.9805
7.4246
C/W
12.851
5.92
C/W
R_R8
node7
node8
46.5192
14.9320
C/W
35.471
7.39
C/W
R_R9
node8
node9
17.7808
19.2560
C/W
46.741
28.94
C/W
R_R10
node9
GND
0.1
0.1758
C/W
NOTE:
C/W
Bold face items represent the package without the external thermal system.
R1
Junction
C1
R2
C2
R3
C3
Rn
Cn
Time constants are not simple RC products. Amplitudes
of mathematical solution are not the resistance values.
Ambient
(thermal ground)
Figure 49. Grounded Capacitor Thermal Network (“Cauer” Ladder)
Junction
R1
C1
R2
C2
R3
C3
Rn
Cn
Each rung is exactly characterized by its RC−product
time constant; amplitudes are the resistances.
Ambient
(thermal ground)
Figure 50. Non−Grounded Capacitor Thermal Ladder (“Foster” Ladder)
http://onsemi.com
16
NCV4276, NCV4276A
Table 2. D2PAK 5−Lead Thermal RC Network Models
Drain Copper Area (1 oz thick)
241 mm2
(SPICE Deck Format)
788 mm2
241 mm2
Cauer Network
788 mm2
Foster Network
241 mm2
653 mm2
Units
Tau
Tau
Units
C_C1
Junction
GND
1.00E−06
1.00E−06
W−s/C
1.361E−08
1.361E−08
sec
C_C2
node1
GND
1.00E−05
1.00E−05
W−s/C
7.411E−07
7.411E−07
sec
C_C3
node2
GND
6.00E−05
6.00E−05
W−s/C
1.005E−05
1.007E−05
sec
C_C4
node3
GND
1.00E−04
1.00E−04
W−s/C
3.460E−05
3.480E−05
sec
C_C5
node4
GND
2.82E−04
2.87E−04
W−s/C
7.868E−04
8.107E−04
sec
C_C6
node5
GND
5.58E−03
5.95E−03
W−s/C
7.431E−03
7.830E−03
sec
C_C7
node6
GND
4.25E−01
4.61E−01
W−s/C
2.786E+00
2.012E+00
sec
C_C8
node7
GND
9.22E−01
2.05
W−s/C
2.014E+01
2.601E+01
sec
C_C9
node8
GND
1.73
4.88
W−s/C
1.134E+02
1.218E+02
sec
C_C10
node9
GND
7.12
1.31
W−s/C
241 mm2
653 mm2
sec
R’s
R’s
R_R1
Junction
node1
0.015
0.0150
C/W
0.0123
0.0123
C/W
R_R2
node1
node2
0.08
0.0800
C/W
0.0585
0.0585
C/W
R_R3
node2
node3
0.4
0.4000
C/W
0.0257
0.0260
C/W
R_R4
node3
node4
0.2
0.2000
C/W
0.3413
0.3438
C/W
R_R5
node4
node5
1.85638
1.8839
C/W
1.77
1.81
C/W
R_R6
node5
node6
1.23672
1.2272
C/W
1.54
1.52
C/W
R_R7
node6
node7
9.81541
5.3383
C/W
4.13
3.46
C/W
R_R8
node7
node8
33.1868
18.9591
C/W
6.27
5.03
C/W
R_R9
node8
node9
27.0263
13.3369
C/W
60.80
29.30
C/W
node9
GND
1.13944
0.1191
C/W
R_R10
NOTE:
C/W
Bold face items represent the package without the external thermal system.
The Cauer networks generally have physical significance and may be divided between nodes to separate thermal behavior
due to one portion of the network from another. The Foster networks, though when sorted by time constant (as above) bear
a rough correlation with the Cauer networks, are really only convenient mathematical models. Cauer networks can be easily
implemented using circuit simulating tools, whereas Foster networks may be more easily implemented using mathematical
tools (for instance, in a spreadsheet program), according to the following formula:
n
R(t) +
S Ri ǒ1−e−tńtaui Ǔ
i+1
http://onsemi.com
17
110
110
100
100
90
90
80
80
70
qJA (C°/W)
qJA (C°/W)
NCV4276, NCV4276A
1 oz
60
2 oz
70
60
1 oz
2 oz
50
50
40
40
30
150 200 250 300 350 400 450 500 550 600 650 700 750
30
150 200 250 300 350 400 450 500 550 600 650 700 750
COPPER AREA (mm2)
COPPER AREA (mm2)
Figure 51. qJA vs. Copper Spreader Area,
DPAK 5−Lead
Figure 52. qJA vs. Copper Spreader Area,
D2PAK 5−Lead
100
Cu Area 167 mm2
Cu Area 736 mm2
R(t) C°/W
10
1.0
sqrt(t)
0.1
0.01
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1.0
10
100
1000
TIME (sec)
Figure 53. Single−Pulse Heating Curves, DPAK 5−Lead
100
Cu Area 167 mm2
Cu Area 736 mm2
R(t) C°/W
10
1.0
0.1
0.01
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1.0
TIME (sec)
Figure 54. Single−Pulse Heating Curves, D2PAK 5−Lead
http://onsemi.com
18
10
100
1000
NCV4276, NCV4276A
100
RqJA 736 mm2 C°/W
50% Duty Cycle
10
1.0
20%
10%
5%
2%
1%
0.1
Non−normalized Response
0.01
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1.0
10
100
1000
10
100
1000
PULSE WIDTH (sec)
Figure 55. Duty Cycle for 1, Spreader Boards, DPAK 5−Lead
100
RqJA 788 mm2 C°/W
50% Duty Cycle
10
1.0
20%
10%
5%
2%
1%
0.1
Non−normalized Response
0.01
0.0000001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1.0
PULSE WIDTH (sec)
Figure 56. Duty Cycle for 1, Spreader Boards, D2PAK 5−Lead
http://onsemi.com
19
NCV4276, NCV4276A
MARKING DIAGRAMS
NC
V4276A−XX
AWLYWWG
76AXXG
ALYWW
1
1
1
NCV4276A
DPAK
5−PIN
DT SUFFIX
CASE 175AA
NC
V4276−XX
AWLYWWG
4276XG
ALYWW
NCV4276A
D2PAK
5−PIN
DS SUFFIX
CASE 936A
1
NCV4276
NCV4276
DPAK
5−PIN
DT SUFFIX
CASE 175AA
D2PAK
5−PIN
DS SUFFIX
CASE 936A
*Tab is connected to Pin 3 on all packages.
A
WL, L
Y
WW
G
x, xx
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Device
= Voltage Ratings as
indicated below
A−Version
D2PAK
XX = AJ (Adj. Voltage)
XX = 50 (5.0 V)
DPAK
XX = AJ (Adj. Voltage)
XX = 50 (5.0 V)
Non−A−Version
D2PAK
XX = AJ (Adj. Voltage)
XX = 50 (5.0 V)
XX = 33 (3.3 V)
XX = 25 (2.5 V)
XX = 18 (1.8 V)
DPAK
X = V (Adj. Voltage)
X = 5 (5.0 V)
X = 3 (3.3 V)
http://onsemi.com
20
NCV4276, NCV4276A
ORDERING INFORMATION
Package
Shipping†
NCV4276DT50RK
DPAK, 5−Pin
2500 / Tape & Reel
NCV4276DT50RKG
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
NCV4276DS50
D2PAK, 5−Pin
50 Units / Rail
D2PAK, 5−Pin
(Pb−Free)
50 Units / Rail
NCV4276DS50R4
D2PAK, 5−Pin
800 / Tape & Reel
NCV4276DS50R4G
D2PAK, 5−Pin
(Pb−Free)
800 / Tape & Reel
NCV4276DT33RK
DPAK, 5−Pin
2500 / Tape & Reel
NCV4276DT33RKG
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
NCV4276DS33
D2PAK, 5−Pin
50 Units / Rail
D2PAK,
50 Units / Rail
Device
Output Voltage Accuracy
Output Voltage
5.0 V
NCV4276DS50G
3.3 V
NCV4276DS33G
5−Pin
(Pb−Free)
NCV4276DS33R4
D2PAK, 5−Pin
800 / Tape & Reel
NCV4276DS33R4G
D2PAK,
800 / Tape & Reel
5−Pin
(Pb−Free)
4%
NCV4276DS25
D2PAK, 5−Pin
50 Units / Rail
NCV4276DS25G
D2PAK,
50 Units / Rail
2.5 V
5−Pin
(Pb−Free)
D2PAK, 5−Pin
800 / Tape & Reel
NCV4276DS25R4G
D2PAK,
800 / Tape & Reel
NCV4276DS18
D2PAK, 5−Pin
50 Units / Rail
NCV4276DS18G
D2PAK,
50 Units / Rail
NCV4276DS25R4
5−Pin
(Pb−Free)
1.8 V
5−Pin
(Pb−Free)
D2PAK, 5−Pin
800 / Tape & Reel
NCV4276DS18R4G
D2PAK,
5−Pin
(Pb−Free)
800 / Tape & Reel
NCV4276DTADJRKG
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
NCV4276DS18R4
Adjustable
NCV4276DSADJG
NCV4276DSADJR4G
NCV4276ADT33RKG
3.3 V
NCV4276ADT50RKG
5.0 V
NCV4276ADS50G
NCV4276ADS50R4G
2%
NCV4276ADTADJRKG
NCV4276ADSADJG
D2PAK, 5−Pin
(Pb−Free)
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
DPAK, 5−Pin
(Pb−Free)
2500 / Tape & Reel
D2PAK, 5−Pin
(Pb−Free)
DPAK, 5−Pin
(Pb−Free)
Adjustable
NCV4276ADSADJR4G
50 Units / Rail
800 / Tape & Reel
D2PAK, 5−Pin
(Pb−Free)
50 Units / Rail
800 / Tape & Reel
2500 / Tape & Reel
50 Units / Rail
800 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
21
NCV4276, NCV4276A
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP
DT SUFFIX
CASE 175AA−01
ISSUE A
−T−
SEATING
PLANE
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
R1
Z
A
S
DIM
A
B
C
D
E
F
G
H
J
K
L
R
R1
S
U
V
Z
1 2 3 4 5
U
K
F
J
L
H
D
G
5 PL
0.13 (0.005)
M
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.020 0.028
0.018 0.023
0.024 0.032
0.180 BSC
0.034 0.040
0.018 0.023
0.102 0.114
0.045 BSC
0.170 0.190
0.185 0.210
0.025 0.040
0.020
−−−
0.035 0.050
0.155 0.170
T
SOLDERING FOOTPRINT*
6.4
0.252
2.2
0.086
0.34 5.36
0.013 0.217
5.8
0.228
10.6
0.417
0.8
0.031
SCALE 4:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
22
mm Ǔ
ǒinches
MILLIMETERS
MIN
MAX
5.97
6.22
6.35
6.73
2.19
2.38
0.51
0.71
0.46
0.58
0.61
0.81
4.56 BSC
0.87
1.01
0.46
0.58
2.60
2.89
1.14 BSC
4.32
4.83
4.70
5.33
0.63
1.01
0.51
−−−
0.89
1.27
3.93
4.32
NCV4276, NCV4276A
PACKAGE DIMENSIONS
D2PAK
5 LEAD
DS SUFFIX
CASE 936A−02
ISSUE C
−T−
OPTIONAL
CHAMFER
A
B
U
V
H
1 2 3 4 5
M
D
M
E
S
K
0.010 (0.254)
TERMINAL 6
T
L
DIM
A
B
C
D
E
G
H
K
L
M
N
P
R
S
U
V
P
N
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A
AND K.
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
MOUNTING SURFACE FOR TERMINAL 6.
5. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH OR GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED 0.025
(0.635) MAXIMUM.
R
C
SOLDERING FOOTPRINT*
8.38
0.33
INCHES
MIN
MAX
0.386
0.403
0.356
0.368
0.170
0.180
0.026
0.036
0.045
0.055
0.067 BSC
0.539
0.579
0.050 REF
0.000
0.010
0.088
0.102
0.018
0.026
0.058
0.078
5 _ REF
0.116 REF
0.200 MIN
0.250 MIN
MILLIMETERS
MIN
MAX
9.804
10.236
9.042
9.347
4.318
4.572
0.660
0.914
1.143
1.397
1.702 BSC
13.691
14.707
1.270 REF
0.000
0.254
2.235
2.591
0.457
0.660
1.473
1.981
5 _ REF
2.946 REF
5.080 MIN
6.350 MIN
1.702
0.067
10.66
0.42
16.02
0.63
1.016
0.04
3.05
0.12
mm Ǔ
ǒinches
SCALE 3:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over
time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under
its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,
or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of
personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.
SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
23
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV4276/D
Similar pages