KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD INTRODUCTION KS0070B is a dot matrix LCD driver & controller LSI which is fabricated by low power CMOS technology. It is capable of displaying 1 or 2 lines with the 5×7 format or 1 line with the 5×10 dots format. FUNCTIONS • Character type dot matrix LCD driver & controller • Internal driver: 16 common and 80 segment signal output • Easy interface with 4-bit or 8-bit MPU • Display character pattern: 5×7 dots format (192 kinds) & 5×10 dots format (32 kinds) • The special character pattern is directly programmable by the character generator RAM. • A customer character pattern is programmable by mask option. • It can drive a maximum of 80 characters by using the KS0065B or KS0063B externally. • Various instruction functions • Built-in automatic power on reset • Driving method is A-type (Line inversion) FEATURES • Internal Memory - Character Generator ROM (CGROM): 8,320 bits (192 characters × 5 × 7 dots) & (32 characters x 5 × 10 dots) - Character Generator RAM (CGRAM): 64 × 8 bits (8 characters × 5 × 7 dots) - Display Data RAM (DDRAM): 80 × 8 bits (80 characters max.) • Low power operation - Power supply voltage range: 2.7 to 5.5 V (VDD) - LCD Drive voltage range: 3.0 to 10.0 V (VDD to V5) • Supply voltage for display: 0 to −5 V (V5) • Programmable duty cycle: 1/8, 1/11, 1/16 • Internal oscillator with an external resistor • Bare chip or bumped chip available KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD BLOCK DIAGRAM Parallel to serial Data conversion circuit VDD GND V1 V2 5 V3 V4 V5 5 Busy Flag Character Generator ROM (CG ROM) 8320 bits 4 DB0-DB3 8 4 DB4-DB7 Character Generator RAM (CG RAM) 512 bits 8 Data Register (DR) Cursor Blink Control Circuit 8 80 bit Input 8 8 Output R/W RS Buffer 8 E Instruction 8 Instruction Register Decoder (IR) (ID) 80 bit shift Latch Register Circuit Segment 80 Driver SEG1SET80 Display Data RAM (DD RAM) 7 640 bits 7 D 7 Address Counter (AC) 7 OSC1 OSC2 Timing Generation Circuit 16 bit Shift Register 16-bit 16 common Driver CLK1 CLK2 M COM1COM16 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD PIN CONFIGURATION SEG59 103 SEG58 104 SEG57 105 SEG56 106 SEG55 107 SEG54 108 SEG53 109 SEG52 110 SEG51 111 SEG50 112 SEG49 113 SEG48 114 SEG47 115 SEG46 116 SEG45 117 SEG44 118 SEG43 119 SEG42 120 SEG41 121 SEG40 122 SEG39 123 SEG38 124 SEG37 125 SEG32 SEG36 126 SEG33 SEG35 127 SEG34 128 NC 1 2 3 102 SEG60 101 SEG61 100 SEG62 99 SEG63 SEG31 4 SEG30 5 98 SEG64 SEG29 6 97 SEG65 SEG28 7 96 SEG66 SEG27 8 95 SEG67 SEG26 9 94 SEG68 SEG25 10 93 SEG69 SEG24 11 92 SEG70 SEG23 12 91 SEG71 SEG22 13 90 SEG72 SEG21 14 89 SEG73 SEG20 15 88 SEG74 SEG19 16 87 SEG75 SEG18 17 86 SEG76 SEG17 18 85 SEG77 SEG16 19 84 SEG78 SEG15 20 83 SEG79 SEG14 21 82 SEG80 SEG13 22 81 COM16 SEG12 23 80 COM15 SEG11 24 79 COM14 SEG10 25 78 COM13 SEG9 26 77 COM12 SEG8 27 76 COM11 SEG7 28 75 COM10 SEG6 29 74 COM9 SEG5 30 73 COM8 SEG4 31 72 COM7 SEG3 32 71 COM6 SEG2 33 70 COM5 SEG1 34 69 COM4 VSS 35 68 COM3 OSC2 36 67 COM2 OSC1 37 66 COM1 NC 38 65 NC KS0070B 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 NC NC NC V1 V2 V3 V4 V5 CLK1 CLK2 M D RS R/W E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST NC KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Y (0, 0) X CHIP SIZE: 3920 × 5070 PAD SIZE: 100 × 100 UNIT: µm 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 V1 V2 V3 V4 V5 CLK1 CLK2 M D RS RW E VDD DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 TEST SEG33 SEG32 SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24 SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16 SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8 SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1 VSS OSC2 OSC1 KS0070B 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 PAD CONFIGURATION 1) NORMAL TYPE PAD CONFIGURATION 102 SEG60 101 SEG61 100 SEG62 99 SEG63 98 SEG64 97 SEG65 96 SEG66 95 SEG67 94 SEG68 93 SEG69 92 SEG70 91 SEG71 90 SEG72 89 SEG73 88 SEG74 87 SEG75 86 SEG76 85 SEG77 84 SEG78 83 SEG79 82 SEG80 81 COM16 80 COM15 79 COM14 78 COM13 77 COM12 76 COM11 75 COM10 74 COM9 73 COM8 72 COM7 71 COM6 70 COM5 69 COM4 68 COM3 67 COM2 66 COM1 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 SEG59 SEG58 SEG57 SEG56 SEG55 SEG54 SEG53 SEG52 SEG51 SEG50 SEG49 SEG48 SEG47 SEG46 SEG45 SEG44 SEG43 SEG42 SEG41 SEG40 SEG39 SEG38 SEG37 SEG36 SEG35 SEG34 2) MIRROR TYPE PAD CONFIGURATION Y KS0070BM (0, 0) X 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 CHIP SIZE: 3920 × 5070 PAD SIZE: 100 × 100 UNIT: µm TEST DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 VDD E RW RS D M CLK2 CLK1 V5 V4 V3 V2 V1 SEG60 2 SEG61 3 SEG62 4 SEG63 5 SEG64 6 SEG65 7 SEG66 8 SEG67 9 SEG68 10 SEG69 11 SEG70 12 SEG71 13 SEG72 14 SEG73 15 SEG74 16 SEG75 17 SEG76 18 SEG77 19 SEG78 20 SEG79 21 SEG80 22 COM16 23 COM15 24 COM14 25 COM13 26 COM12 27 COM11 28 COM10 29 COM9 30 COM8 31 COM7 32 COM6 33 COM5 34 COM4 35 COM3 36 COM2 37 COM1 38 102 SEG33 101 SEG32 100 SEG31 99 SEG30 98 SEG29 97 SEG28 96 SEG27 95 SEG26 94 SEG25 93 SEG24 92 SEG23 91 SEG22 90 SEG21 89 SEG20 88 SEG19 87 SEG18 86 SEG17 85 SEG16 84 SEG15 83 SEG14 82 SEG13 81 SEG12 80 SEG11 79 SEG10 78 SEG9 77 SEG8 76 SEG7 75 SEG6 74 SEG5 73 SEG4 72 SEG3 71 SEG2 70 SEG1 69 VSS 68 OSC2 67 OSC1 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD PAD COORDINATE 1) NORMAL TYPE PAD COORDINATE PAD PAD COORDINATE PAD NO. NAME NO. X Y 1 NC - PAD COORDINATE PAD NAME NO X Y PAD NAME COORDINATE PAD PAD COORDINATE NO. NAME X Y X Y - 24 SEG11 -1794 -581 47 CLK1 -530 -2369 70 COM5 1794 -1831 2 SEG33 -1794 2169 25 SEG10 -1794 -706 48 CLK2 -405 -2369 71 COM6 1794 -1706 3 SEG32 -1794 2044 26 SEG9 -1794 -831 49 M -280 -2369 72 COM7 1794 -1581 4 SEG31 -1794 1919 27 SEG8 -1794 -956 50 D -155 -2369 73 COM8 1794 -1456 5 SEG30 -1794 1794 28 SEG7 -1794 -1081 51 RS -30 -2369 74 COM9 1794 -1331 6 SEG29 -1794 1669 29 SEG6 -1794 -1206 52 RW 95 -2369 75 COM10 1794 -1206 7 SEG28 -1794 1544 30 SEG5 -1794 -1331 53 E 220 -2369 76 COM11 1794 -1081 8 SEG27 -1794 1419 31 SEG4 -1794 -1456 54 VDD 345 -2369 77 COM12 1794 -956 9 SEG26 -1794 1294 32 SEG3 -1794 -1581 55 DB0 470 -2369 78 COM13 1794 -831 10 SEG25 -1794 1169 33 SEG2 -1794 -1706 56 DB1 595 -2369 79 COM14 1794 -706 11 SEG24 -1794 1044 34 SEG1 -1794 -1831 57 DB2 720 -2369 80 COM15 1794 -581 12 SEG23 -1794 919 35 VSS -1794 -1956 58 DB3 845 -2369 81 COM16 1794 -456 13 SEG22 -1794 794 36 OSC2 -1794 -2106 59 DB4 970 -2369 82 SEG80 1794 -331 14 SEG21 -1794 669 37 OSC1 -1794 -2231 60 DB5 1095 -2369 83 SEG79 1794 -206 15 SEG20 -1794 544 38 NC - - 61 DB6 1220 -2369 84 SEG78 1794 -81 16 SEG19 -1794 419 39 NC - - 62 DB7 1345 -2369 85 SEG77 1794 44 17 SEG18 -1794 294 40 NC - - 63 TEST 1470 -2369 86 SEG76 1794 169 18 SEG17 -1794 169 41 NC - - 64 NC - - 87 SEG75 1794 294 19 SEG16 -1794 44 42 V1 -1155 -2369 65 NC - - 88 SEG74 1794 419 20 SEG15 -1794 -81 43 V2 -1030 -2369 66 COM1 1794 -2331 89 SEG73 1794 544 21 SEG14 -1794 -206 44 V3 -905 -2369 67 COM2 1794 -2206 90 SEG72 1794 669 22 SEG13 -1794 -331 45 V4 -780 -2369 68 COM3 1794 -2081 91 SEG71 1794 794 23 SEG12 -1794 -456 46 V5 -655 -2369 69 COM4 1794 -1956 92 SEG70 1794 919 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD NORMAL TYPE PAD COORDINATE (CONTINUED) PAD PAD NO. NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X- Y- 93 SEG69 1794 1044 102 SEG60 1794 2169 111 SEG51 563 2369 120 SEG42 -562 2369 94 SEG68 1794 1169 103 SEG59 1563 2369 112 SEG50 438 2369 121 SEG41 -687 2369 95 SEG67 1794 1294 104 SEG58 1438 2369 113 SEG49 313 2369 122 SEG40 -812 2319 96 SEG66 1794 1419 105 SEG57 1313 2369 114 SEG48 188 2369 123 SEG39 -937 2369 97 SEG65 1794 1544 106 SEG56 1188 2369 115 SEG47 63 2369 124 SEG38 -1062 2369 98 SEG64 1794 1669 107 SEG55 1063 2369 116 SEG46 -62 2369 125 SEG37 -1187 2369 99 SEG63 1794 1794 108 SEG54 938 2369 117 SEG45 -187 2369 127 SEG36 -1312 2369 100 SEG62 1794 1919 109 SEG53 813 2369 118 SEG44 -312 2369 127 SEG35 -1437 2369 101 SEG61 1794 2044 110 SEG52 688 2369 119 SEG43 -437 2369 128 SEG34 -1562 2369 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 2) MIRROR TYPE PAD COORDINATE PAD PAD NO. NAME 1 NC COORDINATE PAD NO. PAD NAME COORDINATE X Y PAD NO PAD NAME X Y - - 24 COM15 -1794 -581 47 COORDINATE PAD PAD NO. NAME X Y DB2 -720 -2369 70 COORDINATE X Y SEG1 1794 -1831 2 SEG60 -1794 2169 25 COM14 -1794 -706 48 DB1 -595 -2369 71 SEG2 1794 -1706 3 SEG61 -1794 2044 26 COM13 -1794 -831 49 DB0 -470 -2369 72 SEG3 1794 -1581 4 SEG62 -1794 1919 27 COM12 -1794 -956 50 VDD -345 -2369 73 SEG4 1794 -1456 5 SEG63 -1794 1794 28 COM11 -1794 -1081 51 E -220 -2369 74 SEG5 1794 -1331 6 SEG64 -1794 1669 29 COM10 -1794 -1206 52 RW -95 -2369 75 SEG6 1794 -1206 7 SEG65 -1794 1544 30 COM9 -1794 -1331 53 RS 30 -2369 76 SEG7 1794 -1081 8 SEG66 -1794 1419 31 COM8 -1794 -1456 54 D 155 -2369 77 SEG8 1794 -956 9 SEG67 -1794 1294 32 COM7 -1794 -1581 55 M 280 -2369 78 SEG9 1794 -831 10 SEG68 -1794 1169 33 COM6 -1794 -1706 56 CLK2 405 -2369 79 SEG10 1794 -706 11 SEG69 -1794 1044 34 COM5 -1794 -1831 57 CLK1 530 -2369 80 SEG11 1794 -581 12 SEG70 -1794 919 35 COM4 -1794 -1956 58 V5 655 -2369 81 SEG12 1794 -456 13 SEG71 -1794 794 36 COM3 -1794 -2081 59 V4 780 -2369 82 SEG13 1794 -331 14 SEG72 -1794 669 37 COM2 -1794 -2206 60 V3 905 -2369 83 SEG14 1794 -206 15 SEG73 -1794 544 38 COM1 -1794 -2331 61 V2 1030 -2369 84 SEG15 1794 -81 16 SEG74 -1794 419 39 NC - - 62 V1 1155 -2369 85 SEG16 1794 44 17 SEG75 -1794 294 40 NC - - 63 NC - - 86 SEG17 1794 169 18 SEG76 -1794 169 41 TEST -1470 -2369 64 NC - - 87 SEG18 1794 294 19 SEG77 -1794 44 42 DB7 -1345 -2369 65 NC - - 88 SEG19 1794 419 20 SEG78 -1794 -81 43 DB6 -1220 -2369 66 NC - - 89 SEG20 1794 544 21 SEG79 -1794 -206 44 DB5 -1095 -2369 67 OSC1 1794 -2231 90 SEG21 1794 669 22 SEG80 -1794 -331 45 DB4 -970 -2369 68 OSC2 1794 -2106 91 SEG22 1794 794 23 COM16 -1794 -456 46 DB3 -845 -2369 69 VSS 1794 -1956 92 SEG23 1794 919 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD MIRROR TYPE PAD COORDINATE (CONTINUED) PAD PAD NO. NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X Y PAD NO. PAD NAME COORDINATE X Y 93 SEG24 1794 1044 102 SEG33 1794 2169 111 SEG42 562 2369 120 SEG51 -563 2369 94 SEG25 1794 1169 103 SEG34 1562 2369 112 SEG43 437 2369 121 SEG52 -688 2369 95 SEG26 1794 1294 104 SEG35 1437 2369 113 SEG44 312 2369 122 SEG53 -813 2369 96 SEG27 1794 1419 105 SEG36 1312 2369 114 SEG45 187 2369 123 SEG54 -938 2369 97 SEG28 1794 1544 106 SEG37 1187 2369 115 SEG46 62 2369 124 SEG55 -1063 2369 98 SEG29 1794 1669 107 SEG38 1062 2369 116 SEG47 -63 2369 125 SEG56 -1188 2369 99 SEG30 1794 1794 108 SEG39 937 2369 117 SEG48 -188 2369 127 SEG57 -1313 2369 100 SEG31 1794 1919 109 SEG40 812 2369 118 SEG49 -313 2369 127 SEG58 -1438 2369 101 SEG32 1794 2044 110 SEG41 687 2369 119 SEG50 -438 2369 128 SEG59 -1563 2369 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD PAD DESCRIPTION Pad No. (Normal/Mirror) Input/ Output Name VDD (54/50) VSS(35, 69) Description Interface For logical circuit (+3 V, + 5 V) - Power supply V1 ~ V5 (42~46/62~58) 0 V (GND) Power Supply Bias voltage level for LCD driving. SEG1 ~ SEG80 (34~2, 128~82/ 70~128, 2~22) Output Segment output Segment signal output for LCD drive. LCD COM1 ~ COM16 (66~81/38~23) Output Common output Common signal output for LCD drive. LCD OSC1,OSC2 (37,36/67,68) Input (OSC1)/ Output (OSC2) Oscillator CLK1,CLK2 (47,48/57,56) Output M (49/55) D (50/54) When using internal oscillator, connect external Rf resistor. If external clock is used, connect it to OSC1. External resistor/ oscillator (OSC1) Extension driver Latch (CLK1)/Shift (CLK2) clock Each outputs extension driver latch clock and extension driver shift clock. Extension driver Output Alternated signal for LCD driver output Outputs the alternating signal to convert LCD driver waveform to AC. Extension driver Output Display data interface Output extension driver data (the 41st dot's data) Extension driver RS (51/53) Input Register select Used as register selection input. When RS = "1", Data register is selected. When RS = "0", Instruction register is selected. RW (52/52) Input Read/Write Used as read/write selection input. When RW = "1", read operation. When RW = "0", write operation. MPU E (53/51) Input Read/Write enable Used as read. Write enable signal. MPU When 8-bit bus mode, used as low order bidirectional data bus. During 4-bit bus mode open these pins. MPU When 8-bit bus mode, used as high order bidirectional data bus. In case of 4-bit bus mode, used as both high and low order. DB7 used for Busy Flag output. MPU This pin must be fixed to VDD or open. – DB0~DB3 (55~58/49~46) DB4~DB7 (59~62/45~42) TEST (63/41) Input / Output Data bus 0~7 Input Test Pin MPU KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD FUNCTION DESCRIPTION System Interface This chip has both kinds of interface type with MPU: 4-bit bus and 8-bit bus. 4-bit bus and 8-bit bus are selected by the DL bit in the instruction register. During read or write operation, two 8-bit registers are used. One is the data register (DR), and the other is the instruction register (IR). The data register (DR) is used as a temporary data storage place for being written into or read from DDRAM/ CGRAM. Target RAM is selected by RAM address setting instruction. Each internal operation, reading from or writing into RAM, is done automatically. After MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR automatically. Also, after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM automatically. The Instruction register (IR) is used only to store instruction codes transferred from MPU. MPU cannot use it to read instruction data. To select a register, use RS input pin in 4-bit/8-bit bus mode. Table 1. Various Kinds of Operations According to RS and R/W bits. RS R/W Operation 0 0 Instruction Write operation (MPU writes Instruction code into IR) 0 1 Read Busy flag (DB7) and address counter (DB0 ~ DB6) 1 0 Data Write operation (MPU writes data into DR) 1 1 Data Read operation (MPU reads data from DR) Busy Flag (BF) When BF = "1", it indicates that the internal operation is being processed. So during this time the next instruction cannot be accepted. BF can be read, when RS = "0" and R/W = "1" (Read Instruction Operation), through DB7 port. Before executing the next instruction, be sure that BF is not "1". KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Address Counter (AC) The Address Counter (AC) stores DDRAM/CGRAM addresses, transferred from IR. After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1. When RS = "0" and R/W = "1", AC can be read through ports DB0~DB6. Display Data RAM (DDRAM) DDRAM stores display data of maximum 80 x 8 bits (80 characters). DDRAM address is set in the address counter (AC) as a hexadecimal number. (Refer to Fig-1.) LSB MSB AC6 AC5 AC4 AC3 AC2 AC1 AC0 Fig-1. DDRAM Address 1) 1-line display In the case of a 1-line display, the address range of DDRAM is 00H ~ 4FH. An Extension driver will be used. Fig-2 shows the example when a 40-segment extension driver is added. 2) 2-line display In the case of a 2-line display, the address range of DDRAM is 00H ~27H and 40H ~ 67H. An Extension driver will be used. Fig-3 shows the example when a 40 segment extension driver is added. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D OE OF 10 11 12 13 14 15 16 17 COM1 COM8 1 SEG80 KS0070B SEG1 2 3 4 5 6 7 8 9 SEG1 Extension Driver (40SEG) SEG40 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 COM1 COM8 SEG1 SEG80 KS0070B SEG1 Extension Driver (40SEG) SEG40 (After Shift Left) COM1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 4F 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 COM8 SEG1 KS0070B SEG1 Extension Driver (40SEG) SEG40 (After Shift Right) Fig-2. 1-line × 24ch. Display With 40 SEG. Extension Driver. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D OE OF 10 11 12 13 14 15 16 17 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 COM1 COM8 COM9 COM10 SEG1 1 KS0070B 2 3 4 5 6 7 8 9 SEG80 SEG1 Extension Driver (40SEG) SEG40 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 COM1 COM8 COM1 COM8 KS0070B SEG1 SEG80 SEG1 Extension Driver (40SEG) SEG40 (After Shift Left) 1 COM1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 27 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 67 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 COM8 COM9 COM10 SEG1 KS0070B SEG80 SEG1 Extension Driver (40SEG) SEG40 (After Shift Right) Fig-3. 2-line × 24ch. Display With 40 SEG. Extension Driver. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD CGROM (Character Generator ROM) CGROM has a 5 × 7-dot 192 character pattern, and a 5 × 10-dot 32 character pattern (Refer to Table 2). CGRAM (Character Generator RAM) CGRAM has up to 5 × 8-dot 8 characters. By writing font data to CGRAM, user defined characters can be used (Refer to Table 3). Timing Generation Circuit Timing generation circuit generates clock signals for the internal operations. LCD Driver Circuit LCD Driver circuit has 16 common and 80 segment signals for LCD driving. Data from CGRAM/CGROM is transferred to an 80-bit segment latch serially, and then stored to an 80-bit shift latch. When each com is selected by a 16-bit common register, segment data is also output through the segment driver from an 80-bit segment latch. In the case of a 1-line display mode, COM1 ~ COM8 have 1/8 duty or COM1 ~ COM11 have a 1/11 duty. In a 2-line display mode, COM1 ~ COM16 have a 1/16 duty ratio. Cursor/Blink Control Circuit It controls cursor/blink ON/OFF at cursor position. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Table 2. CGROM Character Code Table KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Table 3. Relationship Between Character Code (DDRAM) and Character Pattern (CGRAM) CGRAM Address Character Code (DDRAM data) CGRAM Data D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 P7 P6 P5 P4 P3 P2 P1 P0 0 0 0 × 0 0 0 0 0 · · · · 0 0 · · · · · · · · 0 0 0 · · · · 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 1 1 × × × 0 1 1 1 0 1 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 0 0 0 1 0 1 0 0 0 1 1 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 1 1 1 1 1 0 0 0 1 1 0 0 0 1 · · · · · · · · × 0 0 1 1 1 1 1 · · · · 1 Pattern number pattern 1 · · · · × × × 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 1 1 0 0 0 0 0 · · · · pattern 8 * “× ”: don’t care KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD INSTRUCTION DESCRIPTION Outline To overcome the speed difference between the internal clock of KS0070B and the MPU clock, KS0070B performs internal operations by storing control information to IR or DR. The internal operation is determined according to the signal from MPU, composed of read/write and data bus (Refer to Table 5 ). Instruction can be divided largely into four kinds: (1) KS0070B function set instructions ( set display methods, set data length, etc.) (2) address set instructions to internal RAM (3) data transfer instructions with internal RAM (4) others . The address of the internal RAM is automatically increased or decreased by 1. * NOTE: During internal operation, Busy Flag (DB7) is read "1". Busy Flag check must be preceded by the next instruction. When you make an MPU program with checking the Busy Flag (DB7), it must be necessary 1/2 Fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to "0". Contents 1) Clear Display RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 0 DB3 0 DB2 0 DB1 0 DB0 1 Clear all the display data by writing "20H" (space code) to all DDRAM addresses, and set the DDRAM addresses to "00H" in the AC (address counter). Return cursor to original status, namely, bring the cursor to the left edge on first line of the display. Make entry mode increment (I/D = "1"). 2) Return Home RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 1 × Return Home is the cursor return home instruction. Set DDRAM address to "00H" in the address counter. Return cursor to its original site and return display to its original status, if shifted. Contents of DDRAM does not change. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 3) Entry Mode Set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 I/D SH Set the moving direction of cursor and display. I/D : Increment / decrement of DDRAM address (cursor or blink) When I/D = “1”, cursor/blink moves to right and DDRAM address is increased by 1. When I/D = “0”, cursor/blink moves to left and DDRAM address is decreased by 1. * CGRAM operates the same as DDRAM, when reading from or writing to CGRAM. SH: Shift of entire display When DDRAM is in read (CGRAM read/write) operation or SH = “0”, shift of entire display is not performed. If SH = “1” and in DDRAM write operation, shift of entire display is performed according to I/D value (I/D = “1” : shift left, I/D = “0” : shift right). 4) Display ON/OFF Control RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 1 D C B Control display/cursor/blink ON/OFF 1-bit register. D : Display ON/OFF control bit When D = “1”, entire display is turned on. When D = “0”, display is turned off, but display data remains in DDRAM. C : Cursor ON/OFF control bit When C = “1”, cursor is turned on. When C = “0”, cursor disappears in current display, but I/D register retains its data. B : Cursor Blink ON/OFF control bit When B = “1”, cursor blink is on, which performs alternately between all the “1” data and display characters at the cursor position. When B = “0”, blink is off. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 5) Cursor or Display Shift RS 0 R/W 0 DB7 0 DB6 0 DB5 0 DB4 1 DB3 S/C DB2 R/L DB1 × DB0 × Without writing or reading the display data, shift right/left cursor position or display. This instruction is used to correct or search display data.(Refer to Table 4) During 2-line mode display, cursor moves to the 2nd line after the 40st digit of the 1st line. Note that display shift is performed simultaneously in all the lines. When displayed data is shifted repeatedly, each line shifts individually. When display shift is performed, the contents of the address counter are not changed. Table 4. Shift Patterns According to S/C and R/L bits S/C R/L Operation 0 0 Shift cursor to the left, AC is decreased by 1 0 1 Shift cursor to the right, AC is increased by 1 1 0 Shift all the display to the left, cursor moves according to the display 1 1 Shift all the display to the right, cursor moves according to the display 6) Function Set RS 0 R/W 0 DB7 0 DB6 DB5 DB4 0 1 DL DB3 N DB2 F DB1 × DL : Interface data length control bit When DL = “1”, it means 8-bit bus mode with MPU. When DL = “0”, it means 4-bit bus mode with MPU. So to speak, DL is a signal to select 8-bit or 4-bit bus mode. When 4-bit bus mode, it needs to transfer 4-bit data in two parts. N : Display line number control bit When N = “0”, it means 1-line display mode. When N = “1”, 2-line display mode is set. F : Display font type control bit When F = “0”, 5 × 7 dots format display mode When F = “1”, 5 × 10 dots format display mode. DB0 × KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 7) Set CGRAM Address RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address to AC. This instruction makes CGRAM data available from MPU. 8) Set DDRAM Address RS 0 R/W 0 DB7 1 DB6 DB5 DB4 AC6 AC5 AC4 DB3 AC3 DB2 AC2 DB1 AC1 DB0 AC0 Set DDRAM address to AC. This instruction makes DDRAM data available from MPU. When in 1-line display mode (N = 0), DDRAM address is from “00H” to “4FH”. In 2-line display mode (N = 1), DDRAM address in the 1st line is from “00H” to “27H”, and DDRAM address in the 2nd line is from “40H” to “67H”. 9) Read Busy Flag & Address RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 This instruction shows whether KS0070B is in internal operation or not. If the resultant BF is “1”, it means the internal operation is in progress and you have to wait until BF is Low. Then the next instruction can be performed. In this instruction you can also read the value of the address counter. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 10) Write data to RAM RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write binary 8-bit data to DDRAM/CGRAM. The selection of RAM from DDRAM, and CGRAM, is set by the previous address set instruction : DDRAM address set, and CGRAM address set. RAM set instruction can also determine the AC direction to RAM. After write operation, the address is automatically increased/decreased by 1, according to the entry mode. 11) Read data from RAM RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read binary 8-bit data from DDRAM/CGRAM. The selection of RAM is set by the previous address set instruction. If the address set instruction of RAM is not performed before this instruction, the data that is read first is invalid, because the direction of AC is not determined. If you read RAM data several times without RAM address set instruction before read operation, you can get correct RAM data from the second, but the first data would be incorrect, because there is no time margin to transfer RAM data. In the case of DDRAM read operation, cursor shift instruction plays the same role as DDRAM address set instruction; It also transfers RAM data to the output data register. After read operation the address counter is automatically increased/decreased by 1 according to the entry mode. After CGRAM read operation, display shift may not be executed correctly. * In the case of RAM write operation, after this AC is increased/decreased by 1 like read operation. At this time, AC indicates the next address position, but you can read only the previous data by the read instruction. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD Table 5. Instruction Table Instruction Code Instruction Description RS R/WDB7DB6DB5DB4DB3DB2DB1DB0 Clear Display Execution Time (fosc = 270 kHz) 0 0 0 0 0 0 0 0 0 1 Write “20H” to DDRAM and set DDRAM address to “00H” from AC. 1.53 ms 0 0 0 0 0 0 0 0 1 Set DDRAM address to “00H” from AC × and return cursor to its original position if shifted. 1.53 ms Entry Mode Set 0 0 0 0 0 0 0 1 I/D SH Assign cursor moving direction and enable the shift of entire display . 39 µs Display ON/ OFF Control 0 0 0 0 0 0 1 D C Set display (D), cursor (C), and blinking of cursor (B) on/off control bit. 39 µs Cursor or Display Shift 0 0 0 0 0 1 S/C R/L × Function Set 0 0 0 0 1 Set CGRAM Address 0 0 0 1 AC5AC4AC3AC2AC1AC0 Set CGRAM address in address counter. 39 µs Set DDRAM Address 0 0 1 AC6AC5AC4AC3AC2AC1AC0 Set DDRAM address in address counter. 39 µs Return Home Read Busy flag and Address DL N F × B Set cursor moving and display shift × control bit, and the direction, without changing of DDRAM data. 39 µs Set interface data length (DL : 4-bit/8× bit), numbers of display line (N : 1-line/ 2-line, Display font type (F:0 ...) 39 µs 0 1 Whether during internal operation or not can be known by reading BF. BF AC6AC5AC4AC3AC2AC1AC0 The contents of address counter can also be read. Write Data to RAM 1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM (DDRAM/CGRAM). 43 µs Read Data from RAM 1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM (DDRAM/CGRAM). 43 µs 0 µs * NOTE : When you make an MPU program with checking the Busy Flag (DB7), it must be necessary 1/2Fosc for executing the next instruction by falling E signal after the Busy Flag (DB7) goes to “0”. KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD INTERFACE WITH MPU 1) Interface with 8-bit MPU When interfacing data length are 8-bit, transfer is performed all at once through 8 ports, from DB0 to DB7. An Example of the timing sequence is shown below. RS R/W E Internal signal Internal operation DATA DB7 INSTRUCTIO N Busy No Busy Busy Busy Flag Check Busy Flag Check Busy Flag Check DATA INSTRUCTION Fig-4. Example of 8-bit Bus Mode Timing Diagram 2) Interface with 4-bit MPU When interfacing data length are 4-bit, only 4 ports, from DB4 to DB7, are used as data bus. At first, higher 4-bit (in case of 8-bit bus mode, the contents of DB4 - DB7) are transferred, and then the lower 4-bit (in case of 8-bit bus mode, the contents of DB0 - DB3) are transferred. So transfer is performed in two parts. Busy Flag outputs “1” after the second transfer are ended. Example of timing sequence is shown below. RS R/W E Internal signal DB7 Internal operation D7 D3 INSTRUCTION Busy AC3 Busy Flag Check No Busy AC3 Busy Flag Check Fig-5. Example of 4-bit Bus Mode Timing Diagram D7 D3 INSTRUCTIO N KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD APPLICATION INFORMATION ACCORDING TO LCD PANEL 1) LCD Panel: 16 characters × 1-line format ( 5 × 7 dots + 1 cursor line 1/4 bias, 1/8 duty) ... COM1 COM7 COM8 SEG1 ... KS0070B ... SEG10 SEG78 SEG79 SEG80 2) LCD Panel: 16 characters × 1-line format (5 × 10 dots + 1 cursor line 1/4 bias, 1/11 duty) ... COM1 COM10 COM11 KS0070B ... SEG1 ... SEG10 SEG78 SEG79 SEG80 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 3) LCD Panel : 16 character × 2-line format: (5 × 7 dots + 1 cursor line 1/5 bias, 1/16 duty) ... COM1 COM7 COM8 ... COM9 KS0070B COM15 COM16 ... SEG1 ... SEG10 SEG80 4) LCD Panel : 32 character × 1-line format: ( 5 × 7 dots + 1 cursor line 1/5 bias, 1/16 duty) ... COM1 COM7 COM8 SEG1 KS0070B SEG10 SEG80 ... COM9 COM16 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 5) LCD Panel : 8 character × 2-line format: ( 5 × 7 dots + 1 cursor line 1/4 bias, 1/8 duty) ... SEG1 ... SEG10 SEG40 ... COM1 COM7 COM8 KS0070B ... SEG41 ... SEG50 SEG80 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD APPLICATION CIRCUIT LCD Panel C1 − C16 S1 − S80 KS0070B V V V V V V V E 6 5 4 3 2 1 E V V V V V V V E 6 5 4 3 2 1 E DL1 FCS SHL1 SHL2 VSS VDD DL2 DL1 DR2 CL1 CL2 M V V V V V V V E 6 5 4 3 2 1 E VSS M CLK1 CLK2 VDD V1 V2 V3 V4 V5 DB0 − DB7 VDD V1 V2 V3 V4 V5 To MPU GND or Other voltage * When KS0065B is externally connected to the KS0070B, you can increase the number of display digits up to 80 characters VLCD (1/5 bias) OSC2 DL1 FCS SHL1 SHL2 VSS VDD SC1 − SC40 DL2 DL1 DR2 CL1 CL2 M KS0065B OSC1 DL1 FCS SHL1 SHL2 VSS VDD KS0065B D DL2 DL1 DR2 CL1 CL2 M KS0065B SC1 − SC40 SC1 − SC40 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD BIAS VOLTAGE DIVIDE CIRCUIT 1) 1/4 bias, 1/8 OR 1/11 duty VDD VDD R R 2) 1/5 bias, 1/16 OR 1/11 duty R V1 V1 R V2 V2 R KS0070B R VDD VDD V3 KS0070B V3 R V4 V4 R R V5 V5 GND OR OTHER GND OR OTHER VOLTAGE VOLTAGE INITIALIZING When the power is turned on, KS0070B is initialized automatically by the power on reset circuit. During the initialization, the following instructions are executed, and BF(Busy Flag) is kept “1”(busy state) to the end of initialization. (1) Display Clear instruction Write “20H” to all DDRAM (2) Set Functions instruction DL = 1 : 8-bit bus mode N = 0 : 1-line display mode F = 0 : 5×7 font type (3) Control Display ON/OFF instruction D = 0 : Display OFF C = 0 : Cursor OFF B = 0 : Blink OFF (4) Set Entry Mode instruction I/D = 1 : Increment by 1 SH = 0 : No entire display shift KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD FRAME FREQUENCY 1) 1/8 duty cycle A) A-type Waveform 1-line selection period 1 2 3 4 ... 7 8 1 2 3 ... 7 8 VDD COM1 ... V1 ... ... V4 V5 Item Clock / Frequency Line selection period 400 clocks Frame frequency 84.4 Hz * fosc=270 kHz (1 clock = 3.7 µs) KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 2) 1/11 duty cycle A) A-type Waveform 1-line selection period 1 2 3 4 ... 10 11 1 2 3 ... 10 11 VDD COM1 ... V1 ... ... V4 V5 Item Clock / Frequency Line selection period 400 clocks Frame frequency 61.4 Hz * fosc=270 kHz (1 clock = 3.7 µs) 3) 1/16 duty cycle A) A-type Waveform 1-line selection period 1 2 3 4 ... 15 16 1 2 3 ... 15 16 VDD COM1 ... V1 ... ... V4 V5 Item Clock / Frequency Line selection period 200 clocks Frame frequency 84.4 Hz * fosc=270 kHz (1 clock = 3.7 µs) KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD INITIALIZING BY INSTRUCTION 1) 8-bit interface mode Power on Condition: fosc=270 kHz Wait for more than 30 ms after VDD rises to 4.5 v N Function set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 N F × × F Wait for more than 39 µs D Display ON/OFF Control RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 1 D C B C B 0 1-line mode 1 2-line mode 0 5 × 7 dots 1 5 × 10 dots 0 display off 1 display on 0 cursor off 1 cursor on 0 blink off 1 blink on 0 decrement mode 1 increment mode 0 entire shift off 1 entire shift on Wait for more than 39 µs Clear Display RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 0 1 Wait for more than 1.53 ms I/D Entry Mode Set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 I/D SH Initialization end SH KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 2) 4-bit interface mode Power on Condition: fosc=270 kHz Wait for more than 30 ms after Vdd rises to 4.5 v Function set N RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 0 X X X X 0 0 0 0 1 0 X X X X 0 0 N F X X X X X X F Wait for more than 39 µs D 0 1-line mode 1 2-line mode 0 5 × 7 Dots 1 5 × 10 Dots 0 display off 1 display on 0 cursor off 1 cursor on 0 blink off 1 blink on 0 decrement mode 1 increment mode 0 entire shift off 1 entire shift on Display On/Off Control RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 X X X X 0 0 1 D C B X X X X C B Wait for more than 39 µs Clear Display RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 X X X X 0 0 0 0 0 1 X X X X Wait for more than 1.53 ms Entry Mode Set RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 X X X X 0 0 0 1 I/D SH X X X X I/D SH Initialization end KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD EXAMPLE OF INSTRUCTION AND DISPLAY CORRESPONDENCE 1. Power supply on: Initialized by the internal power on reset circuit. RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 LCD DISPLAY 2. Function Set: 8-bit, 2-line, 5×7 dot RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 1 1 1 0 X X 3. Display ON/OFF Control: Display/Cursor on/Blink off RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 1 1 1 0 _ 4. Entry Mode Set: Increment RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 1 0 _ 5. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 1 0 0 1 1 S_ 6. Write Data to DDRAM: Write A RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 0 0 0 1 SA_ 7. Write Data to DDRAM: Write M RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 1 1 0 1 SAM_ 8. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 1 0 0 1 1 SAMS_ KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 9. Write Data to DDRAM: Write U RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 1 0 1 0 1 SAMSU_ 10. Write Data to DDRAM: Write N RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 1 1 1 0 SAMSUN_ 11. Write Data to DDRAM: Write G RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 0 1 1 1 SAMSUNG_ 12. Set DDRAM Address: 40H RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 1 1 0 0 0 0 0 0 SAMSUNG _ 13. Write Data to DDRAM: Write K RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 1 0 1 1 SAMSUNG K_ 14. Write Data to DDRAM: Write S RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 1 0 0 1 1 SAMSUNG KS_ 15. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 0 1 1 0 0 0 0 SAMSUNG KS 0 _ 16. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 0 1 1 0 0 0 0 SAMSUNG KS 0 0_ KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD 17. Write Data to DDRAM: Write 7 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 0 1 1 0 1 1 1 SAMSUNG KS0 0 7 _ 18. Write Data to DDRAM: Write 2 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 0 1 1 0 0 1 0 SAMSUNG KS0 0 7 2 _ 19. Cursor or Display Shift: Cursor shift left RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 1 0 0 X X SAMSUNG KS 0 0 7 2 20. Write Data to DDRAM: Write 0 RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 0 1 1 0 0 0 0 SAMSUNG KS 0 0 7 0 _ 21. Entry Mode Set: Entire Display shift Enable RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 1 1 1 SAMSUNG KS 0 0 7 0 _ 22. Write Data to DDRAM: Write B RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 1 0 0 1 0 0 0 0 1 0 AMSUNG S0070B_ 23. Return Home RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 1 × SAMSUNG KS 0 0 70B 24. Clear Display RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 0 0 0 0 0 0 0 0 0 1 _ KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD MAXIMUM ABSOLUTE RATE Maximum Absolute Power Ratings Item Symbol Unit Value Power supply voltage(1) VDD V -0.3 to + 7.0 Power supply voltage(2) VLCD V VDD -15.0 to VDD + 0.3 Input voltage VIN V -0.3 to VDD + 0.3 * NOTE: Voltage greater than above may damage the circuit (VDD > V1 > V2 > V3 > V4 > V5) Temperature Characteristics Item Symbol Unit Value Operating temperature Topr °C -30 to + 85 Storage temperature Tstg °C -55 to + 125 KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD ELECTRICAL CHARACTERISTICS DC Characteristics (VDD = 4.5V to 5.5V, Ta = -30 to +85 °C) Item Symbol Condition Min Typ Max Unit Operating Voltage VDD - 4.5 - 5.5 V 0.7 1.0 - 0.4 0.6 IDD1 ceramic resonator fosc = 250 kHz IDD2 Resistor oscillation external clock operation fosc = 270 kHz Supply Current mA Input Voltage (1) (except OSC1) VIH1 - 2.2 - VDD VIL1 - -0.3 - 0.6 Input Voltage (2) (OSC1) VIH2 - VDD-1.0 - VDD VIL2 - -0.2 - 1.0 Output Voltage (1) (DB0 to DB7) VOH1 IOH = -0.205 mA 2.4 - - VOL1 IOL = 1.2 µA - - 0.4 Output Voltage (2) (except DB0 to DB7) VOH2 IO = -40 µA 0.9VDD - - VOL2 IO = 40 µA - - 0.1VDD - - 1 - - 1 Voltage Drop VdCOM VdSEG IO = + 0.1 mA V V V V V Input Leakage Current IIL VIN = 0 V to VDD -1 - 1 Low Input Current IIN VIN = 0 V, VDD = 5 V (PULL UP) -50 -125 -250 Internal Clock (external Rf) fIC Rf = 91 kΩ + 2% (VDD = 5 V) 190 270 350 kHz 150 250 350 kHz 45 50 55 % - - 0.2 µs 4.6 - 10.0 V fEC External Clock duty - tr, tf LCD Driving Voltage VLCD VDD-V5 (1/5, 1/4 Bias) µA KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD (VDD = 2.7 to 4.5V, Ta = -30 + 85°C) Item Symbol Condition Min Typ Max Unit Operating Voltage VDD - 2.7 - 4.5 V - 0.3 0.5 IDD1 ceramic resonator fosc = 250 kHz IDD2 Resistor oscillation external clock operation fosc = 270 kHz Supply Current mA - 0.17 0.3 Input Voltage (1) (except OSC1) VIH1 - 0.7VDD - VDD VIL1 - -0.3 - 0.4 Input Voltage (2) (OSC1) VIH2 - 0.7VDD - VDD VIL2 - - 0.2VDD Output Voltage (1) (DB0 to DB7) VOH1 IOH = -0.1 mA 2.0 - - VOL1 IOL = 0.1 mA - - 0.4 Output Voltage (2) (except DB0 to DB7) VOH2 IO = -40 µA 0.8VDD - - VOL2 IO = 40 µA - - 0.2VDD - - 1 - - 1.5 Voltage Drop VdCOM VdSEG IO = + 0.1 mA V V V V V Input Leakage Current IIL VIN = 0 V to VDD -1 - 1 Low Input Current IIN VIN = 0 V, VDD = 3 V (PULL UP) -10 -50 -120 Internal Clock (external Rf) fIC Rf = 75 kΩ + 2% (VDD = 3 V) 190 250 350 kHz 125 270 350 kHz 45 50 55 % - - 0.2 µs 3.0 - 10.0 V fEC External Clock duty - tr, tf * LCD Driving Voltage VLCD * LCD Driving Voltage (next page) VDD-V5 (1/5, 1/4 Bias) µA KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD * LCD Driving Voltage POWER DUTY 1/8, 1/11 DUTY 1/16 DUTY BIAS 1/4 BIAS 1/5 BIAS VDD VDD VDD V1 VDD - VLCD/4 VDD - VLCD/5 V2 VDD - VLCD/2 VDD - 2VLCD/5 V3 VDD - VLCD/2 VDD - 3VLCD/5 V4 VDD - 3VLCD/4 VDD - 4VLCD/5 V5 VDD - VLCD VDD - VLCD KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD AC Characteristics (VDD = 4.5 to 5.5 V, Ta = -30 to +85oC) Mode Item Symbol Min Typ Max tc 500 - - E Rise / Fall Time tr,tf - - 25 E Pulse Width (High, Low) tw 220 - - R/W and RS Setup Time tsu1 40 - - R/W and RS Hold Time th1 10 - - Data Setup Time tsu2 60 - - Data Hold Time th2 10 - - E Cycle Time tc 500 - - E Rise / Fall Time tr,tf - - 25 E Pulse Width (High, Low) tw 220 - - R/W and RS Setup Time tsu 40 - - R/W and RS Hold Time th 10 - - Data Output Delay Time tD - - 120 Data Hold Time tDH 20 - - E Cycle Time Write Mode (Refer to Fig-6) Read Mode (Refer to Fig-7) Unit ns ns (VDD = 2.7 to 4.5 V, Ta = -30 to +85oC) Mode Item Symbol Min Typ Max tc 1400 - - E Rise / Fall Time tr,tf - - 25 E Pulse Width (High, Low) tw 400 - - R/W and RS Setup Time tsu1 60 - - R/W and RS Hold Time th1 20 - - Data Setup Time tsu2 140 - - Data Hold Time th2 10 - - E Cycle Time tc 1400 - - E Rise / Fall Time tr,tf - - 25 E Pulse Width (High, Low) tw 400 - - R/W and RS Setup Time tsu 60 - - R/W and RS Hold Time th 20 - - Data Output Delay Time tD - - 360 Data Hold Time tDH 5 - - E Cycle Time Write Mode (Refer to Fig-6) Read Mode (Refer to Fig-7) Unit ns ns KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD (VDD = 2.7 to 5.5 V, Ta = -30 to +85oC) Mode Item Interface Mode with Extension Driver (Refer to Fig-8) Symbol Min Type Max Clock Pulse Width (High, Low) tw 800 - - Clock Rise / Fall Time tr,tf - - 100 Clock Setup Time tSU1 500 - - Data Setup Time tSU2 300 - - Data Hold Time tDH 300 - - M Delay Time tDw -1000 - 1000 VIH1 RS VIL1 tSU1 R/W th1 VIL1 VIL1 tw E VIH1 VIL1 tr DB0~DB7 VIH1 VIL1 th1 tf VIH1 VIL1 VIL1 tSU2 th2 Valid Data VIH1 VIL1 tc Fig-6. Write Mode Timing Diagram Unit ns KS0070B 16COM / 80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD VIH1 RS VIL1 tSU th VIH1 VIH1 R/W th tw tf E VIH1 VIH1 VIL1 VIL1 VIL1 tD tr tDH VIH1 DB0~DB7 VIL1 Valid Data VIH1 VIL1 tc Fig-7. Read Mode Timing Diagram VOH2 tf VOH2 tW CLK1 VOL2 tr CLK2 tW VOL2 VOH2 VOH2 VOL2 tW tSU1 VOH2 VOL2 D tDH tSU1 M tDM VOL2 Fig-8. Interface Mode with Extension Driver Timing Diagram