S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 1 PRODUCT OVERVIEW PRODUCT OVERVIEW S3C8-SERIES MICROCONTROLLERS Samsung's S3C8 series of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. Important CPU features include: — Efficient register-oriented architecture — Selectable CPU clock sources — Idle and Stop power-down mode release by interrupt — Built-in basic timer with watchdog function A sophisticated interrupt structure recognizes up to eight interrupt levels. Each level can have one or more interrupt sources and vectors. Fast interrupt processing (within a minimum six CPU clocks) can be assigned to specific interrupt levels. S3C80F7/C80F9/C80G7/C80G9 Microcontroller The S3C80F7/C80F9/C80G7/C80G9 single-chip CMOS microcontroller is fabricated using a highly advanced CMOS process and is based on Samsung's newest CPU architecture. The S3C80F9/C80G9 is the microcontroller which has 32-Kbyte mask-programmable ROM and S3C80F7/C80G7 is the microcontroller which has 24-Kbyte mask-programmable ROM. The S3P80F9/P80G9 is the microcontroller which has 32-Kbyte one-time-programmable EPROM and S3P80F7/P80G7 is the microcontroller which has 24-Kbyte one-time-programmable EPROM. Using a proven modular design approach, Samsung engineers developed S3C80F7/C80F9/C80G7/C80G9 by integrating the following peripheral modules with the powerful SAM87 RC core: — Internal LVD circuit and 16 bit-programmable pins for external interrupts. — One 8-bit basic timer for oscillation stabilization and watchdog function (system reset). — One 8-bit timer/counter and one 16-bit timer/counter with selectable operating modes. — One 8-bit counter with auto-reload function and one-shot or repeat control. The S3C80F7/C80F9/C80G7/C80G9 is a versatile general-purpose microcontroller which is especially suitable for use as remote transmitter controller. It is currently available in a 32-pin SOP, 42-pin SDIP and 44-pin QFP package. 1-1 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) FEATURES CPU Carrier Frequency Generator • • SAM87RC CPU core One 8-bit counter with auto-reload function and one-shot or repeat control (Counter A) Memory • 32-Kbyte internal ROM (S3C80F9/C80G9) : 0000H–7FFFH • 24-Kbyte internal ROM (S3C80F7/C80G7) : 0000H–5FFFH • Data memory: 272-byte RAM (318 register) Instruction Set • 78 instructions • IDLE and STOP instructions added for powerdown modes Instruction Execution Time • 500 ns at 8-MHz fOSC (minimum) Back-up mode • In S3C80G7/C80G9, this function is disabled when operating state is “STOP mode”. • When RESET pin is lower than Input Low Voltage (VIL), the chip enters Back-up mode to block oscillation and reduce the current consumption. Low Voltage Detect Circuit • Low voltage detect to get into Back-up mode. • Low level detect voltage − S3C80F7/C80F9: 2.20 V (Typ) ± 200mV − S3C80G7/C80G9: 1.90 V (Typ) ± 200mV Interrupts • When VDD is lower than VLVD, the chip enters Back-up mode to block oscillation and reduce the current consumption. 22 interrupt sources with 16 vector and 7 level. Operating Temperature Range I/O Ports • • –40 °C to + 85 °C Three 8-bit I/O ports (P0–P2), one 8-bit output port(P4) and 6-bit port (P3) for a total of 38 bitprogrammable pins.(44-QFP) Operating Voltage Range • • Three 8-bit I/O ports (P0–P2), one 8-bit output port(P4) and 4-bit port (P3) for a total of 36 bitprogrammable pins.(42-SDIP) 1.7V to 5.0V at 4 MHz fOSC (S3C80G7/C80G9) • 2.0V to 5.0V at 8 MHz fOSC (S3C80F7/C80F9) • Three 8-bit I/O ports (P0–P2) and one 2-bit I/O port (P3) for a total of 26-bit programmable pins. (32-SOP) Timers and Timer/Counters • One programmable 8-bit basic timer (BT) for oscillation stabilization control or watchdog timer (software reset) function • One 8-bit timer/counter (Timer 0) with three operating modes; Interval mode, Capture and PWM mode. • One 16-bit timer/counter (Timer1) with two operating modes; Interval mode and Capture. 1-2 Package Type • 44-pin QFP-1010B • 42-pin SDIP • 32-pin SOP S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW BLOCK DIAGRAM VDD XIN XOUT LVD P0.0-0.3 (INT0-INT3) P0.4-P0.7 (INT4) P1.0-P1.7 Port 0 Port 1 MAIN OSC 8-Bit Basic Timer 8-Bit Timer/ Counter TEST RESET Port 2 P2.0-2.3 (INT5-INT8) P2.4-2.7 (INT9) I/O Port and Interrupt Control Port 3 SAM87RC CPU P3.0-T0PWM/ T0CAP/(T1CAP) P3.1-REM/(T0CK) P3.2/(T0CK) P3.3/(T1CAP) P3.4-3.5 16-Bit Timer/ Counter Port 4 32K-Bytes ROM 317-Bytes Register File P4.0-4.7 Carrier Registor (Counter A) Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PIN ASSIGNMENTS P4.2 P4.1 P4.0 P2.0/INT5 P2.1/INT6 P2.2/INT7 P2.3/INT8 P2.4/INT9 P3.0/T0PWM/T0CAP/SDAT R3.1/REM/SCLK VDD VSS XOUT XIN TEST P2.5/INT9 P2.6/INT9 RESET P2.7/INT9 P1.0 P3.2/T0CK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 S3C80F7/C80F9 /C80G7/C80G9 (Top View) 42-SDIP 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 P4.3 P0.7/INT4 P0.6/INT4 P0.5/INT4 P0.4/INT4 P0.3/INT3 P0.2/INT2 P0.1/INT1 P0.0/INT0 P4.4 P4.5 P4.6 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P4.7 P3.3/T1CAP Figure 1-2. Pin Assignment Diagram (42-Pin SDIP Package) 1-4 PRODUCT OVERVIEW 33 32 31 30 29 28 27 26 25 24 23 P0.3/INT3 P0.2/INT2 P0.1/INT1 P0.0/INT0 P4.4 P4.5 P4.6 P1.7 P1.6 P1.5 P1.4 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 34 35 36 37 38 39 40 41 42 43 44 S3C80F7/C80F9 /C80G7/C80G9 (Top View) (44-QFP) 22 21 20 19 18 17 16 15 14 13 12 P1.3 P1.2 P1.1 P4.7 P3.3/T1CAP P3.2/T0CK P1.0 P2.7/INT9 P3.5 P3.4 RESET P2.3/INT8 P2.4/INT9 P3.0/T0PWM/T0CAP/SDAT P3.1/REM/SCLK VDD VSS XOUT XIN TEST P2.5/INT9 P2.6/INT9 1 2 3 4 5 6 7 8 9 10 11 P0.4/INT4 P0.5/INT4 P0.6/INT4 P0.7/INT4 P4.3 P4.2 P4.1 P4.0 P2.0/INT5 P2.1/INT6 P2.2/INT7 Figure 1-3. Pin Assignment Diagram (44-Pin QFP Package) 1-5 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) VSS XIN XOUT TEST P2.5/INT9 P2.6/INT9 RESET P2.7/INT9 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 S3C80F7/C80F9 /C80G7/C80G9 (Top View) 32-SOP 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VDD P3.1/REM/T0CK/SCLK P3.0/T0PWM/T0CAP/T1CAP/SDAT P2.4/INT9 P2.3/INT8 P2.2/INT7 P2.1/INT6 P2.0/INT5 P0.7/INT4 P0.6/INT4 P0.5/INT4 P0.4/INT4 P0.3/INT3 P0.2/INT2 P0.1/INT1 P0.0/INT0 Figure 1-4. Pin Assignment Diagram (32-Pin SOP Package) 1-6 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW Table 1-1. Pin Descriptions of 44-QFP and 42-SDIP Pin Names Pin Type Pin Description Circuit Type 42 Pin No. 44 Pin No. Shared Functions P0.0–P0.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors can be assigned by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. SED & R circuit built in P0 for STOP releasing. 1 34–41 30–37 Ext. INT (INT0 - 4) P1.0–P1.7 I/O I/O port with bit-programmable pins. Configurable to input mode or output mode. Pin circuits are either push-pull or n-channel open-drain type. 2 20 24–30 16 20–26 – P2.0–P2.3 P2.4–P2.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors can be assigned by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. SED & R circuit built in P2 for STOP releasing. 1 4–8, 16, 17 19 42–44 1,2, 10,11, 15 Ext. INT (INT5–9) P3.0 P3.1 I/O 2-bit I/O port with bit-programmable pins. Configurable to input mode, push-pull output mode, or n-channel open-drain output mode. Input mode with pull-up resistors can be assigned by software. The two port 3 pins have high current drive capability 3 4 9–10 3–4 T0PWM/ T0CAP REM P3.2–P3.3 I C-MOS Input port with pull-up resistors 5 21 22 17 18 (T0CK) (T1CAP) P3.4–P3.5 O Open drain output port for high current drive 6 None 13–14 – P4.0–P4.7 O 8- bit-programmable output pins. Configurable to open drain output port or push-pull output port. 7 1–3 42,23 31-33 41–38 27–29 19 – XIN, XOUT – System clock input and output pins – 13,14 7,8 – RESET I System reset signal input pin and backup mode input. 8 18 12 – TEST I Test signal input pin (for factory use only; must be connected to VSS.) – 15 9 – VDD – Power supply input pin – 11 5 – VSS – Ground pin – 12 6 – 1-7 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 1-2. Pin Descriptions of 32-SOP Pin Names Pin Type Pin Description Circuit Type 32 Pin No. Shared Functions P0.0–P0.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors are assignable by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/ disable, and interrupt pending control. SED & R circuit built in P0 for STOP releasing. 1 17–24 Ext. INT P1.0–P1.7 I/O I/O port with bit-programmable pins. Configurable to input mode or output mode. Pin circuits are either push-pull or n-channel open-drain type. 2 9–16 – P2.0–P2.3 P2.4–P2.7 I/O I/O port with bit-programmable pins. Configurable to input or push-pull output mode. Pull-up resistors can be assigned by software. Pins can be assigned individually as external interrupt inputs with noise filters, interrupt enable/disable, and interrupt pending control. SED & R circuit built in P2 for STOP releasing. 1 25–28 Ext. INT P3.0 P3.1 I/O 2-bit I/O port with bit-programmable pins. Configurable to input mode, push-pull output mode, or n-channel open-drain output mode. Input mode with pull-up resistors can be assigned by software. The two port 3 pins have high current drive capability. 3 4 30,31 T0PWM/ T0CAP/T1CAP REM/T0CK 29,5, 6,8 XIN, XOUT – System clock input and output pins – 2,3 – RESET I System reset signal input pin and back-up mode input. 8 7 – TEST I Test signal input pin (for factory use only; – 4 – must be connected to VSS). VDD – Power supply input pin – 32 – VSS – Ground pin – 1 – 1-8 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW PIN CIRCUITS VDD Pull-up Resistor Pull-up Enable VDD Data Input/ Output Output Disable VSS External Interrupt Stop Noise Filter Stop release Figure 1-5. Pin Circuit Type 1 (Port 0 and Port2) 1-9 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PIN CIRCUITS (Continued) VDD Pull-up Resistor Pull-up Enable VDD Data Input/ Output Open-Drain Output Disable VSS Normal Input Noise Filter Figure 1-6. Pin Circuit Type 2 (Port 1) 1-10 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW PIN CIRCUITS (Continued) VDD Pull-up Resistor Pull-up Enable P3CON.2 VDD M U X Port 3.0 Data T0_PWM Data P3.0/T0PWM T0CAP/(T1CAP) Open-Drain Output Disable VSS P3.0 Input P3CON.2,6,7 T0CAP/(T1CAP) M U X Noise filter Figure 1-7. Pin Circuit Type 3 (P3.0) 1-11 PRODUCT OVERVIEW S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PIN CIRCUITS (Continued) VDD Pull-up Resistor Pull-up Enable P3CON.5 VDD M U X Port 3.1 Data CAOF(CACON.0) Carrier On/Off (P3.7) Data P3.1/REM/(T0CK) Open-Drain Output Disable VSS P3.1 Input P3CON.5,6,7 M U X T0CK Noise filter Figure 1-8. Pin Circuit Type 4 (P3.1) Circuit VDD Pull-up Resistor Input T0CK : P3.2 T1CAP: P3.3 M U X Figure 1-9. Pin Circuit Type 5 (P3.2, P3.3) 1-12 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) PRODUCT OVERVIEW PIN CIRCUITS (Continued) Output Data VSS Figure 1-10. Pin Circuit type 6 (P3.4, P3.5) VDD Data Output Open-Drain Output Disable VSS Figure 1-11. Pin Circuit type 7 (Port 4) VDD Pull-up Resistor RESET Figure 1-12. Pin Circuit type 8 (RESET) 1-13 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 14 ELECTRICAL DATA ELECTRICAL DATA 1 (S3C80F7/C80F9) OVERVIEW In this section, S3C80F7/C80F9 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: — Absolute maximum ratings — D.C. electrical characteristics — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by an external interrupt — Stop mode release timing when initiated by a Reset — I/O capacitance — A.C. electrical characteristics — Input timing for external interrupts — Input timing for RESET — Oscillation characteristics — Oscillation stabilization time 14-1 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 14-1. Absolute Maximum Ratings (TA = 25 °C) Parameter Symbol Conditions Supply voltage VDD – – 0.3 to + 6.5 V Input voltage VIN – – 0.3 to VDD + 0.3 V Output voltage VO All output pins – 0.3 to VDD + 0.3 V Output current High I OH One I/O pin active – 18 All I/O pins active – 60 One I/O pin active + 30 Total pin current for ports 0, 1, and 2 + 100 Total pin current for port 3 + 40 Output current Low Operating temperature Storage temperature I OL Rating Unit mA mA TA – – 40 to + 85 °C TSTG – – 65 to + 150 °C Table 14-2. D.C. Electrical Characteristics (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Symbol Operating Voltage VDD FOSC = 8 MHz (Instruction clock = 2 MHz) Input High voltage VIH1 Input Low voltage Output High voltage 14-2 Conditions Min Typ Max Unit 2.0 – 5.0 V All input pins except VIH2 and VIH3 0.8 VDD – VDD V VIH2 RESET 0.85 VDD VDD VIH3 XIN VDD – 0.3 VDD VIL1 All input pins except VIL2 and VIL3 VIL2 RESET VIL3 XIN VOH1 VDD = 2.4 V IOH = – 6 mA Port 3.1 only, TA = 25°C VDD – 0.7 VOH2 VDD = 2.4 V, IOH = – 2.2mA P3.0, P2.0–2.3 TA = 25°C VDD – 0.7 0 – 0.2 VDD V 0.2 VDD 0.3 V S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Table 14-2. D.C. Electrical Characteristics (Continued) (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Symbol Conditions Min Typ Max Unit Output High voltage VOH3 VDD = 2.4 V,IOH = – 1 mA Port0, Port1, P2.4-2.7 and Port4 TA = 25°C VDD – 1.0 – – V Output Low voltage VOL1 VDD = 2.4 V, IOL = 12 mA, port – 0.4 0.5 V 3.1 only, TA = 25°C VOL2 VDD = 2.4 V, IOL = 5 mA P3.0, P3.4-3.5, P2.0-2.3 TA = 25°C 0.4 0.5 VOL3 IOL = 2mA Port 0, Port1, P2.4-2.7 and Port4 TA = 25°C 0.4 1 ILIH1 VIN = VDD All input pins except XIN and XOUT – 1 ILIH2 VIN = VDD, XIN and XOUT ILIL1 VIN = 0 V All input pins except XIN, XOUT, and RESET ILIL2 VIN = 0 V XIN and XOUT Output High leakage current ILOH VOUT = VDD All output pins – – 1 µA Output Low leakage current ILOL VOUT = 0 V All output pins – – –1 µA Pull-up resistors RL1 VIN = 0 V, VDD = 2.4 V 44 55 95 kΩ Input High leakage current Input Low leakage current – µA 20 – – –1 µA – 20 TA = 25°C, Ports 0–2, P3.2–3.3 14-3 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 14-2. D.C. Electrical Characteristics (Continued) (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Supply current Symbol IDD1 (note) IDD2 IDD3 Conditions Min Typ Max Unit – 6 11 mA 4 MHz crystal 4.5 9 Idle mode VDD = 5.0 V 8 MHz crystal 1.8 3.5 4 MHz crystal 1.6 3.0 18 25 VDD = 3.6 V 12 15 VDD = 2.4 V 4.5 8 VDD = 0.7 V 1 1.5 Operating mode VDD = 5.0 V 8 MHz crystal Stop mode; VDD = 5.0 V – uA NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. Table 14-3. Characteristics of Low Voltage Detect circuit (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Hysteresys Voltage of LVD (Slew Rate of LVD) ∆V – – 100 300 mV Low level detect voltage VLVD – 2.00 2.20 2.40 V Table 14-4. Data Retention Supply Voltage in Stop Mode (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Data retention supply voltage VDDDR – 1.0 – 5.0 V Data retention supply current IDDDR – – 1 µA 14-4 VDDDR = 1.0 V Stop mode S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Idle Mode (Basic Timer Active) ~ ~ Stop Mode Data Retention Mode ~ ~ VDD Normal Operating Mode VDDDR Execution of STOP Instrction EXT INT 0.8VDD 0.2VDD tWAIT Figure 14-1. Stop Mode Release Timing When Initiated by an External Interrupt Reset Occur ~ ~ Stop Mode Normal Operating Mode ~ ~ VDD Oscillation Stabilization Time Execution of STOP Instrction RESET tWAIT NOTE: tWAIT is the same as 4096 x 16 x 1/fOSC. Figure 14-2. Stop Mode Release Timing When Initiated by a RESET 14-5 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Reset Occur Oscillation Stabilization Time Stop Mode Normal Operating Mode Back-up Mode VDD ~ ~ VLVD ~ ~ VDDDR tWAIT Execution of STOP Instrction NOTE: Data Retention Time tWAIT is the same as 4096 x 16 x 1/fOSC. Figure 14-3. Stop Mode Release Timing When Initiated by a LVD Table 14-5. Input/Output Capacitance (TA = – 40 °C to + 85 °C , VDD = 0 V) Parameter Symbol Conditions Min Typ Max Unit Input capacitance CIN f = 1 MHz; unmeasured pins are connected to VSS – – 10 pF Output capacitance COUT Min Typ Max Unit P0.0–P0.7, P2.3–P2.0 VDD = 5.0 V 200 300 – ns Input VDD = 5.0 V 1000 – – I/O capacitance CIO Table 14-6. A.C. Electrical Characteristics (TA = – 40 °C to + 85 °C) Parameter Symbol Interrupt input, High, Low width tINTH, tINTL RESET input Low tRSL width 14-6 Conditions S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) tINTL ELECTRICAL DATA tINTH 0.8 VDD 0.2 VDD NOTE: The unit tCPU means one CPU clock period. Figure 14-4. Input Timing for External Interrupts (Port 0, P2.3–P2.0) Reset Occur Normal Operating Mode Oscillation Stabilization Time Back-up Mode (Stop Mode) Normal Operating Mode VDD RESET tWAIT NOTE: tWAIT is the same as 4096 x 16 x 1/fOSC. Figure 14-5. Input Timing for RESET 14-7 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 14-7. Oscillation Characteristics (TA = – 40 °C + 85 °C) Oscillator Clock Circuit Conditions Crystal XIN Min Typ Max Unit CPU clock oscillation frequency 1 – 8 MHz CPU clock oscillation frequency 1 – 8 MHz XIN input frequency 1 – 8 MHz C1 XOUT C2 Ceramic XIN C1 XOUT C2 External clock Open Pin XIN XOUT S3C80F9 External Clock Table 14-8. Oscillation Stabilization Time (TA = – 40 °C + 85 °C, VDD = 4.5 V to 5.0 V) Oscillator Test Condition Min Typ Max Unit Main crystal f OSC > 400 kHz – – 20 ms Main ceramic Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range. – – 10 ms External clock (main system) XIN input High and Low width (tXH, tXL) 25 – 500 ns Oscillator stabilization wait time tWAIT when released by a reset (1) – 2 /fOSC – ms – – – ms tWAIT when released by an interrupt (2) 16 NOTES: 1. fOSC is the oscillator frequency. 2. The duration of the oscillation stabilization time (tWAIT) when it is released by an interrupt is determined by the setting in the basic timer control register, BTCON. 14-8 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Instruction Clock fOSC (Main Oscillator Frequency) A 2 MHz 8 MHz 1.25 MHz 6 MHz 1.0 MHz 4 MHz 500 kHz 250 kHz 400 kHz 100 kHz 1 2 3 4 5 6 7 Supply Voltage (V) Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16) A: 2.0 V, 8 MHz Figure 14-6. Operating Voltage Range of S3C80F9 14-9 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 15 ELECTRICAL DATA ELECTRICAL DATA 2 (S3C80G7/C80G9) OVERVIEW In this section, S3C80G7/C80G9 electrical characteristics are presented in tables and graphs. The information is arranged in the following order: — Absolute maximum ratings — D.C. electrical characteristics — Data retention supply voltage in Stop mode — Stop mode release timing when initiated by an external interrupt — Stop mode release timing when initiated by a Reset — I/O capacitance — A.C. electrical characteristics — Input timing for external interrupts — Input timing for RESET — Oscillation characteristics — Oscillation stabilization time 15-1 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 15-1. Absolute Maximum Ratings (TA = 25 °C) Parameter Symbol Conditions Supply voltage VDD – – 0.3 to + 6.5 V Input voltage VIN – – 0.3 to VDD + 0.3 V Output voltage VO All output pins – 0.3 to VDD + 0.3 V Output current High I OH One I/O pin active – 18 All I/O pins active – 60 One I/O pin active + 30 Total pin current for ports 0, 1, and 2 + 100 Total pin current for port 3 + 40 Output current Low Operating temperature Storage temperature I OL Rating Unit mA mA TA – – 40 to + 85 °C TSTG – – 65 to + 150 °C Table 15-2. D.C. Electrical Characteristics (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Symbol Operating Voltage VDD FOSC = 4 MHz (Instruction clock = 1 MHz) Input High voltage VIH1 Input Low voltage Output High voltage 15-2 Conditions Min Typ Max Unit 1.7 – 5.0 V All input pins except VIH2 and VIH3 0.8 VDD – VDD V VIH2 RESET 0.85 VDD VDD VIH3 XIN VDD – 0.3 VDD VIL1 All input pins except VIL2 and VIL3 VIL2 RESET VIL3 XIN VOH1 VDD = 2.4 V IOH = – 6 mA Port 3.1 only, TA = 25°C VDD – 0.7 VOH2 VDD = 2.4 V, IOH = – 2.2mA P3.0, P2.0–2.3 TA = 25°C VDD– 0.7 0 – 0.2 VDD V 0.2 VDD 0.3 V S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Table 15-2. D.C. Electrical Characteristics (Continued) (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Output High voltage Symbol Conditions Min Typ Max Unit VOH3 VDD = 2.4 V,IOH = – 1 mA Port0, Port1, P2.4–2.7 and Port4 VDD – 1.0 – – V – 0.4 0.5 V TA = 25°C Output Low voltage VOL1 VDD = 2.4 V, IOL = 12 mA, port 3.1 only, TA = 25°C VOL2 VDD = 2.4 V, IOL = 5 mA P3.0, P3.4–3.5, P2.0–2.3 TA = 25°C 0.4 0.5 VOL3 IOL = 2mA 0.4 1 – 1 Port 0, Port1, P2.4–2.7 and Port4 TA = 25°C ILIH1 VIN = VDD All input pins except XIN and XOUT ILIH2 VIN = VDD, XIN and XOUT ILIL1 VIN = 0 V All input pins except XIN, XOUT, and RESET ILIL2 VIN = 0 V XIN and XOUT Output High leakage current ILOH VOUT = VDD All output pins – – 1 µA Output Low leakage current ILOL VOUT = 0 V All output pins – – –1 µA Pull-up resistors RL1 VIN = 0 V, VDD = 2.4 V 44 55 95 kΩ Input High leakage current Input Low leakage current – µA 20 – – –1 µA – 20 TA = 25°C, Ports 0–2, P3.2–3.3 15-3 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 15-2. D.C. Electrical Characteristics (Continued) (TA = – 40 °C to + 85 °C, VDD = 2.0 V to 5.0 V) Parameter Supply current Symbol Conditions IDD1 Operating mode VDD = 5.0 V 4 MHz crystal IDD2 Idle mode VDD = 5.0 V 4 MHz crystal IDD3 Stop mode; (note) Min Typ Max Unit – 4.5 9 mA 1.6 3.0 1 6 – uA VDD = 5.0 V NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. Table 15-3. Characteristics of Low Voltage Detect circuit (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Hysteresys Voltage of LVD (Slew Rate of LVD) ∆V – – 100 300 mV Low level detect voltage VLVD – 1.70 1.90 2.10 V Table 15-4. Data Retention Supply Voltage in Stop Mode (TA = – 40 °C to + 85 °C) Parameter Symbol Conditions Min Typ Max Unit Data retention supply voltage VDDDR – 1.0 – 5.0 V Data retention supply current IDDDR – – 1 µA 15-4 VDDDR = 1.0 V Stop mode S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Idle Mode (Basic Timer Active) ~ ~ Stop Mode Data Retention Mode ~ ~ VDD Normal Operating Mode VDDDR Execution of STOP Instrction EXT INT 0.8VDD 0.2VDD tWAIT Figure 15-1. Stop Mode Release Timing When Initiated by an External Interrupt Reset Occur ~ ~ Stop Mode Normal Operating Mode ~ ~ VDD Oscillation Stabilization Time Execution of STOP Instrction RESET tWAIT NOTE: tWAIT is the same as 4096 x 16 x 1/fOSC. Figure 15-2. Stop Mode Release Timing When Initiated by a RESET 15-5 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 15-5. Input/Output Capacitance (TA = – 40 °C to + 85 °C , VDD = 0 V) Parameter Symbol Conditions Min Typ Max Unit Input capacitance CIN f = 1 MHz; unmeasured pins are connected to VSS – – 10 pF Output capacitance COUT Min Typ Max Unit P0.0–P0.7, P2.3–P2.0 VDD = 5.0 V 200 300 – ns Input VDD = 5.0 V 1000 – – I/O capacitance CIO Table 15-6. A.C. Electrical Characteristics (TA = – 40 °C to + 85 °C) Parameter Symbol Interrupt input, High, Low width tINTH, tINTL RESET input Low tRSL width 15-6 Conditions S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) tINTL ELECTRICAL DATA tINTH 0.8 VDD 0.2 VDD NOTE: The unit tCPU means one CPU clock period. Figure 15-3. Input Timing for External Interrupts (Port 0, P2.3–P2.0) Reset Occur Normal Operating Mode Oscillation Stabilization Time Back-up Mode (Stop Mode) Normal Operating Mode VDD RESET tWAIT NOTE: tWAIT is the same as 4096 x 16 x 1/fOSC. Figure 15-4. Input Timing for RESET 15-7 ELECTRICAL DATA S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) Table 15-7. Oscillation Characteristics (TA = – 40 °C + 85 °C) Oscillator Clock Circuit Conditions Crystal XIN Min Typ Max Unit CPU clock oscillation frequency 1 – 4 MHz CPU clock oscillation frequency 1 – 4 MHz XIN input frequency 1 – 4 MHz C1 XOUT C2 Ceramic XIN C1 XOUT C2 External clock Open Pin XOUT S3C80G9 XIN External Clock Table 15-8. Oscillation Stabilization Time (TA = – 40 °C + 85 °C, VDD = 4.5 V to 5.0 V) Oscillator Test Condition Min Typ Max Unit Main crystal f OSC > 400 kHz – – 20 ms Main ceramic Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range. – – 10 ms External clock (main system) XIN input High and Low width (tXH, tXL) 25 – 500 ns Oscillator stabilization wait time tWAIT when released by a reset (1) – 2 /fOSC – ms tWAIT when released by an interrupt (2) – – – ms 16 NOTES: 1. fOSC is the oscillator frequency. 2. The duration of the oscillation stabilization time (tWAIT) when it is released by an interrupt is determined by the setting in the basic timer control register, BTCON. 15-8 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) ELECTRICAL DATA Instruction Clock fOSC (Main Oscillator Frequency) 2 MHz 8 MHz 1.25 MHz 6 MHz A 1.0 MHz 4 MHz 500 kHz 250 kHz 400 kHz 100 kHz 1 2 3 4 5 6 7 Supply Voltage (V) Instruction Clock = 1/6n x oscillator frequency (n = 1, 2, 8, or 16) A: 1.7 V, 4 MHz Figure 15-6. Operating Voltage Range of S3C80G9 15-9 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) 16 MECHANICAL DATA MECHANICAL DATA OVERVIEW The S3C80F7/C80F9/C80G7/C80G9 microcontroller is currently available in a 32-pin SOP, 42-pin SDIP and 44pin QFP package. 0-8 #17 19.90 ± 0.20 0.20 + 0.10 - 0.05 2.20 MAX 20.30 MAX 0.10 0.25 2.00 ± #16 0.90 ± 8.34 ± 32-SOP-450A #1 11.43 0.20 12.00 ± 0.30 #32 (0.43) 0.40 ± 0.10 NOTE: 1.27 0.05 MIN 0.10 MAX Dimensions are in millimeters. Figure 16-1. 32-Pin SOP Package Dimension 16-1 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) #22 0-15 15.24 14.00 ± 0.20 #42 0.2 5 42-SDIP-600 +0 - 0 .10 .05 MECHANICAL DATA 0.50 ± 0.10 (1.77) NOTE: 1.00 ± 0.10 1.78 5.08 MAX 39.10 ± 0.20 3.30 ± 0.30 39.50 MAX 3.50 ± 0.20 #21 0.51 MIN #1 Dimensions are in millimeters. Figure 16-2. 42-Pin SDIP Package Dimension 16-2 S3C80F7/C80F9/C80G7/C80G9 (KS88C01524/C01532/C01624/C01632) MECHANICAL DATA 13.20 ± 0.30 0-8 10.00 ± 0.20 10.00 ± 0.20 + 0.10 - 0.05 0.10 MAX 44-QFP-1010B 0.80 ± 0.20 13.20 ± 0.30 0.15 #44 #1 0.80 + 0.10 0.35 - 0.05 0.15 MAX 0.05 MIN (1.00) 2.05 ± 0.10 2.30 MAX NOTE: Dimensions are in millimeters. Figure 16-3. 44-Pin SQFP Package Dimension 16-3