Ordering number : EN*5088C CMOS IC LC372100PP, PM, PT-10/20LV 2 MEG (262144 words × 8 bits) Mask ROM Internal Clocked Silicon Gate Preliminary Overview Package Dimensions The LC372100PP, LC372100PM and LC372100PT are 262,144-word × 8-bit organization (2,097,152-bit) mask programmable read only memories. The LC372100PP-10, LC372100PM-10 and LC372100PT-10 feature an access time of 100 ns, an OE access time of 40 ns, and a standby current of 30 µA, and are optimal for use in 5-V systems that require high-speed access. The LC372100PP-20LV, LC372100PM-20LV and LC372100PT-20LV feature an access time of 200 ns, an OE access time of 80 ns, and a standby current of 4 µA, and thus are optimal for use in 3-V systems that use batteries. Additionally, they provide high-speed access in 3.3-V systems (3.0 to 3.6 V) with a 150-ns access time and a 60-ns OE access time. These ROMs adopt the JEDEC standard pin assignment which allows them to replace EPROM easily. To prevent bus line collisions in multi-bus microcontroller systems, pin 24 can be mask programmed to be either active high or active low. unit: mm 3192-DIP32 [LC372100PP] SANYO: DIP32 unit: mm 3205-SOP32 [LC372100PM] Features • 262144 words × 8 bits organization • Power supply LC372100PP, PM, PT-10: 5.0 V ± 10% LC372100PP, PM, PT-20LV: 2.7 to 3.6 V • Fast access time (tAA, tCA) LC372100PP, PM, PT-10: 100 ns (max.) LC372100PP, PM, PT-20LV: 200 ns (max.) 150 ns (VCC = 3.0 to 3.6 V) • Operating current LC372100PP, PM, PT-10: 70 mA (max.) LC372100PP, PM, PT-20LV: 20 mA (max.) • Standby current LC372100PP, PM, PT-10: 30 µA (max.) LC372100PP, PM, PT-20LV: 5 µA (max.) • Full static operation (internal clocked type) • Fully TTL compatible (5 V supply) • 3 state outputs • JEDEC standard pin configuration • Package type LC372100PP-10/20LV: DIP32 (600 mil) LC372100PM-10/20LV: SOP32 (525 mil) LC372100PT-10/20LV: TSOP32 (8 mm × 20 mm) SANYO: SOP32 unit: mm 3224-TSOP32 [LC372100PT] SANYO: TSOP32 (type-I) SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN 53098HA (OT)/51195TH (OT)/41095TH (OT) No. 5088-1/5 LC372100PP, PM, PT-10/20LV Pin Assignments Pin Functions A0 to A17 Address input D0 to D7 Data output CE/CE Chip enable input OE/OE Output enable input VCC Power supply VSS Ground Block Diagram Truth Table CE/CE OE/OE L/H X H/L L/H H/L H/L X: H or L level should be offered. Output Current drain High-impedance Standby mode High-impedance Operating mode DOUT Operating mode No. 5088-2/5 LC372100PP, PM, PT-10/20LV Specifications Absolute Maximum Ratings *1 Parameter Symbol Maximum supply voltage Conditions Ratings VCC max Supply input voltage VIN Supply output voltage VOUT Allowable power dissipation Pd max Unit –0.3 to +7.0 V –0.3*2 to VCC + 0.3 V –0.3 to VCC + 0.3 V 1.0 W Ta = 25°C; Reference values for the SANYO DIP package Operating temperature Topr 0 to +70 °C Storage temperature Tstg –55 to +125 °C Note: 1. Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to Recommended Operating Conditions. 2. VIN (min) = –3.0 V (pulse width ≤ 30 ns) Input/Output Capacitance* at Ta = 25°C, f = 1.0 MHz Parameter Input capacitance Symbol CIN Output capacitance COUT Conditions Ratings min typ 8 pF 10 pF VIN = 0 V; Reference values for the SANYO DIP package VOUT = 0 V; Reference values for the SANYO DIP package Unit max Note: * This parameter is periodically sampled and not 100% tested. 3 V Operation DC Recommended Operating Ranges at Ta = 0 to +70°C Parameter Symbol Supply voltage Conditions VCC max Ratings min typ 2.7 3.0 Unit max 3.6 V Input high level voltage VIH 0.8 VCC VCC + 0.3 V Input low level voltage VIL –0.3 +0.4 V DC Electrical Characteristics at Ta = 0 to +70°C, VCC = 2.7 to 3.6 V Parameter Operating supply current Standby supply current Ratings Symbol Conditions ICCA1 CE = 0.2 V (CE = VCC – 0.2 V), VI = VCC – 0.2 V/0.2 V 15 mA ICCA2 CE = VIL (CE = VIH), IO = 0 mA, VI = VIH/VIL, f = 5 MHz 20 mA ICCS1 CE = VCC – 0.2 V (CE = 0.2 V) 5 (0.5*) µA ICCS2 CE = VIH (CE = VIL) 50 (10*) µA min typ Unit max Input leakage current ILI VIN = 0 to VCC ±1.0 µA Output leakage current ILO CE or OE = VIH (CE or OE = VIL), VOUT = 0 to VCC ±1.0 µA Output high level voltage VOH IOH = –0.5 mA Output low level voltage VOL IOL = 0.5 mA VCC – 0.2 V 0.2 V Note: * Guaranteed at Ta = 25°C AC Characteristics at Ta = 0 to +70°C, VCC = 2.7 to 3.6 V Parameter Cycle time Symbol Conditions tCYC Ratings min typ Unit max 200 (150*2) ns Address access time tAA 200 (150*2) ns CE access time tCA 200 (150*2) ns OE access time tOA 80 (60*2) Output hold time tOH Output disable time*1 tOD*1 25 ns ns 50 ns Note: 1. tOD is measured from the earlier edge of the CE (CE) or OE(OE)’s going high impedance. This parameter is periodically sampled and not 100% tested. 2. Guaranteed at VCC = 3.0 to 3.6 V No. 5088-3/5 LC372100PP, PM, PT-10/20LV 5 V Operation DC Recommended Operating Ranges at Ta = 0 to +70°C Parameter Symbol Supply voltage Conditions Ratings min typ Unit max VCC max 4.5 5.5 V Input high level voltage VIH 2.2 VCC + 0.3 V Input low level voltage VIL –0.3 +0.6 V 5.0 DC Electrical Characteristics at Ta = 0 to +70°C, VCC = 5.0 V ±10% Parameter Operating supply current Standby supply current Ratings Symbol Conditions ICCA1 CE = 0.2 V (CE = VCC – 0.2 V), VI = VCC – 0.2 V/0.2 V 30 mA ICCA2 CE = VIL (CE = VIH), IO = 0 mA, VI = VIH/VIL, f = 10 MHz 70 mA ICCS1 CE = VCC – 0.2 V (CE = 0.2 V) ICCS2 CE = VIH (CE = VIL) min typ Unit max 30 (1.0*) µA 1.0 (300*) mA (µA) Input leakage current ILI VIN = 0 to VCC ±1.0 µA Output leakage current ILO CE or OE = VIH (CE or OE = VIL), VOUT = 0 to VCC ±1.0 µA Output high level voltage VOH IOH = –1.0 mA Output low level voltage VOL IOL = 2.0 mA 2.4 V 0.4 V Note: * Guaranteed at Ta = 25°C AC Characteristics at Ta = 0 to +70°C, VCC = 5.0 V ±10% Parameter Cycle time Symbol Conditions tCYC Ratings min typ Unit max 100 ns Address access time tAA 100 CE access time tCA 100 ns OE access time tOA 40 ns Output hold time tOH Output disable time* tOD 20 ns ns 30 ns Note: * tOD is measured from the earlier edge of the CE (CE) or OE(OE)’s going high impedance. This parameter is periodically sampled and not 100% tested. AC Test Conditions Input pulse levels 0.4 V to 0.8 VCC (3 V measurement), 0.4 V to 2.8 V (5 V measurement) Input rise/fall time 5 ns Input timing level 1.5 V Output timing level 1.5 V Output load 70 pF (3 V measurement) See figure (5 V measurement) Output Load (5 V measurement) No. 5088-4/5 LC372100PP, PM, PT-10/20LV Timing Chart System Design Notes These LSIs adopt an internal synchronization technique in which operation is started by detecting changes in either the CE input or the address inputs. As a result, the output data immediately after power on is invalid. Once power has been applied, valid data is output after the application changes the value of either the CE input or at least one of the address inputs. Another point due to the use of the ATD technique is that these LSIs are extremely sensitive to input noise. Applications must take precautions to provide stable input signals, both for the CE input and the address inputs, to prevent incorrect operation. ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of May, 1998. Specifications and information herein are subject to change without notice. PS No. 5088-5/5