Ordering number : EN*5402 CMOS LSI LC82103 Image-Processing LSI for Facsimile, Copier, and OCR Applications Preliminaly Overview The LC82103 converts the analog video signal from the CCD contact image sensor into high-precision binary image data. The LC82103 includes an 8-bit A/D converter and two 6-bit D/A converters. The 6-bit D/A converters are used for setting reference potential (high and low) of the 8-bit A/D converter. The LC82103 converts the input analog data to high precision multilevel data, that is produced by all pixel shading correction process, multilevel image resolution converting process, and γ correction process of user defined curves. That multilevel data is converted to high-precision bi-level image that is produced by using two dimensional filtering, a image separation method, and an error diffusion technique. Finally the LC82103 is able to reduce the image in the horizontal and vertical directions, too. The LC82103 requires absolutely no external memory since it limits the number of pixels processed to 3072/line. This LSI can implement the image processing used by FAX, copier, and OCR applications. • Binary image reduction (horizontal: thinning, fine black line retaining, fine white line retaining, vertical: thinning, fine black line retaining) • Single-voltage 5 V supply and low power due to CMOS process fabrication Package Dimensions unit: mm 3159-QFP64E [LC82103] Features • Number of pixels processed: 3072 pixels/line • Processing speed: 250 ns/pixel maximum (When CLKIN = 32 MHz) • Built-in 8-bit A/D converter (with a sensor signal timing adjustment function) • Built-in two 6-bit D/A converters for setting the A/D converter high and low reference potential • Sensor drive circuit (supports CCDs and several CIS types) • Digital clamping (single-point clamping, even/odd clamping) • Distortion correction (white correction: all pixels, black correction: settable black correction subtracted data) • γ correction (support user-defined curves: 8-bit data) • Image area separation (characters, photographs, screened halftone areas) • Simple binary coding process (fixed threshold, brightness adaptive threshold) • Intermediate processing error diffusion (64 levels) • Multilevel image resolution conversion (1/2, 2/3, 3/2, 2/1) SANYO: QFP64E SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN 63096HA (OT) No. 5402-1/5 LC82103 Specifications Absolute Maximum Ratings at Ta = 25°C, GND = 0 V Parameter Symbol Maximum supply voltage Conditions Ratings VDD max Maximum input and output voltages VI, VO max Allowable power dissipation Pd max Unit –0.3 to +7.0 V –0.3 to VDD + 0.3 V Ta ≤ 70°C 350 mW Operating temperature Topr –30 to +70 Storage temperature Tstg –55 to +125 °C Hand soldering: 3 seconds 350 °C Reflow soldering: 10 seconds 235 °C Soldering temperature endurance °C Allowable Operating Ranges at Ta = –30 to +70°C, GND = 0 V Parameter Symbol Conditions Ratings min typ Unit max Supply voltage VDD 4.5 5.5 V Input voltage VIN 0 VDD V DC Characteristics at Ta = –30 to +70°C, GND = 0 V, VDD = 4.5 to 5.5 V Parameter Symbol Conditions Ratings min Input high-level voltage VIH Input low-level voltage VIL Input leakage current IIH, L VIN = VDD, VSS –10 2.4 typ Unit max 2.2 Output high-level voltage VOH IOH = –3 mA Output low-level voltage VOL IOL = 3 mA Output leakage current IOZ At high impedance Current drain IDD CLKIN = 32 MHz V 0.8 V +10 µA V –10 40 0.4 V +10 µA 70 mA Analog Characteristics Parameter Symbol Conditions min typ max Unit [D/A Converter] Resolution Internal resistance 6 bit 4.8 kΩ [A/D Converter] When the ATAPL potential = 0.8 V, ATAPH potential = 4.2 V Resolution 8 Linearity error Differential linearity error Internal resistance 330 bit ±1 LSB ±1 LSB Ω No. 5402-2/5 LC82103 Block Diagram Pin Functions Type: I: Input pin, O: Output pin, B: Bidirectional pin, P: Power supply pin, NC: No connection Pin No. Symbol I/O 1 D7 B Function 2 D6 B 3 D5 B 4 D4 B 5 D3 B 6 D2 B 7 D1 B 8 D0 B 9 DGND P Digital system ground 10 DVDD P Digital system power supply 11 A8 I 12 A7 I 13 A6 I 14 A5 I 15 A4 I 16 A3 I 17 DGND P 18 A2 I 19 A1 I 20 A0 I 21 WR I CPU interface write signal 22 RD I CPU interface read signal CPU interface data bus D7 is the MSB, and D0 is the LSB. CPU interface address bus A12 is the MSB, and A0 is the LSB. Digital system ground CPU interface address bus 23 A12 I CPU interface address bus 24 DVDD P Digital system power supply System clock input 25 CLKIN I 26 A11 I 27 A10 I 28 A9 I CPU interface address bus Continued on next page. No. 5402-3/5 LC82103 Continued from preceding page. Pin No. Symbol I/O 29 CS I CPU interface chip select signal input Function 30 ICLK I External sampling point signal input 31 TRIG I External trigger signal input 32 RESET I System reset 33 SAMP/LININT O A/D converter sampling point monitor signal output/LINE signal output 34 TEST I Test pins (Must be connected to the digital system ground during normal operation.) 35 REF I DRAM refresh signal input 36 AGND P Analog system ground 37 DALRL I D/A converter low reference input for A/D converter low reference 38 DAHRL I D/A converter high reference input for A/D converter high reference 39 AIN I Sensor signal input 40 TEMP I Temperature signal input 41 ATAPH O Analog mid-level signal used as A/D converter high reference 42 DAHRH I D/A converter high reference input for A/D converter high reference 43 AVDD P Analog system power supply 44 DALRH I D/A converter high reference input for A/D converter low reference 45 ATAPL O Analog mid-level signal used as A/D converter low reference 46 AGND P Analog system ground 47 PD7/SD O DMA output/serial data output DMA output/serial data transfer clock 48 PD6/SDCK O 49 DGND P Digital system ground 50 PD5/SDE O DMA output/serial data output valid period indicator 51 PD4/PP4 B 52 PD3/PP3 B 53 PD2/PP2 B 54 PD1/PP1 B 55 PD0/PP0 B 56 DVDD P 57 DACK/PP5 B DMA data acknowledge signal input/general-purpose I/O port 58 DREQ/PP6 B DMA data request signal output/general-purpose I/O port 59 MTP/PP7 B Motor drive timing signal output/general-purpose I/O port 60 CLK2 O 61 CLK1 O 62 RS O 63 SH O 64 DGND P DMA output/general-purpose I/O ports Digital system power supply Sensor drive signal outputs Digital system ground No. 5402-4/5 LC82103 Application Example 1. C1 is a 0.01 µF laminated ceramic capacitor 2. The video signal from the image sensor must be set up with a polarity that has white data being the highest potential and black data being the lowest. If the peak level of the video signal from the image sensor does not reach a maximum value of 4.2 V, a level conversion circuit should be inserted to allow the full dynamic range of the A/D converter to be taken advantage of. 3. Although AGND and DGND are fully isolated within the LSI, AVDD and DVDD are connected through the LSI substrate. Accordingly, AVDD and DVDD must be set up so that there is no potential difference between them. Also, the time lag between these signals must be under 3 ms when power is first applied or when power is turned off. ■ No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. ■ Anyone purchasing any products described or contained herein for an above-mentioned use shall: ➀ Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: ➁ Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. ■ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of December, 1997. Specifications and information herein are subject to change without notice. No. 5402-5/5