Edge692
200 MHz Monolithic
Dual Pin Electronics Driver
EDGE HIGH-PERFORMANCE PRODUCTS
Description
Applications
The Edge692 is a dual pin electronics driver
manufactured in a high-performance, complementary
bipolar process. In Automatic Test Equipment (ATE)
applications, the Edge692 offers two pin drivers suitable
for drive-only channels in memory testers, as well as for
bidirectional channels in memory, VLSI, and mixed- signal
test systems.
•
•
Memory Test Equipment
Instrumentation
The Edge692 is designed to produce excellent waveforms
(low overshoot), especially at low swings (<500 mV), and
have extremely low leakage currents in HiZ mode. In
addition, the Edge692 is pin and functionally compatible
with both the Edge693 and the Bt692.
Each driver is capable of forcing 9V signals over a 12V
range, in addition to going into a high impedance state.
The driver slew rate is adjustable between 2 V/ns and 1
V/ns.
Functional Block Diagram
Each driver is completely isolated from the other. There
are separate data, enable, slew rate adjust, high and
low levels, as well as power supply inputs for each driver.
SLEWADJA
Combining two independent drivers into a 28 pin PLCC
package offers a highly integrated solution where speed
and density are at a premium.
DRVENA
DRVENA*
DRIVER A
DHIA
DOUTA
EN
Features
DHIA*
DVHA
•
•
•
•
•
•
•
•
•
•
•
2 V/ns Driver Slew Rates
Adjustable Driver Slew Rates
Three Statable
Low HiZ Leakage
Low Voltage Driver Swings
Low Overshoot Waveforms
12 V Output Range
9 V Output Swings
28-Pin PLCC with an Internal
Heat Spreader
Edge693 Compatible
Bt692 Compatible
DVLA
BIAS
DRVENB
DRVENB*
DRIVER B
DHIB
EN
DOUTB
DHIB*
DVHB
DVLB
SLEWADJB
Revision 1 / March 31, 1998
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EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description
Pin Name
Pin #
Description
Driver
DRVENA, DRVENA*
DRVENB, DRVENB*
25, 24
5, 6
Wide voltage differential input pins that determine whether the driver (A and B
respectively) is forcing a voltage or placed in a high impedance state.
DHIA, DHIA*
DHIB, DHIB*
27, 28
3, 2
Wide voltage differential input pins that force one of two programmable levels
(DVH or DVL) at the driver (A and B respectively) output.
DOUTA
DOUTB
18
12
DVLA, DVHA
DVLB, DVHB
22, 23
8, 7
Buffereed analog inputs that program the low and high output levels for driver A
and driver B.
DVLCAPA, DVHCAPA
DVLCAPB, DVHCAPB
16, 21
14, 9
Analog pins. 0.01 µF capacitor to ground should be connected to each pin.
SLEWADJA
SLEWADJB
20
10
Analog current inputs that adjust the rise and fall slew rates of driver A and
driver B.
BIAS
1
Analog input. A positive current into this node sets the internal bias level for
driver A and driver B.
VEEA, VEEB
17, 13
Negative power supply for driver A and driver B.
VCCA, VCCB
19, 11
Positive power supply for driver A and driver B.
GNDA, GNDB
26, 4
Device ground for driver A and driver B.
Driver A and driver B outputs.
Power
Test Pins
THERMAL DIODE
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Thermal monitor output used to track the die junction temperature.
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EDGE HIGH-PERFORMANCE PRODUCTS
PIN Description (continued)
2000 Semtech Corp.
DRVENA
DRVENA*
DVHA
DVLA
DVHCAPA
SLEWADJA
VCCA
25
24
23
22
21
20
19
28-Pin PLCC
15
THERMAL DIODE
DHIB*
2
14
DVLCAPB
DHIB
3
13
VEEB
GNDB
4
12
DOUTB
3
11
1
VCCB
BIAS
10
DVLCAPA
SLEWADJB
16
9
28
DVHCAPB
DHIA*
8
VEEA
DVLB
17
7
27
DVHB
DHIA
6
DOUTA
DRVENB*
18
5
26
DRVENB
GNDA
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EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description
Introduction
Driver Levels
The driver circuit will force the DOUT output to one of
three states:
DVH and DVL are high input impedance voltage controlled
inputs that establish the driver logical high and low levels
respectively.
1.
2.
3.
DVH (driver high voltage level)
DVL (driver low voltage level)
High Impedance (Hi Z).
DVLCAP / DVHCAP
Both driver digital control inputs (DHI/DHI*, DRVEN/
DRVEN*) are wide-voltage differential inputs capable of
receiving ECL, TTL, and CMOS signals. Single-ended
operation is achievable by generating the proper
threshold levels for the inverting inputs.
These two analog nodes are brought out to better
stabilize the high and low driver levels. Much like placing
decoupling capacitors on the DVL and DVH input pins,
the DVLCAP and DVHCAP pins require a fixed .01 µF
chip capacitor (with good high frequency characteristics)
to ground. A tight layout with minimum etch is
recommended.
Drive Enable
Driver Bias
The drive enable (DRVEN/DRVEN*) inputs control
whether the driver is forcing a voltage or is placed in a
high-impedance state. If DRVEN is more positive than
DRVEN*, the output will force either DVL or DVH,
depending on the driver data inputs. When DRVEN is
more negative than DRVEN*, the output is set to highimpedance, independent of the driver data inputs.
The BIAS pin is an analog current input that establishes
a reference current for the driver and influences the
overall speed and power consumption of the chip. The
BIAS input current may be varied from 1.0 mA to 2.0
mA. Ideally, a current source would supply this current.
However, a resistor to a voltage source, typically VCC, is
acceptable.
Driver Data
The BIAS input structure is shown in Figure 1.
The driver data inputs (DHI/DHI*) determine whether
the driver output is high or low. If DHI is more positive
than DHI*, the output will force DVH when the driver is
enabled. If DHI is more negative than DHI*, the output
will force DVL when the driver is enabled.
VCC
REXT
Table 1 summarizes the functionality of the driver enable
and driver data pins.
BIAS
50
DRVEN, DRVEN*
DHI, DHI*
DOUT
DRVEN > DRVEN*
DHI > DHI*
DVH
DRVEN > DRVEN*
DHI < DHI*
DVL
DRVEN < DRVEN*
X
HiZ
VEE
Table 1. DRVEN and DHI Pin Functionality
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Figure 1. BIAS Input Structure
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EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description (continued)
The desired value for the external resistor can be
determined from the relationship:
IBIAS = (VCC - .7) / (Rext + 50).
The actual IBIAS level is determined by selecting the
desired performance and power level. The charts listed
in the Application Information section enable the user
to quickly determine the appropriate bias level.
Thermal Monitor
The Edge692 includes an on-chip thermal monitor
accessible through the THERMAL DIODE pin. This node
connects to 5 diodes in series to VEE (see Figure 2) and
may be used to accurately measure the junction
temperature at any time.
Thermal Diode
Slew Rate Adjustment
The driver rising and falling slew rates are adjustable
from 2 V/ns to 1 V/ns. The actual slew rate realized is a
function of the chip bias and slew rate adjust input
currents.
The SLEWADJ input is determined by selecting the
desired performance and power level (after the BIAS
current is first chosen.) The charts listed in the
Application Information section enable the user to quickly
determine the appropriate SLEWADJ level.
SLEWADJ is a current controlled input that varies the
rising and falling edge slew rates. Ideally, a current DAC
would be used to establish this current. However, a
resistor to a positive voltage, typically VCC, is acceptable.
Figure 3 shows a simplified schematic of the SLEWADJ
input stage. Once a desired input current is selected,
the external resistor value is determined by the following
relationship:
Bias Current
(VCC - .7) / (Rext + 860) = Islewadj.
VCC
Temperature coefficient = –10 mV/ C
˚
REXT
SLEWADJ
VEE
1.72K
1.72K
Figure 2. Thermal Diode String
A bias current of 100 µA is injected into this node, and
the measured voltage corresponds to a specific junction
temperature with the following equation:
Iradj
Ifadj
Figure 3. SLEWADJ input circuitry
TJ(˚C) = {[(VTHERMAL DIODE – VEE) / 5] – .7} / (–.00208).
Notice that the driver A slew rate and driver B slew rate
are independent. However, the rising and falling edge
slew rates on each driver track each other and are not
independent.
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Application Information
Family of Curves for Rise and Fall Times for 800 mV Swings.
Rise Times for 800 mV Swings
Rise Time (ns)
0.75
0.7
Ibias = 1.0 mA
0.65
Ibias = 1.25 mA
0.6
0.55
Ibias = 1.5 mA
0.5
Ibias = 1.75 mA
0.45
0.4
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
Fall Times for 800 mV Swings
0.85
Fall Time (ns)
0.8
Ibias = 1.0 mA
0.75
Ibias = 1.25 mA
0.7
0.65
Ibias = 1.5 mA
0.6
Ibias = 1.75 mA
0.55
0.5
Ibias = 2.0 mA
0.45
1
1.4
1.8
2.2
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Family of Curves for Rise and Fall Times for 3V Swings.
Rise Times for 3V Swings
Rise Time (ns)
3.5
3
Ibias = 1.0 mA
2.5
Ibias = 1.25 mA
2
Ibias = 1.5 mA
1.5
Ibias = 1.75 mA
1
Ibias = 2.0 mA
1
1.4
1.8
2.2
Slewadj (mA)
Fall Times for 3V Swings
Fall Time (ns)
3.5
3
Ibias = 1.0 mA
2.5
Ibias = 1.25 mA
2
Ibias = 1.5 mA
1.5
Ibias = 1.75 mA
1
Ibias = 2.0 mA
1
1.4
1.8
2.2
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Family of Curves for Rise and Fall Times for 5V Swings.
Rise Times for 5V Swings
5.5
Rise Time (ns)
5
Ibias = 1.0 mA
4.5
Ibias = 1.25
mA
4
3.5
Ibias = 1.5 mA
3
Ibias = 1.75
mA
2.5
2
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
Fall Times for 5V Swings
5.5
Ibias = 1.0 mA
Fall Time (ns)
5
4.5
Ibias = 1.25 mA
4
Ibias = 1.5 mA
3.5
Ibias = 1.75 mA
3
Ibias = 2.0 mA
2.5
2
1
1.4
1.8
2.2
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Supply Current Family of Curves
Negative Supply Current
Iee (mA)
160.00
140.00
Ibias = 1.0 mA
120.00
Ibias = 1.25 mA
100.00
Ibias = 1.5 mA
80.00
Ibias = 1.75 mA
60.00
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
Positive Supply Current
Icc (mA)
160.00
140.00
Ibias = 1.0 mA
120.00
Ibias = 1.25 mA
100.00
Ibias = 1.5 mA
80.00
Ibias = 1.75 mA
60.00
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Power Dissipation Family of Curves
Conditions:
VCC = +11.5V
VEE = –7.5V
Ta = 40˚C
θJA = 26˚C
Quiescent Power Consumption
Pd (Watts)
3.00
Ibias = 1.0 mA
2.50
Ibias = 1.25 mA
2.00
Ibias = 1.5 mA
1.50
Ibias = 1.75 mA
1.00
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
Junction Temperature
120.00
Ibias = 1.0 mA
Tj (°C)
110.00
100.00
Ibias = 1.25 mA
90.00
Ibias = 1.5 mA
80.00
70.00
Ibias = 1.75 mA
60.00
1
1.4
1.8
2.2
Ibias = 2.0 mA
Slewadj (mA)
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EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Thermal Information
Parameter
Symbol
Min
Typ
Max
Units
Thermal Resistance
Junction to Case
θJC
13
oC/W
Junction to Air
Still Air
50 LFPM
400 LFPM
θJA
θJA
θJA
49
36
26
oC/W
oC/W
oC/W
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EDGE HIGH-PERFORMANCE PRODUCTS
Package Information
28 Pin PLCC Package
θJA = 75 to 80˚C / W
PIN Descriptions
Pin #1
Pin #1
Pin #1 Ident
0.045 x 45o
[1.143]
0.485 – 0.495
[12.32 – 12.57]
SQ
0.300 REF
[7.62]
0.450 – 0.456
[11.43 – 11.58]
SQ
0.050
[1.27]
TYP
.045 x 45
[1.14]
o
0.165 – 0.180
[4.19 – 4.57]
0.390 – 0430
[9.91 – 10.92]
0.026 – 0.032
[0.661 – 0.812]
0.026 – 0.032
[0.661 – 0.812]
0.090 – 0.120
[2.29 – 3.04]
Notes: (unless otherwise specified)
1. Dimensions are in inches [millimeters].
2. Tolerances are: .XXX ± 0.005 [0.127].
3. PLCC packages are intended for surface mounting on solder lands on 0.050 [1.27] centers.
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Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Units
Positive Power Supply
VCC
8.5
11.5
13.5
V
Negative Power Supply
VE E
-8.5
-7.5
-4.2
V
Total Analog Supply
VCC - VEE
12.7
19.0
V
Analog Inputs
Driver High Level
Driver Low Level
Driver Bias
Driver A Slew Rate Adjust
Driver B Slew Rate Adjust
DVH
DVL
BIAS
SLEWADJA
SLEWADJB
VEE + 3.5
VEE + 2.9
1.0
1.0
1.0
VCC - 2.9
VCC - 3.5
2.0
2.2
2.2
V
V
mA
mA
mA
Ambient Operating Temperature
TA
+25
+70
oC
Junction Temperature
TJ
+25
+125
oC
1.5
1.75
1.75
Absolute Maximum Ratings
Parameter
Symbol
Min
VCC (Relative to GND)
VCC
VEE (Relative to GND
VEE
Total Power Supply
Max
Units
0
+14.0
V
-10.0
0
V
+20.0
V
VCC - VEE
Typ
Digital Input Voltages
DRVEN, DRVEN*
DHI, DHI*
VEE
+6.0
V
Differential Input Voltages
DRVEN - DRVEN*
DHI - DHI*
-5.0
+5.0
V
Analog Voltages
DOUT, DVL, DVH
VEE
VCC
V
BIAS
SLEWADJA
SLEWADJB
0
0
0
2.6
2.8
2.8
mA
mA
mA
Ambient Operating Temperature
TA
-55
+125
oC
Storage Temperature
TS
-65
+150
oC
Junction Temperature
TJ
+150
oC
TSOL
260
oC
Analog Input Currents
Driver Bias
Slew Rate Adjust
Soldering Temperature
(5 seconds, 1/4" from pin)
Thermal equilibrium is established by applying power for at least 2 minutes while maintaining a transverse
air flow of 400 linear feet per minute over the device mounted either in the test socket or on the printed
circuit board. Thermal resistance measurements are taken with device soldered to PCB.
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DC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
IIN
BIAS
-200
1.0
1.5
+200
2.0
µA
mA
1.0
1.75
2.2
mA
Driver Circuit
Analog Input Current
DVH, DVL
Bias Input
Adjustment Inputs
SLEWADJ Current Range
Driver Circuit
Output Voltage Range
Output Voltage Swing
Max Static Output Current:
DOUT > -2V
DOUT < -2V
Max Dynamic Output Current
DOUT Leakage Current (Note 1)
VDOUT
Vswing
VEE + 3.5
0
VCC - 3.5
9.0
V
V
IDOUT
IDOUT
ILEAK
-35
-20
-100
-1
<.025
+35
+20
+100
1
mA
mA
mA
µA
DC Accuracy
Driver High
Offset (Note 2)
Gain (Note 3)
Linearity (Note 4)
DVH - DOUT
∆DVH / ∆DOUT
DVL - DOUT
-150
.95
-20
.99
<10
350
1.0
20
mV
V/V
mV
Driver Low
Offset (Note 2)
Gain (Note 3)
Linearity (Note 4)
DVH - DOUT
∆DVH / ∆DOUT
DVL - DOUT
-150
.95
-20
.99
<10
350
1.0
20
mV
V/V
mV
Offset Voltage Temperature
Coefficient
DOUT TC
Driver Output Impedance
ZOUT
1.0
Driver PSRR
PSRR
30
Digital Inputs
DRVEN, DRVEN*, DHI, DHI*
Input Current
Input Voltage Range
Differential Input Swing
IIN
VRNG
VDIFF
-900
-2.0
0.25
ICC
IEE
-150
Power Supply Current
Positive Supply
Negative Supply
Note 1:
Note 2:
Note 3:
Note 4:
mV/oC
±1
3.0
4.5
Ω
dB
120
120
+900
+5.5
+4.0
µA
V
V
150
mA
mA
Device output leakage is specified with DOUT over the entire output voltage range.
The offset voltage is defined as the difference between the measured driver output at DOUT under no
load conditions versus the programmed voltage (DVH or DVL) when forced to –1.0 V.
The driver gain is defined as the change in driver output voltage (DOUT) divided by the change in
programmed input voltage (DVH or DVL). Measurements are taken at –1.0 V and +4.0 V programmed
inputs with the output under no-load conditions.
Linearity error is defined as the maximum deviation between the theoretical driver output voltage
(predicted by the straight line determined by the offset and gain) and the actual measured output
voltage under no load conditions.
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AC Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Driver Circuit
Tpd from DHI to DOUT (Note 1)
1.7
ns
Tpd from DRVEN to DOUT HiZ (Note 2)
1.7
ns
Tpd from DRVEN to DOUT Active (Note 2)
1.7
ns
DOUT Rise/Fall Times (Note 3)
800 mV, 20% - 80%
3V, 10% - 90%
5V, 10% - 90%
Tpd
Tr/Tf
Tr/Tf
Tr/Tf
Toggle Rate
800 mV
3V
5V
Fmax
Output Capacitance in HiZ
Cout
Minimum Pulse Width (Note 4)
800 mV
3V
5V
.5
1.25
2.25
0.6
1.6
2.75
200
150
100
ns
ns
ns
MHz
MHz
MHz
2.0
2.5
3.0
5.0
.75
3.0
5.0
pF
ns
ns
ns
The specified limits shown can be met only after thermal equilibrium has been established. Thermal
equilibrium is established by applying power for at least two minutes while maintaining the normal operating
environment.
Note 1:
Note 2:
Note 3:
Note 4:
Tpd is measured from crossover point of DHI and DHI* to the 50% point in the output. DVL
equals 0 V and DVH equals +3 V.
Specification condition: DVL equals -1 V and DVH equals +1 V. Output is terminated to GND by
100 Ω. Tpd is measured from the crossover point of DRVEN and DRVEN* to the point where a
10-percent change in output voltage occurs.
The driver load is an 18" 50Ω. transmission line terminated with 1KΩ. in parallel with 2 pF.
The output pulse width is measured at the 50-percent points. Output reaches 100% of programmed
value.
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EDGE HIGH-PERFORMANCE PRODUCTS
Ordering Information
Model Number
Package
Ambient Temperature
Range
E692AHJ
28-Pin PLCC
(with Internal Heat Spreader)
+25oC to +70oC
EVM692AHJ
Edge692 Evaluation Module
Contact Information
Semtech Corporation
Edge High-Performance Division
10021 Willow Creek Rd., San Diego, CA 92131
Phone: (858)695-1808 FAX (858)695-2633
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