www.fairchildsemi.com KM4111/KM4121 0.2mA, Low Cost, +2.7V & +5V, 35MHz Rail-to-Rail Amplifiers ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ General Description 208µA supply current 35MHz bandwidth Power down to Is = 35µA (KM4121) Fully specified at +2.7V and +5V supplies Output voltage range: 0.08V to 4.88V; Vs = +5 Input voltage range: -0.3V to +3.8V; Vs = +5 27V/µs slew rate ±8.5mA linear output current ±13mA short circuit output current 21nV/√Hz input voltage noise Directly replaces MAX4281 Small package options (SOT23-5 and SOT23-6) Applications ■ ■ ■ ■ ■ Portable/battery-powered applications A/D buffer Active filters Signal conditioning Portable test instruments KM4111/KM4121 Packages SOT23-5 (KM4111) 1 -Vs 2 5 + Out +Vs - The KM4111 (single) and KM4121 (single with disable) are ultra-low power, low cost, voltage feedback amplifiers. These amplifiers use only 208µA of supply current and are designed to operate on +2.7V, +5V, or ±2.5V supplies. The input voltage range extends 300mV below the negative rail and 1.2V below the positive rail. The KM4111 offers high bipolar performance at a low CMOS price. The KM4111 offers superior dynamic performance with a 35MHz small signal bandwidth and 27V/µs slew rate. The combination of lowpower, high bandwidth, and rail-to-rail performance make the KM4111 well suited for battery-powered communication/computing systems. Non-Inverting Freq. Response Vs = +5V Normalized Magnitude (2dB/div) Features G=2 0.1 1 10 100 Frequency (MHz) +In 4 3 -In SOT23-6 (KM4121) 1 -Vs 2 +In 3 + Out - 6 +Vs 5 DIS 4 -In REV. 1B June 2001 DATA SHEET KM4111/KM4121 KM4111/KM4121 Electrical Characteristics (Vs = +2.7V, G = 2, RL = 2kΩ to Vs/2, Rf = 2.5kΩ; unless noted) PARAMETERS CONDITIONS Case Temperature Frequency Domain Response -3dB bandwidth TYP MIN & MAX +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = -1, Vo = 2Vpp 28 15 7 16 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 1V step 2V step, G = -1 2V step, G = -1 16 140 1 20 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise 1Vpp, 100kHz 1Vpp, 100kHz 1Vpp, 100kHz >10kHz 85 63 62 23 dBc dBc dB nV/√Hz full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current Disable Characteristics turn on time turn off time off isolation quiescent current Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range DC 1MHz DC, Vcm = 0V to Vs - 1.5 RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 0.8 11 0.37 1 8 60 65 185 ±5 mV µV/°C µA nA/°C nA dB dB µA 1.3 130 56 56 245 1 3.5 74 13 µs µs dB µA >10 1.4 -0.3 to 1.5 92 MΩ pF V dB 0.06 to 2.62 0.08 to 2.6 ±8 ±12.5 2.7 65 0.2 to 2.4 2.5 to 5.5 V V mA mA V 2 2 2 2 2 2 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) For G = +1, Rf = 0. 2) 100% tested at +25°C. Absolute Maximum Ratings supply voltage 0 to +6V maximum junction temperature +175°C storage temperature range -65°C to +150°C lead temperature (10 sec) +260°C operating temperature range (recommended) -40°C to +85°C input voltage range +Vs +0.5V; -Vs -0.5V internal power dissipation see power derating curves 2 Package Thermal Resistance Package θJA 5 lead SOT23 6 lead SOT23 256°C/W 230°C/W REV. 1B June 2001 KM4111/KM4121 DATA SHEET KM4111/KM4121 Electrical Characteristics (Vs = +5V, G = 2, RL = 2kΩ to Vs/2, Rf = 2.5kΩ; unless noted) PARAMETERS CONDITIONS Case Temperature Frequency Domain Response -3dB bandwidth TYP MIN & MAX +25°C +25°C UNITS NOTES 1 G = +1, Vo = 0.05Vpp G = +2, Vo < 0.2Vpp G = -1, Vo = 2Vpp 35 18 8 20 MHz MHz MHz MHz Time Domain Response rise and fall time settling time to 0.1% overshoot slew rate 0.2V step 2V step 2V step, G = -1 2V step, G = -1 13 140 1 27 ns ns % V/µs Distortion and Noise Response 2nd harmonic distortion 3rd harmonic distortion THD input voltage noise 2Vpp, 100kHz 2Vpp, 100kHz 2Vpp, 100kHz >10kHz 78 66 65 21 dBc dBc dB nV/√Hz full power bandwidth gain bandwidth product DC Performance input offset voltage average drift input bias current average drift input offset current power supply rejection ratio open loop gain quiescent current Disable Characteristics turn on time turn off time off isolation quiescent current Input Characteristics input resistance input capacitance input common mode voltage range common mode rejection ratio Output Characteristics output voltage swing linear output current short circuit output current power supply operating range DC 1MHz DC, Vcm = 0V to Vs - 1.5 RL = 10kΩ to Vs/2 RL = 2kΩ to Vs/2 -1.5 20 0.37 1 7 60 62 208 ±5 1.3 130 56 56 260 mV µV/°C µA nA/°C nA dB dB µA 0.7 4.5 72 35 µs µs dB µA >10 1.2 -0.3 to 3.8 95 MΩ pF V dB 0.08 to 4.88 0.1 to 4.8 ±8.5 ±13 5 65 0.2 to 4.7 2.5 to 5.5 V V mA mA V 2 2 2 2 2 2 2 2 Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are determined from tested parameters. NOTES: 1) For G = +1, Rf = 0. 2) 100% tested at +25°C. REV. 1B June 2001 3 DATA SHEET KM4111/KM4121 KM4111/KM4121 Performance Characteristics (Vs = +5V, G = 2, RL = 2kΩ to Vs/2, Rf = 2.5kΩ; unless noted) G=2 Inverting Frequency Response Vs = +5V Normalized Magnitude (1dB/div) Normalized Magnitude (2dB/div) Non-Inverting Frequency Response Vs = +5V G=1 Rf = 0 G = 10 G=5 0.1 1 10 G = -1 G = -2 G = -10 G = -5 0.1 100 1 10 100 Non-Inverting Freq. Response Vs = +2.7V Inverting Frequency Response Vs = +2.7V Normalized Magnitude (1dB/div) Frequency (MHz) Normalized Magnitude (2dB/div) Frequency (MHz) G=1 Rf = 0 G=2 G = 10 G=5 0.1 1 10 G = -1 G = -2 G = -10 G = -5 0.1 100 1 10 100 Frequency (MHz) Frequency (MHz) Large Signal Frequency Response Open Loop Gain & Phase vs. Frequency 40 100 Open Loop Gain (dB) Vo = 1Vpp Vo = 2Vpp 80 0 60 -40 40 -80 20 -120 -160 0 Open Loop Phase (deg) Magnitude (1dB/div) |Gain| Phase -200 -20 0.1 1 10 10 100 100 Frequency (MHz) 1k 10k 100k 1M 10M Frequency (Hz) Input Voltage Noise 2nd & 3rd Harmonic Distortion; Vs = +5V -40 100 -50 80 Distortion (dBc) Voltage Noise (nV/√Hz) Vo = 2Vpp 60 40 20 -70 -80 2nd -90 0 -100 100 1k 10k Frequency (Hz) 4 3rd -60 100k 1M 10 100 1000 Frequency (kHz) REV. 1B June 2001 KM4111/KM4121 DATA SHEET KM4111/KM4121 Performance Characteristics (Vs = +5V, G = 2, RL = 2kΩ to Vs/2, Rf = 2.5kΩ; unless noted) 2nd & 3rd Harmonic Distortion; Vs = +2.7V PSRR 10 -40 Vo = 1Vpp 0 -10 3rd -60 PSRR (dB) Distortion (dBc) -50 -70 -80 -20 -30 -40 -50 2nd -90 -60 -100 -70 10 100 100 1000 Frequency (kHz) 10k 100k 1M 10M Frequency (Hz) Output Swing vs. RL CMRR 4.85 -20 -30 Output Swing (Vpp) 4.80 -40 CMRR (dB) 1k 4.75 -50 -60 4.70 -70 4.65 -80 4.60 -90 4.55 -100 10 100 1k 10k 100k 1M 1 10M 10 100 RL (kΩ) Small Signal Pulse Response Vs = +5V Large Signal Pulse Response Vs = +5V Output Voltage (0.5V/div) Output Voltage (0.05V/div) Frequency (Hz) Time (1µs/div) Time (1µs/div) Output Voltage (0.1V/div) Enable Disable Response Vs = +5V 5V Disable Pulse 0V Time (1µs/div) REV. 1B June 2001 5 DATA SHEET KM4111/KM4121 General Description The KM4111 is a single supply, general purpose, voltagefeedback amplifier fabricated on a complementary bipolar process. The KM4111 offers 35MHz unity gain bandwidth, 27V/µs slew rate, and only 208µA supply current. It features a rail-to-rail output stage and is unity gain stable. The KM4111 is short circuit protected. However, this may not guarantee that the maximum junction temperature (+150°C) is not exceeded under all conditions. Follow the maximum power derating curves shown in Figure 2 to ensure proper operation. The typical circuit schematic is shown in Figure 1. +Vs 6.8µF + In + 0.01µF Out KM4111 Rg Figure 1: Typical Configuration Enable/Disable Function (KM4121) The KM4121 offers an active-low disable pin that can be used to lower its supply current. Leave the pin floating to enable the part. Pull the disable pin to the negative supply (which is ground in a single supply application) to disable the output. During the disable condition, the nominal supply current will drop to below 40µA and the output will be at high impedance with about 2pF capacitance. 1.5 1.0 0.5 SOT23-6 lead SOT23-5 lead 0 -50 -30 -10 10 30 50 70 90 Ambient Temperature ( C) Figure 2: Power Derating Curves Overdrive Recovery For an amplifier, an overdrive condition occurs when the output and/or input ranges are exceeded. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The KM4111 will typically recover in less than 20ns from an overdrive condition. Figure 3 shows the KM4111 in an overdriven condition. Input Input Voltage (0.2V/div) Rf 2.0 Output Voltage (0.5V/div) The design uses a Darlington output stage. The output stage is short circuit protected and offers “soft” saturation protection that improves recovery time. Maximum Power Dissipation (W) Maximum Power Dissipation The design utilizes a patent pending topology that provides increased slew rate performance. The common mode input range extends to 300mV below ground and to 1.2V below Vs. Exceeding these values will not cause phase reversal. However, if the input voltage exceeds the rails by more than 0.5V, the input ESD devices will begin to conduct. The output will stay at the rail during this overdrive condition. Output Time (1µs/div) Figure 3: Overdrive Recovery Driving Capacitive Loads A small series resistance (Rs) at the output of the amplifier, illustrated in Figure 4, will improve stability and settling performance. Power Dissipation The maximum internal power dissipation allowed is directly related to the maximum junction temperature. If the maximum junction temperature exceeds 150°C, some reliability degradation will occur. If the maximum junction temperature exceeds 175°C for an extended time, device failure may occur. 6 REV. 1B June 2001 KM4111/KM4121 DATA SHEET + Evaluation board schematics and layouts are shown in Figure 5 and Figure 6. Rs Rf CL RL Rg Figure 4: Typical Topology for driving a capacitive load The KEB002 evaluation board is built for dual supply operation. Follow these steps to use the board in a single supply application: 1. Short -Vs to ground 2. Use C3 and C4, if the -Vs pin of the KM4111 or KM4121 is not directly connected to the ground plane. Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Fairchild has evaluation boards to use as a guide for high frequency layout and to aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8µF and 0.01µF ceramic capacitors Place the 6.8µF capacitor within 0.75 inches of the power pin ■ Place the 0.01µF capacitor within 0.1 inches of the power pin ■ Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance ■ Minimize all trace lengths to reduce series inductances ■ ■ Refer to the evaluation board layouts shown in Figure 6 for more information. Evaluation Board Information The following evaluation boards are available to aid in the testing and layout of this device: Eval Board KEB002 Description Figure 5: Evaluation Board Schematic Products Single Channel, KM4111IT5, Dual Supply 5 & 6 lead SOT23 KM4121IT6 REV. 1B June 2001 7 DATA SHEET KM4111/KM4121 KM4111/KM4121 Evaluation Board Layout Figure 6a: KEB002 (top side) 8 Figure 6b: KEB002 (bottom side) REV. 1B June 2001 KM4111/KM4121 DATA SHEET b CL DATUM ’A’ KM4111/KM4121 Package Dimensions e 2 SOT23-5 CL CL E E1 α e1 C D CL 1. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM ’A’ and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 0003 REV A supercedes SOT-D-2005 REV C. A1 CL MAX 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 0.95 ref 1.90 ref 0 10 NOTE: A2 b MIN 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 DATUM ’A’ A SYMBOL A A1 A2 b C D E E1 L e e1 α e 2 SOT23-6 CL CL E α e1 C D CL A REV. 1B June 2001 A2 E1 SYMBOL A A1 A2 b C D E E1 L e e1 α MIN 0.90 0.00 0.90 0.25 0.09 2.80 2.60 1.50 0.35 MAX 1.45 0.15 1.30 0.50 0.20 3.10 3.00 1.75 0.55 0.95 ref 1.90 ref 0 10 NOTE: A1 1. All dimensions are in millimeters. 2 Foot length measured reference to flat foot surface parallel to DATUM ’A’ and lead surface. 3. Package outline exclusive of mold flash & metal burr. 4. Package outline inclusive of solder plating. 5. Comply to EIAJ SC74A. 6. Package ST 0004 REV A supercedes SOT-D-2006 REV C. 9 DATA SHEET KM4111/KM4121 Ordering Information Model Part Number Package Container Pack Qty KM4111 KM4111IT5 SOT23-5 Partial Reel <3000 KM4111 KM4111IT5TR3 SOT23-5 3000 KM4121 KM4121IT6 SOT23-6 Partial Reel <3000 KM4121 KM4121IT6TR3 SOT23-6 3000 Reel Reel Temperature range for all parts: -40°C to +85°C DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICES TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. www.fairchildsemi.com 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. © 2001 Fairchild Semiconductor Corporation