FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Features Description ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The FAN5631/FAN5632 is an advanced, third-generation switched capacitor step-down DC/DC converter utilizing Fairchild's proprietary ScalarPump™ technology. This innovative architecture utilizes scalar switch re-configuration and fractional switching techniques to produce low output ripple, lower ESR spikes, and improve efficiency over a wide load range. 90% Peak Efficiency Low EMI Low Ripple Selectable Output Voltage 1.2V/1.5V for FAN5631 Efficiency Optimizer Feature for FAN5632 Input Voltage Range: 2.2V to 5.5V Output Current: Up to 250mA ±5% Output Voltage Accuracy 30µA Operating Current ICC < 1µA in Shutdown Mode 1.7MHz Operating Frequency Shutdown Isolates Output from Input Soft-Start Limits In-Rush Current Short Circuit and Over Temperature Protection Minimum External Component Count Available in a 3x3mm 10-Lead MLP Package The FAN5631/FAN5632 produces a fixed regulated output voltage from an input voltage of 2.2V to 5V. Customized output voltages are available in 100mV increments from 1V to 1.8V. Contact a Fairchild sales representative for customized output voltage options. In order to maximize efficiency, the FAN5631/5632 achieves regulation by skipping pulses. Depending upon load current, the size of the switches are scaled dynamically; consequently, current spikes and EMI are minimized. An internal soft-start circuitry prevents excessive current drawn from the supply. The device is internally protected against short circuit and over temperature conditions. The FAN5631 has a dual output voltage feature. When VSEL is high, VOUT is 1.5V and when VSEL is low, VOUT is 1.2V. Other output voltage options are available upon request. Applications ■ ■ ■ ■ ■ ■ ■ Cell Phones Handheld Computers Portable Electronic Equipment Core Supply to Next Generation Processors Low Voltage DC Bus Digital Cameras DSP Supplies In addition, the FAN5632 has an efficiency optimizer feature that, when enabled, changes the switch mode configuration from 2:1 to 1:1 at the lower threshold of VIN. The efficiency is then maintained at its peak level over a wider range of input voltages. In addition, VOUT will vary between 1.2V to 1.5V as a result of this efficiency optimization. If the efficiency optimizer is not enabled, VOUT is regulated to 1.5V. Both the FAN5631 and FAN5632 are available in a 3x3mm 10-lead MLP package. Ordering Information Product Number Package Type Order Code FAN5631 3x3mm 10-Lead MLP FAN5631MPX FAN5632 3x3mm 10-Lead MLP FAN5632MPX ©2006 Fairchild Semiconductor Corporation FAN5631/FAN5632 Rev. 1.0.2 1 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter February 2006 4 7 NC 5 6 1:1 Mode 50 40 VOUT = 1.2V to 1.5V COUT 10µF 5.13 NC 60 4.86 GND CB- 8 VIN = 2.7V to 5.5V 4.59 CB+ 3 CIN 10µF 4.32 OFF NC 4.05 9 3.78 2 3.51 EN FAN5631 FAN5632 with optimization 70 3.24 10 2.97 1 80 2.7 ON VSEL Efficiency % 90 2:1 Mode Input Voltage (V) Average Efficiency (over VIN = 2.7V to 5V) = 66%, With optimization = 77% Average Efficiency (over VIN = 2.7V to 4.2V) = 67%, With optimization = 84% Figure 1. Typical Application Figure 2. Typical Efficiency Graph Pin Assignment Top View VSEL 1 10 NC EN 2 9 VIN CB+ 3 8 NC GND 4 7 NC CB- 5 6 VOUT 3x3mm 10-Lead MLP Figure 3. Pin Assignment Pin Description Pin No. Pin Name Pin Description 1 VSEL 2 EN Enable Input Pin. If a logic high is applied to the EN pin, the device is enabled. However, if a logic low is applied, the device is disabled and the supply current is reduced to less than 1µA. The EN pin can not be left floating and must be connected to either a logic high or logic low level. 3 CB + Bucket Capacitor Positive Pin. 4 GND Ground Pin. This pin is connected to the internal MOSFET switches. This pin must be externally connected to GND. Output Voltage Select Logic Input Pin. The VSEL pin can not be left floating and must be connected to either a logic high or logic low level. FAN5631: If a logic low is applied to the VSEL pin then VOUT is 1.2V. If a logic high is applied then VOUT is 1.5V. FAN5632: If a logic low is applied to the VSEL pin, the efficiency optimization mode is enabled, and the output voltage accuracy is relaxed in order to meet optimum efficiency. However, if a logic high is applied, the device will operate like a typical charge pump converter. 5 CB - 6 VOUT 7 NC Not Connected. This pin is not internally connected. 8 NC Not Connected. This pin is not internally connected. 9 VIN Supply Voltage Input. 10 NC Not Connected. This pin is not internally connected. Bucket Capacitor Negative Pin. Output Voltage Pin. 2 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Typical Application Parameter Min Max Unit VIN to GND -0.3 6 V All other pins to GND -0.3 VIN + 0.3V V Load Current Thermal Resistance-Junction to Tab (θJC), 3mmx3mm 10-lead MLP (Note 2) Lead Soldering Temperature (10 seconds) Storage Temperature Junction Temperature Electrostatic Discharge (ESD) Protection Level (Note 3) 0.5 A 8 °C/W 260 °C -65 150 °C -40 150 HBM 2.5 CDM 2 Min Typ °C kV Recommended Operating Conditions Parameter Supply Voltage Range 2.2 Output Current (VIN > 2.7V) Operating Ambient Temperature Range -40 25 Max Unit 5.5 V 250 mA +85 °C Notes: 1. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to AGND. 2. Junction to ambient thermal resistance, θJA, is a strong function of PCB material, board thickness, thickness and number of copper planes, number of via used, diameter of via used, available copper surface, and attached heat sink characteristics. The estimated value for zero air flow at 0.5W is 60°C/W. 3. Using Mil Std. 883E, method 3015.7(Human Body Model) and EIA/JESD22C101-A (Charge Device Model). 3 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Absolute Maximum Ratings (Note1) VIN = 2.2V to 5.5V, IOUT = 1mA, CIN = 10µF, COUT = 10µF, CB = 1µF, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C. Parameter Conditions Min. Input Under-Voltage Lockout Typ. Max. Units 60 µA 2 No Load Supply Current No switching Output Voltage FAN5631, SEL to HIGH 1.5 FAN5631, SEL to LOW 1.2 FAN5632, SEL to HIGH 1.5 FAN5632, SEL to LOW Variable between 1.5 and 1.2 Output Voltage Accuracy 1mA ≤ IOUT ≤ 150mA, VIN = 2.7V to 5.5V Load Regulation 0mA ≤ IOUT ≤ 150mA, VIN = 3.6V Line Regulation Shutdown Supply Current Output Short Circuit Current (Note 4) VOUT ≤ 150mV -5 V V +5 % 0.25 1 mV/mA IOUT = 0.1mA 0.2 4 mV/V VEN = 0V 0.1 1 µA Peak Efficiency VIN at Configuration Change VIN decreasing Oscillator Frequency VIN = 3.6V, IOUT = 150mA 25 mA 90 % 2.22 x VOUT V 1.7 MHz Thermal Shutdown Threshold 150 °C Thermal Shutdown Threshold Hysteresis 15 °C Enable Logic Input High Voltage, VIH 1.3 V Enable Logic Input Low Voltage, VIL Enable Logic Input Current -1 VSEL Logic Input High Voltage, VIH 1.3 -1 VOUT Turn On Time V 1 µA V VSEL Logic Input Low Voltage, VIL VSEL Logic Input Current 0.4 1.6 0.4 V 1 µA mS Notes: 4. The short circuit protection is designed to protect against pre-existing short circuit conditions, i.e. assembly shorts that exist prior to device power-up. The short circuit current limit is 25mAAverage. Short circuit currents in normal operation are inherently limited by the ON-resistance of the internal FET. Since this resistance is in the range of 1Ω, in some cases thermal shutdown may occur. However, immediately following the first thermal shutdown event, the short circuit condition will be treated as pre-existing, and the load current will reduce to 25mAAverage. 4 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Electrical Characteristics TA = 25°C, VOUT = 1.5V, VIN = 3.6V, CIN = 10µF, COUT = 10µF, CB = 1µF, unless otherwise noted. Efficiency vs. Load Current Efficiency vs. Input Voltage 90 90 V SEL = HIGH 80 V OUT = 1.5V ILOAD = 150mA Efficiency (%) 75 85 Power Efficiency (%) 85 70 65 60 55 50 45 40 VIN = 3.3V 80 VSEL = HIGH 75 70 VIN = 4.2V 65 60 55 VIN = 2.7V 50 45 35 30 2 2.5 3 3.5 4 4.5 5 40 5.5 1 10 FAN5632 Efficiency Optimizer Efficiency and Output Voltage vs. Input Voltage Line Regulation 1.60 ILOAD = 100mA, VSEL = LOW 70 60 1.5 50 1.4 1.3 1.2 Output Voltage (V) ILoad = 50mA 80 Output Voltage (V) Efficiency (%) 100 90 100 Load Current (mA) Input Voltage (V) 1.55 TA = 25°C 1.50 TA = 85°C TA = -40°C 1.45 1.40 2.5 3 3.5 4 4.5 5 5.5 2.5 3.0 Input Voltage (V) Load Regulation 5.0 5.5 VIN = 3.6V ILOAD = 1mA 5.5V 3.2V 2.7V Output Voltage (V) Load Regulation (mV/mA) 4.5 Thermal Regulation 3.6V -0.5 2.2V -1 -1.5 -2 4.0 1.54 0.5 0 3.5 Input Voltage(V) 0 20 40 60 80 100 120 140 160 1.52 1.51 1.50 -50 180 Load Current (mA) -25 0 25 50 75 100 125 150 Ambient Temperature (°C) 5 FAN5631/FAN5632 Rev. 1.0.2 1.53 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Typical Performance Characteristics TA = 25°C, VOUT = 1.5V, VIN = 3.6V, CIN = 10µF, COUT = 10µF, CB = 1µF, unless otherwise noted. Start Up Dynamic VOUT Change (FAN5631) ILOAD = 150mA VEN High VSEL Low Low VOUT 1.5V VOUT 1.2V 75mA 1.2V IIN 0mA (20µs/div) Voltage Ripple Output Voltage Ripple Spectrum VIN = 3.6V ILOAD = 150mA VOUT VIN 6 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Typical Performance Characteristics FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Block Diagram VIN 0.25SW1 0.25SW1 0.5SW1 OSCILLATOR (2MHz) IN VOLTAGE REF. OUT SOFT START Vref. RAMP Vref. RAMP FB OUTPUT 150mV C+ - CONFIGURATION 0.25SW2 0.25SW2 0.5SW2 + - PULSE_SKIP D R I V E R S CONTROL LOGIC + - SHORT_CKT. 0.25SW3 0.25SW3 0.5SW3 VOUT C- + 0.25SW4 0.25SW4 0.5SW4 0.5* INPUT 1V - UVLO SHUTDOWN + THERMAL SHUTDOWN FB GND. ENABLE Figure 4. Block Diagram Detailed Description switch 4 is always ON. At the 1.6V output setting the configuration changes from 2:1 to 1:1 at VIN = 3.56V. At the 1.3V output setting the change occurs at VIN = 3.06V. The FAN5631/FAN5632 switched capacitor DC/DC converter automatically configures switches to achieve high efficiency and provides a regulated output voltage by means of the Pulse Frequency Modulation (PFM) pulse-skipping mode. An internal soft-start circuit prevents excessive in-rush current drawn from the supply. The switches are split into three segments. Based on the values of VIN, VOUT and IOUT, an internal circuitry determines the number of segments to be used to reduce current spikes. Pulse-Skipping PFM and Fractional Switch Operation When the regulated output voltage reaches its upper limit, the switches are turned off and the output voltage reaches its lower limit. Considering a step-down 2:1 mode of operation, 1.6V output as an example, when the output reaches about 1.62V (upper limit), the control logic turns off all switches. Switching stops completely. This is pulse-skipping mode. Since the supply is isolated from the output, the output voltage will drop. Once the output drops to about 1.58V (lower limit), the device will return to regular switching mode with one quarter of each switch turning on first. Another quarter of each switch will be turned on if VOUT cannot reach regulation by the time of the third charge cycle. Full switch operation occurs only during startup or under heavy load condition, when a half switch operation cannot achieve regulation within seven charge cycles. Step-Down Charge Pump Operation When VIN ≥ 2 × VOUT/0.9, a 2:1 configuration, as shown in Fig. 5, is enabled. The factor 0.9 is used instead of 1 in order to account for the effect of resistive losses across the switches and to accommodate hysteresis in the voltage detector comparator. Two phase non-overlapping clock signals are generated to drive four switches. When switches 1 and 3 are ON, switches 2 and 4 are OFF and CB is charged. When switches 2 and 4 are ON, switches 1 and 3 are OFF and charge is transferred from CB to COUT. Soft-Start When VIN < 2 × VOUT/0.9, a 1:1 configuration, as shown in Fig. 6 is enabled. In the 1:1 configuration switch 3 is always OFF and The soft-start feature limits in-rush current when the device is initially powered up and enabled. The reference voltage is used to 7 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com VIN VIN S1 S1 C+ C+ S2 S2 C B VOUT VOUT C B S3 S3 C- CC C OUT S4 GND GND This configuration shows the switches in the charging phase position. For the pumping phase, reverse all switch positions. This configuration shows the S1 and S2 swithces in phase 1 position. For phase 2, reverse the positions of the S1 and S2 switches. The S3 switch is always OFF, and the S4 switch is always ON. Figure 5. Mode 2:1 Configuration Figure 6. Mode 1:1 Configuration Applications Information control the rate of the output voltage ramp-up to its final value. Typical start-up time is 1ms. Since the rate of the output voltage ramp-up is controlled by an internally generated slow ramp, pulse-skipping occurs and in-rush current is automatically limited. The FAN5631/FAN5632 requires one ceramic bucket capacitor in the 0.1µF to 1µF range; one 10µF output bypass capacitor and one 10µF input bypass capacitor. To obtain optimum output ripple and noise performance, use of low ESR (<0.05Ω) ceramic input and output bypass capacitors is recommended. The X5Rand X7R-rated capacitors provide adequate performance over the -40°C to 85°C temperature range. Shutdown, UVLO, Short Circuit Current Limit and Thermal Shutdown The device has an active-low shutdown pin to decrease supply current to less than 1µA. In shutdown mode, the supply is disconnected from the output. UVLO triggers when supply voltage drops below 2V. When the output voltage is lower than 150mV, a short circuit protection is triggered. In this mode 15 out of 16 pulses during the switching will be skipped and the supply current is limited. Thermal shutdown triggers at 150ºC. The bucket capacitor’s value is dependent on load current requirements. A 1µF bucket capacitor will work well in all applications at all load currents, while a 0.1µF capacitor will support most applications under 100mA of load current. The choice of bucket capacitor values should be verified in the actual application at the lowest input voltage and highest load current. A 30% margin of safety is recommended in order to account for the tolerance of the bucket capacitor and the variations in the on-resistance of the internal switches. Efficiency Optimizer (FAN5632) For higher efficiency in the FAN5632, VSEL should be tied to ground to enable the efficiency optimizer feature. To achieve an optimized efficiency, the switch mode configuration transition point is shifted from a 2:1 to a 1:1 mode until the output voltage falls to 20% of its nominal value. For example, when the nominal output voltage is 1.5V, the output voltage is allowed to drop to 1.2V. This will maintain a peak efficiency of 85% for the input voltage range of 2.9V to 3.5V. For normal operation, VSEL should be tied high. One of the key benefits of the ScalarPump™ architecture is that the dynamically scaled on-resistance of the switches effectively reduces the peak current in the bucket capacitor and therefore input and output ripple currents are also reduced. Nevertheless, due to the ESR of the input and output bypass capacitors, these current spikes generate voltage spikes at the input and output pins. However, these ESR spikes can be easily filtered because their frequencies lie at up to 12 times the clock frequencies. In 8 FAN5631/FAN5632 Rev. 1.0.2 OUT S4 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Switch Configuration causing high lead inductances and resistive losses should be avoided. A carefully laid out ground plane is essential because current spikes are generated as the bucket capacitor is charged and discharged. The input and output bypass capacitors should be placed as close to the device pins as possible. PCB Layout Considerations While evaluating the FAN5631/FAN5632 (or any other switched capacitor DC-DC converter) the user should be careful to keep the power supply source impedance low; use of long wires 9 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter applications where conductive and radiated EMI/RFI interference has to be kept as low as possible, consider the use of additional input and output filtering. 3x3mm 10-Lead MLP 3.0 0.15 C 2X 6 10 A 2.25 2.20 2.00 1.55 2.00 3.10 2.33 0.78 0.55 B 3.0 0.15 C 2X 0.23 0.50 D TOP VIEW 0.25 0.02 1 5 RECOMMENDED LAND PATTERN 0.8 MAX 0.10 C (0.20) 0.08 C 0.05 0.00 C SIDE VIEW SEATING PLANE (3.00±0.10) 2.25±0.05 PIN #1 IDENT (0.38) 1 5 (3.00±0.10) 1.55±0.05 0.40±0.05 10 0.30 0.20 0.5 6 2.0 0.10 0.05 C A B C BOTTOM VIEW A. CONFORMS TO JEDEC REGISTRATION MO-229, VARIATION WEED-5 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LAND PATTERN DIMENSIONS ARE NOMINAL REFERENCE VALUES ONLY MLP10B rev A 10 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter Mechanical Dimensions The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ 2 E CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I17 11 FAN5631/FAN5632 Rev. 1.0.2 www.fairchildsemi.com FAN5631/FAN5632 Regulated Step-Down Charge Pump DC/DC Converter TRADEMARKS