74VHC16245 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS (NON INVERTED) ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.0 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY VNIH=VNIL= 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.9V (MAX.) TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74VHC16245TTR PIN CONNECTION DESCRIPTION The 74VHC16245 is an advanced high-speed CMOS 16-BIT BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. This IC is intended for two-way asynchronous communication between data busses; the direction of data transmission is determined by DIR input. The enable input G can be used to disable the device so that the busses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. All floating bus terminals during High Z State must be held HIGH or LOW. July 2003 1/10 74VHC16245 INPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No SYMBOL 1 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 38 48 4, 10, 15, 21, 28, 34, 39, 45 NAME AND FUNCTION 1DIR Directional Control 1B1 to 1B8 Data Inputs/Outputs 2B1 to 2B8 Data Inputs/Outputs 2DIR Directional Control 2G Output Enable Input 2A1 to 2A8 Data Inputs/Outputs 1A1 to 1A8 Data Inputs/Outputs 1G 7, 18, 31, 42 Output Enable Input GND Ground (0V) VCC Positive Supply Voltage TRUTH TABLE INPUTS FUNCTION G DIR L L H L H X X : Don‘t Care Z : High Impedance 2/10 A BUS B BUS OUTPUT INPUT INPUT OUTPUT Z Z OUTPUT Yn A=B B=A Z 74VHC16245 ABSOLUTE MAXIMUM RATINGS Symbol VCC VI Parameter Value Unit Supply Voltage -0.5 to +7.0 V DC Input Voltage (DIR, G) -0.5 to +7.0 V VI/O Bus I/O Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 - 20 V mA IIK DC Input Diode Current IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Lead Temperature (10 sec) ± 75 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Value Unit 2 to 5.5 V Input Voltage (DIR, G) 0 to 5.5 V VI/O Bus I/O Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 0 to 100 0 to 20 ns/V VI dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of VCC 3/10 74VHC16245 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL Ioz II ICC 4/10 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 1.5 1.5 0.7VCC 0.7VCC 0.7VCC Max. V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC 2.0 IO=-50 µA 1.9 2.0 1.9 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 2.9 4.5 IO=-50 µA 4.4 4.5 4.4 4.4 3.0 IO=-4 mA 2.58 2.48 2.4 4.5 IO=-8 mA 3.94 2.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 4.5 IO=50 µA 0.0 0.1 0.1 0.1 3.8 Unit V V 3.7 V 3.0 IO=4 mA 0.36 0.44 0.55 4.5 IO=8 mA 0.36 0.44 0.55 5.5 VI = VIH or VIL VO = VCC or GND ±0.25 ± 2.5 ± 2.5 µA 0 to 5.5 VI = 5.5V or GND ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 4 40 40 µA 74VHC16245 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol tPLH tPHL Parameter Propagation Delay Time VCC (V) CL (pF) 3.3(*) 3.3(*) (**) Output Disable Time tPLZ tPHZ Output Enable Time tOSLH tOSHL Output to Output Skew time (note 1) TA = 25°C Min. -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. 15 5.8 8.4 1.0 10.0 1.0 10.0 50 8.3 11.9 1.0 13.5 1.0 13.5 15 4.0 5.5 1.0 6.5 1.0 6.5 5.0(**) 50 5.5 7.5 1.0 8.5 1.0 8.5 (*) 1.0 15.5 1.0 15.5 5.0 tPZL tPZH Value 15 RL = 1KΩ 8.5 13.2 3.3(*) 50 RL = 1KΩ 11.0 16.7 1.0 19.0 1.0 19.0 5.0(**) 15 RL = 1KΩ 5.8 8.5 1.0 10.0 1.0 10.0 5.0(**) 50 RL = 1KΩ 7.3 10.6 1.0 12.0 1.0 12.0 (*) 3.3 50 RL = 1KΩ 11.5 15.8 1.0 18.0 1.0 18.0 (**) 50 RL = 1KΩ 7.0 9.7 1.0 11.0 1.0 11.0 3.3(*) 50 1.5 1.5 1.5 5.0(**) 50 1.0 1.0 1.0 3.3 5.0 Unit ns ns ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V Note 1: Parameter guaranteed by design. tsoLH = |tpLHm - tpLHn|, tsoHL = |tpHLm - tpHLn| CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. CIN Input Capacitance CI/O Output Capacitance Power Dissipation Capacitance (note 1) CPD Typ. Max. 4 10 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF 8 pF 21 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit) 5/10 74VHC16245 DYNAMIC SWITCHING CHARACTERISTICS Test Condition Symbol VOLP VOLV VIHD VILD Parameter Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) TA = 25°C VCC (V) Min. 5.0 5.0 Value -0.9 CL = 50 pF 5.0 Typ. Max. 0.6 0.9 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. V -0.6 3.5 V 1.5 V 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (V ILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT TEST SWITCH tPLH, tPHL Open tPZL, tPLZ tPZH, tPHZ VCC CL =15/ 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω 6/10 GND 74VHC16245 WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/10 74VHC16245 TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. 1.2 A1 0.05 0.047 0.15 A2 MAX. 0.002 0.006 0.9 0.035 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.6 0.488 0.496 E 8.1 BSC E1 6.0 0.318 BSC 6.2 e 0.236 0.5 BSC 0.244 0.0197 BSC K 0˚ 8˚ 0˚ 8˚ L 0.50 0.75 0.020 0.030 A A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 7065588C 8/10 74VHC16245 Tape & Reel TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 30.4 0.519 1.197 Ao 8.7 8.9 0.343 0.350 Bo 13.1 13.3 0.516 0.524 Ko 1.5 1.7 0.059 0.067 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.476 9/10 74VHC16245 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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