STMICROELECTRONICS 74VHCT86AM

74VHCT86A

QUAD EXCLUSIVE OR GATE
PRELIMINARY DATA
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HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA = 25 oC
COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS &
OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
IMPROVED LATCH-UP IMMUNITY
LOW NOISE: VOLP = 0.8V (Max.)
DESCRIPTION
The 74VHCT86A is an advanced high-speed
CMOS QUAD EXCLUSIVE OR GATE fabricated
with sub-micron silicon gate and double-layer
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74VHCT86AM
74VHCT86AT
metal wiring C2MOS technology.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
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74VHCT86A
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1, 4, 9, 12
1A to 4A
NAME AND FUNCT ION
Data Inputs
2, 5, 10, 13
1B to 4B
Data Inputs
3, 6, 8, 11
1Y to 4Y
Data Outputs
7
GND
Ground (0V)
14
VCC
Positive Supply Voltage
TRUTH TABLE
A
B
Y
L
L
L
L
H
H
H
L
H
H
H
L
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
Supply Voltage
-0.5 to +7.0
V
VI
DC Input Voltage
-0.5 to +7.0
V
VO
DC Output Voltage (see note 1)
-0.5 to +7.0
V
VO
DC Output Voltage (see note 2)
-0.5 to VCC + 0.5
V
VCC
IIK
DC Input Diode Current
- 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 25
mA
± 50
mA
ICC or IGND DC VCC or Ground Current
Tstg
TL
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
o
300
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
1) VCC =0V
2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
4.5 to 5.5
V
Input Voltage
0 to 5.5
V
VO
Output Voltage (see note 1)
0 to 5.5
V
VO
Output Voltage (see note 2)
Top
Operating Temperature
dt/dv
Input Rise and Fall Time (see note 3) (V CC = 5.0 ± 0.5V)
1) VCC =0V
2) High or Low State
3)VIN from0.8V to 2 V
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Unit
VI
VCC
Supply Voltage
Valu e
0 to VCC
-40 to +85
0 to 20
V
o
C
ns/V
74VHCT86A
DC SPECIFICATIONS
Symb ol
Parameter
T est Cond ition s
Min.
2
VIH
High Level Input
Voltage
4.5 to 5.5
VIL
Low Level Input
Voltage
4.5 to 5.5
VOH
High Level Output
Voltage
VOL
Low Level Output
Voltage
Value
T A = 25 o C
V CC
(V)
Typ .
Un it
-40 to 85 o C
Max.
Min .
Max.
2
0.8
V
0.8
4.5
I O =-50 µA
4.4
4.5
IO=-8 mA
3.94
4.5
I O=50 µA
0.1
0.1
4.5
IO=8 mA
0.36
0.44
4.5
4.4
V
3.8
0.0
V
V
0 to 5.5
VI = 5.5V or GND
±0.1
±1.0
µA
ICC
Quiescent Supply
Current
5.5
VI = VCC or GND
2
20
µA
∆ICC
Additional Worst Case
Supply Current
5.5
One Input at 3.4V,
other input at VCC or
GND
1.35
1.5
mA
IOPD
Output Leakage
Current
0
VOUT = 5.5V
0.5
5.0
µA
II
Input Leakage Current
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
Symb ol
tPLH
tPHL
Parameter
Propagation Delay
Time
Test Co ndition
V CC (*)
CL
(pF )
(V)
5.0
5.0
15
50
Value
T A = 25 o C
Min. Typ . Max.
5.0
7.9
5.5
7.9
Un it
-40 to 85 o C
Min . Max.
1.0
9.0
1.0
9.0
ns
(*) Voltage range is 5V ± 0.5V
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Value
T A = 25 o C
Min.
Typ .
Max.
10
C IN
Input Capacitance
4
CPD
Power Dissipation
Capacitance (note 1)
18
Un it
-40 to 85 o C
Min .
Max.
10
pF
pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4 (per Gate)
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74VHCT86A
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Dynamic Low Voltage
Quiet Output (note 1, 2)
5.0
VIHD
Dynamic High Voltage
Input (note 1, 3)
5.0
VILD
Dynamic Low Voltage
Input (note 1, 3)
5.0
VOLP
VOLV
Value
T A = 25 o C
V CC
(V)
Min.
-0.8
C L = 50 pF
Un it
-40 to 85 o C
Typ .
Max.
0.3
0.8
Min .
Max.
-0.3
2
V
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n -1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance)
RT = ZOUT of pulse generator (typically 50Ω)
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74VHCT86A
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74VHCT86A
SO-14 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45 (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
0.244
e
1.27
e3
0.050
7.62
0.300
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.026
8 (max.)
P013G
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74VHCT86A
TSSOP14 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
A
MAX.
MIN.
TYP.
MAX.
1.1
0.433
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
0.85
0.9
0.95
0.335
0.354
0.374
b
0.19
0.30
0.0075
0.0118
c
0.09
0.20
0.0035
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.25
6.4
6.5
0.246
0.252
0.256
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
0.65 BSC
0.0256 BSC
K
0o
4o
8o
0o
4o
8o
L
0.50
0.60
0.70
0.020
0.024
0.028
A
A2
A1
b
e
K
c
L
E
D
E1
PIN 1 IDENTIFICATION
1
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74VHCT86A
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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