EMIF04-MMC02F1 ® IPADTM 4 LINES EMI FILTER INCLUDING ESD PROTECTION MAIN APPLICATION MULTIMEDIACARD™ ■ DESCRIPTION The EMIF04-MMC02F1 is a highly integrated array designed to suppress EMI / RFI noise for MULTIMEDIACARD™ port filtering. The EMIF04-MMC02F1 flip-chip packaging means the package size is equal to the die size. That's why EMIF04-MMC02F1 is a very small device. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. BENEFITS 4 lines low-pass-filter High efficiency in EMI filtering Very low PCB space consuming: < 3.3 mm2 Very thin package: 0.65 mm High efficiency in ESD suppression (IEC61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. Flip Chip package PIN CONFIGURATION ■ ■ A3 A2 B3 B2 B1 C3 C2 C1 D3 D2 D1 ■ ■ ■ ■ ■ COMPLIES WITH THE FOLLOWING STANDARDS : IEC 61000-4-2 Level 4: 15kV 8 kV (air discharge) (contact discharge) on input & output pins. MIL STD 883E - Method 3015-6 Class 3 TM : IPAD is a trademark of STMicroelectronics. September 2002 - Ed: 4A 1/6 EMIF04-MMC02F1 SCHEMATIC R10 R20 C2 B2 A3 R1 A2 B3 R2 B1 C3 D3 R3 C1 D1 R4 D2 GND ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C) Symbol VPP Tj Parameter and test conditions Value Unit ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 kV Junction temperature 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C ELECTRICAL CHARACTERISTICS (Tamb = 25 °C) Symbol 2/6 Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current EMIF04-MMC02F1 Symbol Test conditions VBR IR = 1 mA IRM VRM = 3V Cline @ 0V Min. Typ. Max. Unit 6 V 0.1 0.5 µA 20 pF R1,R2,R3,R4 Tolerance ± 5% 47 Ω R10 Tolerance ± 5% 13 kΩ R20 Tolerance ± 5% 56 kΩ P 70 Fig. 1: Filtering measurements mW Fig. 2: Cross talk measurements Xtalk measurements C3/B1 S21(dB) measurements of C3/C1 line 0.00 dB -10.00 0.00 dB -5.00 -10.00 -20.00 -15.00 -30.00 -20.00 -40.00 -25.00 -30.00 -50.00 -35.00 -60.00 -40.00 -70.00 -45.00 -50.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G -80.00 1.0M 3.0G 3.0M 10.0M 30.0M 100.0M 300.0M f/Hz 1.0G 3.0G Note: spikes at high frequencies are induced by the PCB layout. Fig. 3: Line capacitance versus reverse applied voltage. C(pF) 20 F=1MHz Vosc=30mVRMS Tj=25°C 18 16 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VR(V) 3/9 EMIF04-MMC02F1 Fig. 4: ESD response to IEC61000-4-2 (+15kV contact discharge). Negative Surge Positive Surge APLAC MODEL Fig. 5: Device structure B2 C2 R20 R10 R1 A2 A3 R2 B1 B3 R3 C3 C1 R4 D1 D3 MODEL = demif04 MODEL = demif04 MODEL = demif04_gnd 120pH 100m D2 4/9 DEMIF04 BV = 7 IBV = 1m CJO = Cz M = 0.3333 RS = 1 VJ = 0.6 TT = 100n DEMIF04 gnd BV = 7 IBV = 1m CJO = Cz_gnd M = 0.3333 RS = 1 VJ = 0.6 TT = 100n EMIF04-MMC02F1 Fig. 6: Aplac model connections D2 Cins Rins Rins A3 Cins A2 Lbump Cins Rins Rins Cins Rbump B3 Cins B1 Rins Rins Lhole C3 C1 cap_hole Cins Rins Rhole Rins D3 Cins D1 Rins 5/6 Cins Cins Rins Cins aplacvar R1 47 opt aplacvar R2 47 aplacvar R3 47 aplacvar R4 47 aplacvar R10 13k aplacvar R20 56k aplacvar Cz 15pF opt aplacvar Cz_gnd 45pF opt aplacvar Ls 450pH opt aplacvar Rs 300m aplacvar Rbump 50m aplacvar Lbump 50pH aplacvar lhole 940pH opt aplacvar Rhole 100m aplacvar cap_hole 0.15pF aplacvar Cins 200fF aplacvar Rins 10Meg EMIF04-MMC02F1 Fig. 7: Aplac simulation versus frequency measurement. EMIF04-MMC02F1: Aplac vs measurement (C3/C1 line) 0.00 dB - 5.00 Simulation - 10.00 Measurement - 15.00 - 20.00 - 25.00 - 30.00 - 35.00 - 40.00 - 45.00 - 50.00 1.0M 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G 3.0G ORDER CODE EMIF 04 - MMC 02 F 1 Pitch and Bump version 1: pitch = 0.5mm bump = 0.3mm Electro Magnetic Interference Filter FLIP CHIP Nb of lines Version MULTIMEDIACARD™ port fonction PACKAGE MECHANICAL DATA 315 ± 50 650 ± 65 2070 ± 50 500 ± 50 1570 ± 50 All dimensions in µm 6/6 EMIF04-MMC02F1 PACKING MARKING 250 200 250 Dot identifying Pin A1 location* 1.5 +/- 0.1 4 +/- 0.1 1.75 +/- 0.1 ∅ 230 ® 3.5 +/- 0.1 2070 ST FHT yww ST FHT yww 220 40 ST F HT YWW FHT yww 8 +/- 0.3 0.73 +/- 0.05 4 +/- 0.1 All dimensions in mm User direction of unreeling 1570 - yww: Date code OTHER INFORMATION Ordering code Marking Package Weight Base qty Delivery mode EMIF04-MMC02F1 FHT Flip-Chip 4.5 mg 5000 Tape & reel (7”) Note: More packing informations are available in the application note AN1235: ''Flip-Chip: Package description and recommandations for use'' Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 7/6