ESDA6V1-4BC6 ® Application Specific Discretes A.S.D.™ QUAD BIDIRECTIONAL TRANSIL SUPPRESSOR FOR ESD PROTECTION APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : COMPUTERS PRINTERS COMMUNICATION SYSTEMS VIDEO EQUIPMENT This device is particularly adapted to the protection of symmetrical signals. ■ ■ ■ ■ SOT23-6L (SC-74) DESCRIPTION The ESDA6V1-4BC6 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients. The device is ideal for situations where board space is at a premium. FEATURES ■ ■ ■ ■ ■ ■ 4 BIDIRECTIONAL TRANSIL FUNCTIONS ESD PROTECTION FOR DATA, SIGNAL AND VCC BUS STAND OFF VOLTAGE RANGE: 5 V LOW LEAKAGE CURRENT PEAK PULSE POWER (8/20µs); 80W CHANNEL SEPARATION: 80dB typ.@20KHz FUNCTIONAL DIAGRAM SOT23-6L 1 6 2 5 3 4 BENEFITS ■ ■ ■ High ESD protection level High integration Suitable for high density boards COMPLIES WITH THE FOLLOWING STANDARDS: - IEC61000-4-2: 15 kV (air discharge) 8 kV (contact discharge) - MIL STD 883E-Method 3015-7: class3 (human body model) November 2002 - Ed: 1A 1/5 ESDA6V1-4BC6 1. ESD protection by ESDA6V1-4BC6 With the focus of lowering the operation levels, the problem of malfunction caused by the environment is critical. Electrostatic discharge (ESD) is a major cause of failure in electronic system. Transient Voltage Suppressors are an ideal choice for ESD protection and have proven capable in suppressing ESD events. They are capable of clamping the incoming transient to a low enough level such that damage to the protected semiconductor is prevented. Surface mount TVS arrays offer the best choice for minimal lead inductance. They serve as parallel protection elements, connected between the signal line to ground. As the transient rises above the operating voltage of the device, the TVS array becomes a low impedance path diverting the transient current to ground. Bidirectional protection for 0V biased signals. CONNECTOR DRIVER 1 6 2 5 3 4 The ESDA6V1-4BC6 array is the ideal product for use as board level protection of ESD sensitive semiconductor components. The tiny SOT23-6L package allows design flexibility in the design of “crowded” boards where the space saving is at a premium. This enables to shorten the routing and can contribute to improve ESD performance. 2. Circuit Board Layout Circuit board layout is a critical design step in the suppression of ESD induced transients. The following guidelines are recommended : The ESDA6V1-4BC6 should be placed as near as possible to the input terminals or connectors. Minimise the path length between the ESD suppressor and the protected device Minimise all conductive loops, including power and ground loops The ESD transient return path to ground should be kept as short as possible. Use ground planes whenever possible. ■ ■ ■ ■ ■ 2/5 ESDA6V1-4BC6 ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C) Symbol Test conditions Value Unit VPP ESD discharge - MIL STD 883C - Method 3015-6 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge 25 15 8 kV PPP Peak pulse power (8/20µs) 80 W Junction temperature 150 °C -55 to +150 °C 260 °C -40 to +125 °C Tj Tstg Storage temperature range TL Lead solder temperature (10 second duration) Top Operating temperature range (note 1) Note 1: Variation of parameters is given by curves. ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol I Parameter VRM Stand-off voltage VBR Breakdown voltage VCL Clamping voltage IRM Leakage current IPP Peak pulse current C Capacitance Rd Dynamic resistance VBR V I RM Rd VBR min. Type V RM VCL @ IR max. I PP IRM @ VRM Rd αT C max. typ. max. typ. note 1 ESDA6V1-4BC6 0V bias -4 V V mA µA V Ω 10 /°C pF 6.1 8 1 1 3 0.45 3 45 Note 1 : Square pulse, Ipp = 3A, tp=2.5µs. Fig. 1: Relative variation of peak pulse power versus initial junction temperature. Fig. 2: Peak pulse power versus exponential pulse duration. PPP[Tj initial] / PPP[Tj initial=25°C] PPP(W) 1.1 1000 Tj initial = 25°C 1.0 0.9 0.8 0.7 0.6 100 0.5 0.4 0.3 0.2 0.1 Tj(°C) tp(µs) 0.0 10 0 25 50 75 100 125 150 1 10 100 3/5 ESDA6V1-4BC6 Fig. 3: Clamping voltage versus peak pulse current (typical values, rectangular waveform). Fig. 4: Junction capacitance versus line voltage applied (typical values). IPP(A) C(pF) 100.0 50 F = 1MHz VOSC = 30mV Tj = 25°C 45 40 35 10.0 30 25 20 1.0 15 10 tp = 2.5µs Tj initial = 25°C VCL(V) 5 0.1 VR(V) 0 0 5 10 15 20 25 30 35 40 45 50 Fig. 5: Relative variation of leakage current versus junction temperature (typical values). 0 1 2 3 4 5 6 Fig. 6: Analog crosstalk test configuration. IR[Tj] / IR[Tj=25°C] 100 50Ω I/O1 unloaded VG Port 1 GND 10 50Ω I/O6 Tj(°C) 1 25 50 75 Symbol Parameter αch Pin topic channel separation Port 2 100 125 Conditions (see note 2) Values Min. Typ. F = 20 KHz 80 F = 10 MHz 34 Max. Unit dB Note 2 : According to figure 6 schematic. ORDER CODE ESDA 6V1 4B C6 PACKAGE: C6: SOT23-6L (SC-74) ESD ARRAY VBR min. Bidirectional 4/5 ESDA6V1-4BC6 PACKAGE MECHANICAL DATA SOT23-6L A E REF. DIMENSIONS Millimeters A2 e D b e Min. Typ. Max. Min. Typ. Max. A 0.90 1.45 0.035 0.057 A1 0 0.10 0.004 A2 0.90 1.30 0.035 0.0512 b 0.35 0.50 0.0137 0.02 c 0.09 0.20 0.004 0.008 D 2.80 3.00 0.11 0.118 E 1.50 1.75 0.059 0.0689 e A1 C θ FOOTPRINT 0 0.95 0.0374 H 2.60 3.00 0.102 0.118 L 0.10 0.60 0.004 0.024 θ L H Inches 10° 10° MARKING 1.20 0.047 0.60 0.024 Type Marking ESDA6V1-4BC6 BS77 1.10 0.043 2.30 0.090 3.50 0.138 Packaging: Standard packaging is tape and reel. mm inch 0.95 0.037 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 5/5