L6204 DMOS DUAL FULL BRIDGE DRIVER ADVANCE DATA SUPPLY VOLTAGE UP TO 48V RDS(ON) 1.2Ω (25°C) CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN 0.5A DC CURRENT TTL/CMOS COMPATIBLE DRIVER HIGH EFFICIENCY CHOPPING DESCRIPTION The L6204 is a dual full bridge driver for motor control applications realized in BCD technology which combines isolated DMOS power transistors with CMOS and Bipolar circuits on the same chip. By using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performance. The logic inputs are TTL/CMOS compatible. Both channels are controlled by a separate Enable. Each bridge has a sense resistor to control the currenrt level. MULTIPOWER BCD TECHNOLOGY Powerdip 16+2+2 SO 24+2+2 ORDERING NUMBERS: L6204 L6204D The L6204 is mounted in an 20-lead Powerdip and SO 24+2+2 packages and the four center pins are used to conduct heat to the PCB. At normal operating temperatures no external heatsink is required. BLOCK DIAGRAM March 1994 1/10 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. L6204 PIN CONNECTIONS (Top view) POWERDIP SO24+2+2 PIN FUNCTIONS SO Pin (*) DIP Pin Symbols 1 2 3 6 7 8 9 12 13 14 15 16 17 20 21 22 23 26 27 28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 SENSE 1 IN1 ENABLE 1 OUT 1 GND GND OUT 3 ENABLE 2 IN 3 SENSE 2 BOOSTRAP OSC. VCP IN 4 OUT 4 VS 2 GND GND VS 1 OUT 2 IN 2 VBOOT Functions Sense resistor to provide the feedback for motor current control of the bridge A Digital input from the motor controller (bridge A) A logic level low on this pin disable the bridge A Output of one half bridge of the bridge A Common Power Ground Common Power Ground Ouput of one half bridge of the bridge B A logic level low on this pin disable the bridge B Digital input from the motor controller (bridge B) Sense resistor to provide the feedback for motor current control of the bridge B Oscillator output for the external charge pump Digital input from the motor controller (bridge B) Output of one half bridge of the bridge B Supply voltage bridge B Common Power Ground Common Power Ground Supply Voltage bridge A Output of one half bridge of the bridge A Digital input from the motor controller (bridge A) Overvoltage input for driving of the upper DMOS (*) For SO package the pins 4, 5, 10, 11, 18, 19, 24 and 25 are not connected. ABSOLUTE MAXIMUM RATINGS Symbol VS VIN, VEN Io Parameter Supply Voltage Input or Enable Voltage Range Pulsed Output Current Test Conditions Unit 50 V -0.3 to +7 V 3 A V VSENSE Sensing Voltage -1 to 4 VBOOT Bootstrap Supply 60 V 5 1.23 2 W W W -40 to 150 °C Ptot Tstg, Tj 2/10 Total power dissipation: (Tpins = 80°C) Total power dissipation: (Tamb = 70°C no copper area on PCB) 2 Total power dissipation: (Tamb = 70°C 8cm copper area on PCB) Storage and Junction Temperature L6204 THERMAL DATA Symbol R th j-pins R th j-amb Description Thermal Resistance Junction-pins Thermal Resistance Junction-ambient Max Max SO DIP Unit 16 73 14 65 °C/W °C/W ELECTRICAL CHARACTERISTICS (VS = 42V, Tj = 25°C unless otherwise specified) Symbol Parameter VS Supply Voltage IS Total Quiescent Current Test Condition Min. Typ. 12 EN1=EN2=H; IN1=IN2=IN3=IN4=L EN1 = EN2 = L Max. Unit 48 V 10 10 mA mA fC Commutation Frequency 20 KHz TJ Thermal Shutdown 150 °C Td Dead Time Protection 500 ns TRANSISTORS IDSS Leakage Current OFF 1 mA RDS On Resistance ON 1.2 Ω LOGIC LEVELS VINL, VENL Input Low Voltage -0.3 0.8 V VINH, VENH Input High Voltage 2 7 V IINL, IENL Input Low Current IN1 =IN2 =IN3 =IN4= EN1 =EN2 =L -10 µA IINH, IENH Input High Current IN1 =IN2 =IN3 =IN4= EN1 =EN2 =H 50 µA APPLICATION DIAGRAM 3/10 L6204 CIRCUIT DESCRIPTION L6204 is a dual full bridge IC designed to drive DC motors, stepper motors and other inductive loads. Each bridge has 4 power DMOS transistor with RDSon = 1.2Ω and the relative protection and control circuitry. (see fig. 3) The 4 half bridges can be controlled independently by means of the 4 inputs IN!, IN2, IN3, IN4 and 2 enable inputs ENABLE1 and ENABLE2. External connections are provided so that sensing resistors can be added for constant current chopper applications. Figure 2: Current Typical Spikes on the Sensing Pin LOGIC DRIVE (*) INPUTS EN1=EN2=H EN1=EN2=L OUTPUT MOSFETS IN1 IN3 IN2 IN4 L L H H L H L H Sink 1, Sink 2 Sink 1, Source 2 Source 1, Sink 2 Source 1, Source 2 X X All transistor turned OFF L = Low H = High X = Don’t care (*) True table for the two full bridges CROSS CONDUCTION Although the device guarantees the absence of cross-conduction, the presence of the intrinsic diodes in the POWER DMOS structure causes the generation of current spikes on the sensing terminals. This is due to charge-discharge phenomena in the capacitors C1 & C2 associated with the drain source junctions (fig. 1). When the output switches from high to low, a current spike is generated associated with the capacitor C1. On the low-to-high transition a spike of the same polarity is generated by C2, preceded by a spike of the opposite polarity due to the charging of the input capacity of the lower POWER DMOS transistor (see fig. 2). Figure 1: Intrinsic Structures in the POWER MOS Transistors TRANSISTOR OPERATION ON STATE When one of the POWER DMOS transistors is ON it can be considered as a resistor RDS(ON) = 1.2Ω at a junction temperature of 25°C. In this condition the dissipated power is given by : PON = RDS(ON) ⋅ IDS2 The low RDS(ON) of the Multipower-BCD process can provide high currents with low power dissipation. OFF STATE When one of the POWER DMOS transistor is OFF the VDS voltage is equal to the supply voltage and only the leakage current IDSS flows. The power dissipation during this period is given by : POFF = VS ⋅ IDSS TRANSITIONS Like all MOS power transistors the DMOS POWER transistors have as intrinsic diode between their source and drain that can operate as a fast freewheeling diode in switched mode applications. During recirculation with the ENABLE input high,. the voltage drop across the transistor is RDS(ON) ID and when the voltage reaches the diode voltage it is clamped to its characteristic. When the ENABLE input is low, the POWER MOS is OFF and the diode carries all of the recirculation current. The power dissipated in the transitional times in the cycle depends upon the voltage and current waveforms in the application. Ptrans. = IDS(t) ⋅ VDS(t) BOOTSTRAP CAPACITORS To ensure the correct driving of high side drivers 4/10 L6204 Figure 3a: Two Phase Chopping IN1 = H IN2 = L EN1 = H IN1 = L IN2 = H EN1 = H Figure 3b: One Phase Chopping IN1 = H IN2 = L EN1 = H IN1 = H IN2 = H EN1 = H Figure 3c: Enable Chopping IN1 = H IN2 = L EN1 = H IN1 = X IN2 = X EN1 = L 5/10 L6204 a voltage higher than VS is supplied on pin 20 (Vboot). This bootstrap voltage is not needed for the lower power DMOS transistor because their sources are grounded. To produce this voltage a charge pump method is used and mAde by two external capacitors and two diodes. It can supply the 4 driving blocks of the high side drivers. Using an external capacitor the turn-on speed of the high side driver is very high; furthermore with different capacitance values it is possible to adapt the device to different switching frequencies. It is also possible to operate two or more L6204s using only 2 diodes and 2 capacitance for all the ICs; all the Vboot pins are connected to the Cstore capacitance while the pin 11 (VCP) of just one L6204 is connect to Cpump, obviously all the L6204 ICs have to be connected to the same VS. (see fig. 4) Figure 4 the voltage created across the sense resistor is usually much less than the peak value, although a small RC filter can be added if necessary. POWER DISSIPATION (each bridge) In order to achieve the high performance provided by the L6204 some attention must be paid to ensure that it has an adequate PCB area to dissipate the heat. The first stage of any thermal design is to calculate the dissipated power in the application, for this example the half step operation shown in figure 5 is considered. RISE TIME Tr When an arm of the half bridge is turned on current begins to flow in the inductive load until the maximum current IL is reached after a time Tr. The dissipated energy EOFF/ON is in this case : EOFF/ON = [RDS(ON) ⋅ IL2 ⋅ Tr] ⋅ 2/3 Figure 5 DEAD TIME To protect the device against simultaneous conduction in both arms of the bridge and the resulting rail-to-rail short, the logic circuits provide a dead time. THERMAL PROTECTION A thermal protection circuit has been included that will disable the device if the junction temperature reaches 150 °C. When the temperature has fallen to a safe level the device restarts under the control of the input and enable signals. APPLICATION INFORMATION RECIRCULATION During recirculation with the ENABLE input high, the voltage drop across the transistor is RDS(ON). IL for voltages less than 0.7 V and is clamped at a voltage depending on the characteristics of the source-drain diode for greater voltages. Although the device is protected against cross conduction, current spikes can appear on the current sense pin due to charge/discharge phenomena in the intrinsic source drain capacitances. In the application this does not cause any problems because 6/10 ON TIME TON During this time the energy dissipated is due to the ON resistance of the transistors EON and the commutation ECOM. As two of the POWER DMOS transistors are ON EON is given by : EON = IL2 ⋅ RDS(ON) ⋅ 2 ⋅ TON In the commutation the energy dissipated is : ECOM = VS ⋅ IL ⋅ TCOM ⋅ fSWITCH ⋅ TON Where : TCOM = Commutation Time and it is assumed that ; TCOM = TTURN-ON = TTURN-OFF = 100 ns fSWITCH = Chopper frequency FALL TIME Tf For this example it is assumed that the energy dissipated in this part of the cycle takes the same form as that shown for the rise time : EON/OFF = [RDS(ON) ⋅ I2L⋅ Tf] ⋅ 2/3 L6204 QUIESCENT ENERGY The last contribution to the energy dissipation is due to the quiescent supply current and is given by : EQUIESCENT = IQUIESCENT • VS • T TOTAL ENERGY PER CYCLE ETOT = (EOFF/ON + EON + ECOM + EON/OFF)bridge 1+ +(EOFF/ON + EON + ECOM + EON/OFF)bridge 2+ + EQUIESCENT The Total Power Dissipation PDIS is simply : PDIS = ETOT /T Tr = Rise time TON = ON time Tf = Fall Time Td = Dead time T = Period T = Tr + TON + Tf + Td 7/10 L6204 POWERDIP-20 PACKAGE MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.85 b b1 TYP. MAX. MIN. TYP. MAX. 0.020 1.40 0.033 0.50 0.38 0.055 0.020 0.50 D 0.015 0.020 24.80 0.976 E 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 F 7.10 0.280 I 5.10 0.201 L Z 8/10 inch 3.30 0.130 1.27 0.050 L6204 SO28 PACKAGE MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 2.65 MAX. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C 0.5 0.020 c1 45° (typ.) D 17.7 18.1 0.697 0.713 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 F 7.4 7.6 0.291 0.299 L 0.4 1.27 0.016 0.050 S 8° (max.) 9/10 L6204 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. 10/10