STMICROELECTRONICS L6243

L6243
L6243D
VOICE COIL MOTOR DRIVER
12V/5V OPERATION
PARKING FUNCTION FOR HARD DISK
HEAD ACTUATOR
OUTPUT CURRENT UP TO 2A DC, 2.5A
PEAK
LOW SATURATION VOLTAGE
LOGIC AND POWER SUPPLY MONITOR
LINEAR CONTROL
THERMAL PROTECTION
ENABLE FUNCTION
CURRENT SENSE RESISTOR CONNECTIONS
DESCRIPTION
The L6243/D is a Bipolar IC developed for use in
Hard Disk Head Actuator positioning applications.
The Power Op-Amp Output Bridge, Differential
Amplifier, and Error Amplifier, are controlled by
TTL/CMOS, input compatible, Digital Logic, and
an Analog Current Control Voltage. A simple
RC compensation network, tied to the output of
the Error Amp, will configure the system to work
PLCC44
SO(24+2+2)
ORDERING NUMBERS:
L6243
L6243D
as a Transconductance Amplifier to drive a
Voice Coil Motor in Linear Mode.
Additional features include Power On Reset Delay, Enable and Park, as well as a general purpose Operational Amplifier. A logic low at the
Park input activates the parking function. Holding
the Enable input low will disable the device by
forcing the outputs into a tristate mode. Power
Fail Monitors for the logic and power supplies initiate an automatic parking sequence during a
power failure. A resistor programmed parking
voltage enables a constant velocity head retract.
BLOCK DIAGRAM
July 1996
1/12
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
L6243-L6243D
PIN CONNECTION (Top view)
VCC(12V)
2
1 44 43 42 41 40
GND
VREF
3
N.C.
SENSE AMP OUTPUT
4
SENSE AMP INPUT B
N.C.
5
OOUTPUT B
N.C.
6
PARK POWER
GND
PLCC-44
GND
7
39
GND
ERROR AMP INPUT
8
38
SENSE AMP INPUT A
ERROR AMP OUTPUT
9
37
N.C.
OP AMP -INPUT
10
36
GND
OP AMP +INPUT
11
35
N.C.
OP AMP OUTPUT
12
34
GND
GND
13
33
N.C.
WRITE DISABLE OUTPUT
14
32
N.C.
POWER ON RESET OUTPUT
15
31
GND
PARK VOLTAGE PROGRAM
16
30
ENABLE INPUT
GND
17
29
GND
VREF
N.C.
N.C.
N.C.
ERROR AMP INPUT
ERROR OUTPUT
GND
GND
WRITE DISABLE OUTPUT
POWER ON RESET OUTPUT
PARK VOLTAGE PROGRAM
POWER FAIL THRESHOLD
VCC SENSE OUTPUT
POWER ON RESET DELAY
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
D96IN450
2/12
N.C.
N.C.
PARK INPUT
5V FILTER
1
OUTPUT A
VCC (12V)
LOGIC SUPPLY SENSE (5V)
VCC SENSE OUTPUT
POWER ON REST DELAY
N.C.
SO 24+2+2
POWER FAIL THRESHOLD
18 19 20 21 22 23 24 25 26 27 28
D96IN449
SENSE AMP OUTPUT
VCC
PARK POWER
OUTPUT B
SENSE AMP INPUT B
SENSE AMP INPUT A
GND
GND
ENABLE
PARK INPUT
OUTPUT A
5V FILTER
VCC
LOGIC SUPPLY SENSE (5V)
L6243-L6243D
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VS
Supply Voltage
Value
Unit
18
V
VIN
Input Voltage
VID
Differential Input Voltage
0.3V to VS
IO
DC Output Current
2
A
Ip
Peak Output Current (non repetitive)
2.5
A
Ptot
Total Power Dissipation (Tamb = 70°C) for L6243
for L6243D
2
1.2
W
W
Tstg
Storage and Junction Temperature
-55 to +150
°C
±VS
THERMAL DATA
Symbol
Description
L6243
L6243D
Unit
R th j-pin
Rth j-amb
Rth j-amb
Thermal Resistance Junction to pin
Thermal Resistance Junction to pin floating in air
Thermal Resistance Junction to pin 16 cm2 copper area on board
heat sink
12
62
36
14
°C/W
°C/W
°C/W
50
PIN FUNCTIONS
Name
VCC
Function
Power supply.
GND
Common Ground.
Vref
Voltage Reference.
ENABLE
Input. Logic low will disable IC.
PARK POWER
Input Power supply for the parking circuit.
CURRENT SENSE OUT
Current sense operational amplifier output.
ERROR AMP IN
ERROR AMP OUT
SENSE IN ±
OUT A, B
PARK
PARK VOLTAGE PROGRAM
POWER FAIL THRESHOLD
LOGIC SUPPLY SENSE
5V FILTER
VCC SENSE OUT
POR
POR DELAY
WRITE DISABLE
Error amplifier inverting input.
Error amplifier output.
Input for external sense resistors.
Outputs of the two Power Operational Amplifiers Connections for Voice coil Motor.
External input for parking. Low will activate the park procedure.
Input to set the park voltage.
Supply monitor threshold setting.
Logic Supply Sense.
Capacitor connection to filter the logic supply ripple.
Power supply failure monitor output.
Power on reset output. Low will signal to the controller the failure of the logic supply.
Capacitor connection to set the power on reset delay.
Output for write disable. Low will disable the writing mode.
AMP–
Inverting input of the additional op amp.
AMP+
Non-inverting input of the additional op amp.
AMPOUT
Output of the additional op amp.
3/12
L6243-L6243D
ELECTRICAL CHARACTERISTICS (VS = 12V, Tamb = 25°C; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
4.5
Max.
13.2
Unit
VS
Supply Range
Id
Quiescent Drain Current
20
mA
V
Tj
Thermal Shutdown Junction
Temperature
160
°C
ERROR AMPLIFIER
Ib
Input Bias Current
1
µA
IOS
Input Offset Current
300
nA
VOS
Input Offset Voltage
5
mV
Gv
Large Signal Open Loop Voltage
Gain
65
dB
GBW
Gain Bandwidth
Gmin
3
MHz
Minimum Voltage Gain
IO+
Output Source Current
6
mA
IO–-
Output Sink Current
6
mA
SR
Slew-rate
2
V/µs
8
V/V
5
SENSE AMPLIFIER
RIN, Vref
Vref Input Impedance
Ad
Differential Gain
SR
GBW
R in
CMRR
9
KΩ
Slew-rate
1
V/µs
Gain Bandwidth Product
3
MHz
Sense Input Impedance
1.5
KΩ
Common Mode Rejection Ratio
55
dB
POWER OP. AMP.
GV
Voltage Gain
Vd
Total Output Voltage Drop
V off
Offset Voltage on Sense
Resistor
BW
Bandwidth on Resistive Load
IO
IO
IO
IO
= 250mA
= 500mA
= 1A
= 2A
26
dB
450
750
1.15
2.30
mV
mV
V
V
1.5
2.5
5
mV
100
KHz
GENERAL PURPOSE OP-AMP
Ib
Input Offset Current
VOS
Input Offset Voltage
GV
Large Signal Open Loop Voltage
Gain
GBW
4/12
Input Bias Current
IOS
65
1
µA
300
nA
5
mV
dB
Gain Bandwidth Product
1
MHz
IO+
Output Source Current
6
mA
IO–
Output Sink Current
6
mA
SR
Slew Rate
1
V/µs
L6243-L6243D
ELECTRICAL CHARACTERISTICS (continued)
MONITORS AND CONTROL CIRCUIT
Symbol
Min.
Typ.
Max.
Unit
V t1
Threshold Voltage at Logic
Supply Sense
Parameter
Test Condition
4.45
4.60
4.75
V
V t2
Threshold Voltage at Power Fail
Threshold Input
1.375
1.4
1.435
V
HVt1
Hysteresis on Vt1
50
HVt2
Hysteresis on Vt2
15
Vll
Low Level Voltage
Write Disable = 2mA
250
Power on Reset = 2mA
250
Ie
Enable Input Current
Vi = 2.4V
Vi = 0.4V
–200
µA
Vi = 2.4V
100
µA
Ip
Input Current at Park
Rf
Equivalent Input Resistance at
5V Filter Input
Vi = 0.4V
mV
mV
500
mV
500
mV
100
µA
–200
6.9
µA
KΩ
V enl
Enable Low Input Voltage
Venh
Enable High Input Voltage
2
V ph
Parking Input High Voltage
2
Vpl
Parking Input Low Voltage
Vpfl
Power Fail Low Output Voltage
Iprog
Parking Voltage Program Current
100
µA
Ich
Power On Reset Delay
Capacitor Charging
10
µA
Td
Delay Between Write Disable
and Power on Reset Falling
Edges
4
0.8
V
V
0.8
Il = 2mA
FUNCTIONAL DESCRIPTION
The VCM Driver is controlled via three control signals, ENABLE, POWER ON RESET, and WRITE
DISABLE. An analog input voltage, ERROR AMP
IN, controls the polarity and amplitude of the VCM
driving current.
Refer to figure two. This diagram is a representation of the function of the VCM System.
Note that the signals with the bars represent the
”not true”, or ”non asserted” condition. From in itial power up, the system is held in the Park
Mode. Upon completion of the POWER UP RESET DELAY the machine moves to Tristate Mode
or Run Mode, depending upon the condition of
the ENABLE input. If ENABLE is asserted, the
machine moves directly to Run Mode. If ENABLE
is not asserted, the machine moves to Tristate
Mode.
V
0.5
10
V
V
µs
POWER ON RESET is an asynchronous output.
Additionally it affects the internal logic as a hard
wired reset and therefore if a supply failure occurs
during Tristate or Run state, the machine moves
directly back to the Park Mode. A WRITE DISABLE occurs a few to ten microseconds prior to
the POWER ON RESET in order for the system
to halt any read/write activity before a head retract begins.
While in Tristate Mode, the assertion of ENABLE
will move the machine to the Run Mode. Run
Mode will typically be the steady running state.
The deassertion of the ENABLE signal causes
the machine to move into Tristate. If it is desired
to perform an active Parking function, the PARK
input must be driven low by the external hardware, or the the VCM can be driven to the Park
position via the ERROR AMP IN control voltage
5/12
L6243-L6243D
FUNCTIONAL DESCRIPTION (continued)
Function
VCC input
POWER FAIL
THRESH
Description
This is the Power Supply input.
Input for the VCC supply monitor. The Threshold can be externally set via a voltage divider.
VCC SENSE OUT
Output
TTL compatible signal indicating the VCC supply has dropped below the POWER FAIL
THRESHOLD.
LOGIC SUPPLY
SENSE input
This input is used to monitor the Five Volt Logic Supply for the external control and other support
IC’s. The LOGIC SUPPLY SENSE operates independently of the 12V Power Supply. When a
5V supply failure is detected a POWER ON RESET is generated.
5V FILTER input
This pin allows for the application of filter circuitry in order to avoid false triggering.
PARK POWER
input
This input is used during the Power Down/Power Fail Parking operation. When the supply goes
down, a typical Spindle Driver Circuit automatically tristates its output stages. During this time
the spindle motor spins freely and the stored energy is used to drive the VCM to the park
position. The generated BEMF is rectified and filtered across an external PARKING
CAPACITOR.
PROGRAMMABLE
PARK VOLTAGE
input
PARK
input
Used to set the voltage applied to the VCM during an Automatic Parking Operation.
Logic signal asserted low, activates parking.
POWER ON
RESET output
Indicates an error condition to the external control and support circuitry. A Logic Supply Fail
condition automatically initiates a POWER ON RESET. Internal 30k Pullup to LSS.
POWER ON
RESET DELAY
input
The intent of this input is to provide a time delay at power up. During this time, the POWER ON
RESET line will be asserted (low). A POWER ON RESET, will hold the system in the PARK
mode. Once the delay has timed out, the POWER ON RESET will be removed to allow the
external system to assume control. When applied in a Disk Drive Application, the POWER ON
RESET DELAY will be required to have a minimum duration which will ensure that the
Read/Write Heads can be fully parked.
WRITE DISABLE
output
Becomes asserted a few microseconds prior to the assertion of POWER ON RESET.
Internal 30k Pullup to LSS.
ENABLE
This signal originates at the external controller and, when asserted, allows the VCM Drivers to
operate. When deasserted the VCM Driver is forced into Tristate mode. During a POWER ON
RESET condition however, the parking operation is automatic and takes priority over the
ENABLE function. Only at the end of the POWER ON RESET DELAY will the ENABLE input
become active. If active parking is desired, it will be accomplished under control of the VIN
signal, otherwise it is an automatic function at power down.
input
V REF input
ERROR AMP IN
input
The reference voltage input is basically that voltage, at which the output current is zero.
Inverting input of error amplifier. The non inverting one is internally tied to Vref.
Open collector output.
ERROR AMP OUT
output
Error amplifier output pin.
OUTPUT A power
output
Voice Coil power output.
OUTPUT B power
output
Voice Coil power output.
SENSE AMP IN
A/B signal input
Sense amplifier input pins. The sense resistor is connected across these pins.
SENSE AMP OUT
signal output
Output pin of sense amplifier.
AMPOUT
Output of an internal op-amp for general application.
6/12
output
AMP+ input
General purpose op-amp non inverting input.
AMP- input
General purpose op-amp inverting input.
L6243-L6243D
BLOCK DESCRIPTION
OUTPUT STAGE
It consists of two Power Op Amps connected in
bridge configuration.
CURRENT SENSE AMPLIFIER
Differential amplifier whose inputs are connected
to the sense lines and whose output is accessible
externally. Closing the loop will transform the
differential voltage signal from the sense lines into
a current signal for the Error Amplifier.
ERROR AMPLIFIER
Error amplifier which drives the output stage. The
input and the output pins are accessible externally.
POWER SUPPLY MONITOR OPERATION
The circuit monitors the logic supply voltage input
(typ 5V) and activates Power on Reset and Write
Disable output when such a supply drops below
the safe operating limit. After the logic supply voltage reaches its nominal value a delay capacitor
has to be charged [Tdelay=3x10e5 x C sec] before Power on Reset and Write Disable outputs
change from low to high level. Falling edges of
Write Disable and Power on Reset are delayed
(typ 4µs) in order to disable the writing on the disk
before the Power on Reset is activated. An additional supervisor circuit is present in the IC with a
programmable threshold, which is set by an external resistive divider. The TTL compatible output
can be used separately or connected to Park input in order to park the head.
The VCC sense output pin can also be connected
to 5V filter input in order to implement a POWER
ON RESET function sensitive both to 5V and VCC.
PARKING CIRCUIT OPERATIONT
The voice coil driver is switched into the parking
condition when Power on Reset output or Park input are low. In such a condition a fixed voltage is
superimposed on the load and the value of such a
voltage is set by connecting an external resistor
between Park Voltage Program input and
ground: (Vpark=Rext x Iref, Iref=100µA typ). Connecting ENABLE input to GND the driver will be
disabled (outputs in high impedance mode).
THERMAL SHUTDOWN
It will disable the IC when the junction temperature exceeds the threshold value above which the
device could be damaged.
Figure 1: Application Circuit (The pinout refers to the L6243)
7/12
L6243-L6243D
Figure 2: Waveforms
8/12
L6243-L6243D
THERMAL CHARACTERISTICS
Figure 3: Rth (j-amb) vs. Dissipated Power
Figure 4: Rth (j-amb) vs. Dissipated Power
9/12
L6243-L6243D
PLCC44 PACKAGE MECHANICAL DATA
mm
DIM.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
17.4
17.65
0.685
0.695
B
16.51
16.65
0.650
0.656
C
3.65
3.7
0.144
0.146
D
4.2
4.57
0.165
0.180
d1
2.59
2.74
0.102
0.108
d2
E
0.68
14.99
0.027
16
0.590
0.630
e
1.27
0.050
e3
12.7
0.500
F
0.46
0.018
F1
0.71
0.028
G
10/12
inch
0.101
0.004
M
1.16
0.046
M1
1.14
0.045
L6243-L6243D
SO28 PACKAGE MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
2.65
MAX.
0.104
a1
0.1
0.3
0.004
0.012
b
0.35
0.49
0.014
0.019
b1
0.23
0.32
0.009
0.013
C
0.5
0.020
c1
45° (typ.)
D
17.7
18.1
0.697
0.713
E
10
10.65
0.394
0.419
e
1.27
0.050
e3
16.51
0.65
F
7.4
7.6
0.291
0.299
L
0.4
1.27
0.016
0.050
S
8° (max.)
11/12
L6243-L6243D
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as criticalcomponents in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
 1996 SGS-THOMSON Microelectronics – Printed in Italy – All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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12/12