FAIRCHILD FPF3040

FPF3040
IntelliMAX™ 20 V-Rated Dual Input Single Output
Power-Source-Selector Switch
Description
Features


Dual-Input, Single-Output Load Switch
Input Supply Operating Range:
- 4~10.5 V at VIN
- 4~6.5 V at VBUS

Typical RON:


95 mΩ at VIN=5 V
70 mΩ at VBUS=5 V
Bi-Directional Switch for VIN and VBUS
Slew Rate Controlled:
-
50 µs at VIN for < 4.7 µF COUT
90 µs at VBUS for < 4.7 µF COUT






Maximum ISW: 2 A Per Channel

ESD Protected:
Break-Before-Make Transition
Under-Voltage Lockout (UVLO)
The FPF3040 is a 20 V-rated Dual-Input Single-Output
(DISO) load switch consisting of two channels of slewrate-controlled, low-on-resistance, N-channel MOSFET
switches with protection features. The slew-ratecontrolled turn-on characteristic prevents inrush current
and the resulting excessive voltage droop on the input
power rails. The input voltage range operates from
4 V to 6.5 V at VBUS and from 4 V to 10.5 V at VIN to
align with the needs of low-voltage portable device
power rails.
VIN and VBUS have the over-voltage protection
functionality of typical 12 V and 7.5 V, respectively, to
avoid unwanted damage to system.
VIN and VBUS bi-directional switching allows reverse
current from VOUT to VIN or VBUS for On-The-Go, (OTG)
Mode. The switching is controlled by logic input EN and
VIN_SEL is capable of interfacing directly with low-voltage
control signal General-Purpose Input / Output (GPIO).
FPF3040 is available in 1.8 mm x 2.0 mm Wafer-Level
Chip-Scale Package (WLCSP), 16-bump, 0.4 mm pitch.
Over-Voltage Lockout (OVLO)
Thermal Shutdown
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Requirements
-
Human Body Model: >3 kV
Charged Device Model: >1.5 kV
IEC 61000-4-2 Air Discharge: >15 kV
IEC61000-4-2 Contact Discharge: >8 kV
Applications

Input Power Selection Block Supporting USB and
Wireless Charging

Smartphone / Tablet PC
Ordering Information
Part Number
Top
Mark
Channel
FPF3040UCX
QY
DISO
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
Typical RON per
Channel at 5VIN
95 mΩ for VIN
70 mΩ for VBUS
Rise Time (tR)
Package
50 µs for VIN 1.8 mm x 2.0 mm Wafer-Level Chip-Scale
90 µs for VBUS Package (WLCSP), 16-Bump, 0.4 mm Pitch
www.fairchildsemi.com
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
September 2012
Figure 1. Typical Application
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Application Diagram
Figure 2. Functional Block Diagram
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
2
Figure 3. Pin Assignment (Top View)
Figure 4. Pin Assignment (Bottom View)
Pin Description
Pin #
Name
Input / Output
A1, B1, C1
VBUS
Input / Output
VBUS at USB: Power input / output.
bi-directional switch when VIN_SEL = LOW.
A4, B4, C4
VIN
Input / Output
VIN Supply Input: Power input / output.
bi-directional switch when VIN_SEL = HIGH.
A2, A3, B3, C3
VOUT
Input / Output
C2
D4
EN
VIN_SEL
Input
Input / Output
D3
DF_IN
Input
B2
Other_VIN_AVA
Output
D1, D2
GND
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
Description
Switch Output: Power input / output.
Enable: Active HIGH.
EN can power internal circuit when VIN and VBUS are absent.
1 MΩ pull-down resistor is included.
Supply Selector & Status: Input power source selection input
and status output. This signal is ignored during EN=LOW.
Selector input during EN=HIGH:
HIGH means to switch VIN to VOUT.
LOW means to switch VBUS to VOUT.
Status output during EN=LOW:
HIGH means VIN is used for VOUT.
LOW means VBUS is used for VOUT.
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Pin Configuration
Default Supply Selector during EN=LOW: Input.
Floating means VBUS connects to VOUT.
LOW means VIN connects to VOUT.
This signal is ignored during EN=HIGH. 1 µA pull-up current
source is included.
Other Supply Input Status: Open-drain output.
HI-Z means both VIN and VBUS are valid.
LOW means the other power source is not valid.
Ground
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3
EN
VIN>UVLO VBUS>UVLO VIN_SEL DF_IN
HIGH
X
X
LOW
Other_VIN_AVA
VOUT
X
HI-Z if VIN & VBUS
>UVLO
LOW if VIN or VBUS
<UVLO
VBUS
VIN
Comment
VOUT is selected by VIN_SEL
Bi-directional channel
HIGH
X
X
HIGH
X
HI-Z if VIN & VBUS
>UVLO
LOW if VIN or VBUS
<UVLO
LOW
YES
NO
HIGH
X
LOW
VIN
LOW
NO
YES
LOW
X
LOW
VBUS
LOW
YES
YES
LOW
Floating
HIGH
VBUS
LOW
YES
YES
HIGH
LOW
HIGH
VIN
LOW
NO
NO
X
X
LOW
Floating
Automatic selection to valid
input
VIN_SEL is output.
VOUT is selected by DF_IN
VIN_SEL is output.
OFF
Notes:
1. Internal pull-down at EN.
2. 1 µA pull-up current source at DF_IN.
Absolute Maximum Ratings
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameters
VIN, VBUS to GND
VPIN
Min.
Continuous
Pulsed, 100 ms Maximum Non-Repetitive
VOUT to GND(3)
EN, DF_IN, VIN_SEL, Other_VIN_AVA to GND
ISW
Maximum Continuous Switch Current per Channel
tPD
Total Power Dissipation at TA=25°C
TJ
Operating Junction Temperature
TSTG
Storage Junction Temperature
JA
Thermal Resistance, Junction-to-Ambient (1in. Square Pad of 2 oz. Copper)
ESD
Electrostatic Discharge
Capability
Human Body Model, JESD22-A114
Charged Device Model, JESD22-C101
Air Discharge (VIN, VBUS to GND)
IEC61000-4-2
System Level(5) Contact Discharge (VIN, VBUS to GND)
-1.4
-2.0
-0.3
-0.3
Max.
Unit
20
16.0
6.0
V
2
A
2.25
W
-40
+150
°C
-65
+150
°C
55(4)
°C/W
3
1.5
15
8
kV
Notes:
3. If external voltage of more than 10.5 V is applied to VOUT, the slew rate should be less than 1 V/ms from 10.5 V.
4. Measured using 2S2P JEDEC standard PCB.
5. System level ESD can be guaranteed by design.
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Truth Table
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VPIN
TA
Min.
Max.
VIN
Parameters
4.0
10.5
VBUS
4.0
6.5
Ambient Operating Temperature
-40
+85
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
Unit
V
°C
www.fairchildsemi.com
4
VIN=4 to 10.5 V, VBUS=4 to 6.5 V, TA=-40 to 85°C unless otherwise noted. Typical values are at VIN=VBUS=5 V,
EN=HIGH and TA=25°C.
Symbol
Parameters
Condition
Min.
Typ.
Max.
Unit
Basic Operation
VIN
VBUS
IQ
Input Voltage
Quiescent Current
On Resistance for VIN
RON
On Resistance for VBUS
4.0
10.5
V
4.0
6.5
V
IOUT=0 mA, EN=HIGH,
VIN or VBUS=5 V
55
120
μA
IOUT=0 mA, EN=5 V,
VIN and VBUS=GND
33
70
μA
VIN=8 V, IOUT=200 mA, TA=25°C
95
VIN=5 V, IOUT=200 mA, TA=25°C
95
VIN=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
70
VBUS=5 V, IOUT=200 mA, TA=25°C
70
VBUS=5 V, IOUT=200 mA,
TA=25°C to 85°C(6)
Input Logic High Voltage
VIN=4 V~10.5 V, VBUS=4 V ~ 6.5 V
VIL
Input Logic Low Voltage
VIN=4 V~10.5 V, VBUS=4 V ~ 6.5 V
REN_PD
Pull-Down Resistance at EN
mΩ
200
VBUS=6 V, IOUT=200 mA, TA=25°C
VIH
150
100
mΩ
140
1.15
V
0.52
V
707
1000
1360
kΩ
VIN or VBUS Rising
3.05
3.50
4.00
V
VIN or VBUS Falling
2.55
3.00
3.55
V
Protection
VUVLO
Under-Voltage Lockout
Threshold
VUVHYS
Under-Voltage Lockout
Hysteresis
0.5
VIN Rising Threshold
VOVLO
Over-Voltage Lockout Threshold
10.85
VIN Falling Threshold
VBUS Rising Threshold
Over-Voltage Lockout Hysteresis
13.45
11.5
6.52
VBUS Falling Threshold
VOVHYS
12.00
V
VIN
VBUS
7.50
V
V
8.32
V
7
V
0.5
V
0.5
V
TSDN
Thermal Shutdown Threshold
150
°C
TSDNHYS
Thermal Shutdown Hysteresis
20
°C
Reverse Current Blocking
IRCB
VIN or VBUS Current During RCB
VOUT=8 V, VIN or VBUS=GND
30
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Electrical Characteristics
μA
Dynamic Characteristics
tR
tF
tTRAN
tSD
VOUT Rise Time, VBUS(6,7)
(6,7)
VIN
VOUT Rise Time,
VOUT Fall Time(6,7)
(6,7)
Transition Delay
90
VIN=VBUS=5 V, RL=150 Ω, CL=4.7 μF,
TA=25°C
50
50
Selection Delay(6,7)
μs
1.4
ms
100
ms
50
μs
Notes:
6. This parameter is guaranteed by design and characterization; not production tested.
7. tSD/tTRAN/tR/tF are defined in Figure 5.
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
5
Figure 5. Transition Delay (VIN=VBUS=5 V)
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Timing Diagram
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6
Figure 6. VIN Quiescent Current (Iq) vs. Temperature
Figure 7. VBUS Quiescent Current (Iq) vs. Temperature
Figure 8. VIN Quiescent Current vs. Supply Voltage
Figure 9. VBUS Quiescent Current vs. Supply Voltage
Figure 10. VIN On Resistance (mΩ) vs. Temperature
Figure 11. VBUS On Resistance (mΩ) vs. Temperature
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Typical Characteristics
Figure 12. VIN On Resistance (mΩ) vs. Supply Voltage Figure 13. VBUS On Resistance (mΩ) vs. Supply Voltage
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
7
Figure 14. VIN_SEL Input Logic High & Low Voltage
vs. Temperature
Figure 15. EN Input Logic High & Low Voltage
vs. Temperature
Figure 16. DF_IN Logic High & Low Voltage
vs. Temperature
Figure 17. VIN_VULVO vs. Temperature
Figure 18. VBUS_VULVO vs. Temperature
Figure 19. VIN_VOVLO vs. Temperature
Figure 20. VBUS_VOVLO vs. Temperature
Figure 21. VOUT tR vs. Temperature
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Typical Characteristics (Continued)
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8
Figure 22. VOUT tF vs. Temperature
Figure 23.tTRAN vs. Temperature
Figure 24. Power Source Transition (VIN=VBUS=5 V,
EN=HIGH, VIN_SEL=LOWHIGHLOW,
COUT=4.7 µF, RL=150 Ω)
Figure 25.VIN On Response (VIN=GND5 V,
VBUS=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 26. VBUS On Response (VBUS=GND5 V,
VIN=EN=GND, COUT=4.7 µF, RL=150 Ω)
Figure 27.Off Response (VIN=VBUS=5 V, EN=HIGH,
VIN_SEL=LOHIGH or HIGHLOW, COUT=4.7 µF,
RL=150 Ω)
Figure 28. VIN Over-Voltage Protection Response
(VIN=5 V15 V, VBUS=5 V, EN=VIN_SEL=HIGH,
COUT=4.7 µF, RL=150 Ω)
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Typical Characteristics (Continued)
Figure 29.VBUS Over-Voltage Protection Response
(VBUS=5 V15 V, VIN=5 V, EN=HIGH,
VIN_SEL=LOW, COUT=4.7 µF, RL=150 Ω)
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9
The FPF3040 is a 20 V, 2 A-rated, Dual-Input SingleOutput (DISO) load switch with slew-rate-controlled,
low-on-resistance, based-on-N-channel MOSFET. The
FPF3040 input operating range is from 4 V to 6.5 V at
VBUS and from 4 V to 10.5 V at VIN. The internal circuitry
is powered from the highest voltage source among VIN,
VBUS, and EN.
VIN_SEL can be the status output to indicate which input
power source is used during EN is LOW. If VIN is used,
VIN_SEL shows high. If VBUS is used, VIN_SEL shows LOW.
The voltage level of HIGH signal is 5.3 V if any one of
VIN, VBUS or EN is higher than 5.3 V. The signal is
highest voltage among VIN, VBUS, and EN if none of
them is higher than 5.3 V.
Input Power Source Selection
Over-Voltage Protection (OVP)
Input power source can be selected by VIN_SEL and
DF_IN, respectively, depending on EN state. When EN
is HIGH, the input source is selected by VIN_SEL
regardless of DF_IN. If VIN_SEL is LOW, VBUS is selected.
If VIN_SEL is HIGH, VIN is selected.
FPF3040 has over-voltage protection at both VIN and
VBUS. If VIN or VBUS is higher than 12 V or 7.5 V,
respectively, the power switch is off until input voltage is
lower than the over-voltage trip level by hysteresis
voltage of 0.5 V.
Table 1. Input Power Selection by VIN_SEL
Reverse Power Supply for OTG
FPF3040 has a bi-directional switch so reverse power is
allowed for On-The-Go (OTG) operation. Even if both VIN
and VBUS are not available, reverse power can be also
supported if internal control circuitry is powered by EN.
EN VIN>UVLO VBUS>UVLO VIN_SEL DF_IN VOUT
HIGH
X
X
LOW
X
VBUS
HIGH
X
X
HIGH
X
VIN
Reverse-Current Blocking
When EN is LOW, the input source is selected by
DF_IN and the number of valid input sources. If only
one input source is valid, or more than UVLO, the
source is selected automatically, regardless of DF_IN,
to make charging path in case the battery is depleted. If
both VBUS and VIN have valid input sources, the input
source is selected by DF_IN. If DF_IN is LOW, VIN is
selected. If DF_IN is HIGH or floating, VBUS is selected.
DF_IN is biased HIGH with an internal 1 µA pull-up
current source.
Table 2.
FPF3040 supports reverse-current blocking during EN
LOW and an unselected channel.
Thermal Shutdown
During FPF3040 thermal shutdown, the power switch is
turned off if junction temperature reaches over 150°C to
avoid damage.
Wireless Charging System
FPF3040 can be used for an input power selector
supporting Travel Adaptor (TA) and Wireless Charging
(WC) with a single-input-based battery charger or Power
Management IC (PMIC), including a charging block as
shown in Figure 30. The system can recognize an input
power source change between 5 V TA and 5 V WC
without detection circuitry because FPF3040 has a
100 ms transition delay. OTG Mode can be supported
without an additional power path, such as a MOSFET.
Input Power Selection by DF_IN
EN VIN>UVLO VBUS>UVLO VIN_SEL DF_IN VOUT
LOW
YES
NO
HIGH
X
VIN
LOW
NO
YES
LOW
X
VBUS
LOW
YES
YES
LOW
Floating
VBUS
LOW
YES
YES
HIGH
LOW
VIN
LOW
NO
NO
X
X
Floating
FPF3040
Travel Adaptor
(5V)
VBUS
Wireless Charging
(5V)
VIN
PMIC
System
with
BAT Charger &
OTG Boost &
Power Path
VOUT
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Operation and Application Information
Li-Pol
BAT
VIN_SEL, Other_VIN_Ava
EN, VIN_SEL, DF_IN
Figure 30. Block Diagram of Input Power Selector for Wireless Charging System
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
10
0.03 C
2X
E
F
A
B
0.40
A1
BALL A1
INDEX AREA
(Ø0.20)
Cu Pad
D
0.40
(Ø0.30) Solder
Mask Opening
0.03 C
2X
RECOMMENDED LAND PATTERN
(NSMD PAD TYPE)
TOP VIEW
0.06 C
0.625
0.547
0.05 C
C
SEATING
PLANE
0.378±0.018
0.208±0.021
E
SIDE VIEWS
D
NOTES:
A. NO JEDEC REGISTRATION APPLIES.
0.005
B. DIMENSIONS ARE IN MILLIMETERS.
C A B
Ø0.260±0.02
16X
0.40
D
C
B
0.40
C. DIMENSIONS AND TOLERANCE
PER ASME Y14.5M, 1994.
D. DATUM C IS DEFINED BY THE SPHERICAL
CROWNS OF THE BALLS.
(Y) ±0.018
A
E. PACKAGE NOMINAL HEIGHT IS 586 MICRONS
±39 MICRONS (547-625 MICRONS).
F
1 2 3 4
(X) ±0.018
F. FOR DIMENSIONS D, E, X, AND Y SEE
PRODUCT DATASHEET.
BOTTOM VIEW
G. DRAWING FILNAME: MKT-UC016AArev2.
Figure 31. 1.8 mm x 2.0 mm Wafer-Level Chip-Scale Package (WLCSP), 16-Bump, 0.4 mm Pitch
Product
D
E
X
Y
FPF3040UCX
1.96 mm ±0.03 mm
1.76 mm ±0.03 mm
0.28 mm
0.38 mm
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
Package Description
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
11
FPF3040 — IntelliMAX™ 20V-Rated Dual Input Single Output Power-Source-Selector Switch
© 2012 Fairchild Semiconductor Corporation
FPF3040 • Rev. 2.4.0
www.fairchildsemi.com
12