FDMS7606 Dual N-Channel PowerTrench® MOSFET Q1: 30 V, 12 A, 11.4 mΩ Q2: 30 V, 22 A, 11.6 mΩ Features General Description Q1: N-Channel This device includes two specialized N-Channel MOSFETs in a Max rDS(on) = 11.4 mΩ at VGS = 10 V, ID = 11.5 A dual MLP package. The switch node has been internally Max rDS(on) = 15.7 mΩ at VGS = 4.5 V, ID = 10 A connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous Q2: N-Channel MOSFET (Q2) have been designed to provide optimal power Max rDS(on) = 11.6 mΩ at VGS = 10 V, ID = 12 A efficiency. Max rDS(on) = 17.2 mΩ at VGS = 4.5 V, ID = 9.5 A Applications RoHS Compliant Computing Communications General Purpose Point of Load Notebook Charger S2 S2 S2 G2 S2 5 S2 6 S2 7 S1/D2 D1 D1 D1 D1 G1 Bottom Top Pin1 Q2 4 D1 3 D1 2 D1 Q1 1 G1 G2 8 Power 56 MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID TJ, TSTG Units V V (Note 3) ±20 ±20 TC = 25 °C 12 22 -Continuous (Silicon limited) TC = 25 °C 41 39 -Continuous TA = 25 °C 11.51a 121b 50 60 -Pulsed PD Q2 30 -Continuous (Package limited) Single Pulse Avalanche Energy EAS Q1 30 (Note 4) 25 33 mJ Power Dissipation for Single Operation TA = 25°C 2.21a 2.51b Power Dissipation for Single Operation TA = 25°C 1.01c 1.01d Operating and Storage Junction Temperature Range A -55 to +150 W °C Thermal Characteristics Thermal Resistance, Junction to Ambient 571a 501b RθJA Thermal Resistance, Junction to Ambient 1251c 1201d RθJC Thermal Resistance, Junction to Case 4.6 4.7 RθJA °C/W Package Marking and Ordering Information Device Marking FDMS7606 Device FDMS7606 ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C Package Power 56 1 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET May 2011 Symbol Parameter Test Conditions Type Min 30 30 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V Q1 Q2 ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V Q1 Q2 1 1 μA IGSS Gate to Source Leakage Curent VGS = 20 V, VDS = 0 V VGS = ±20 V, VDS = 0 V Q1 Q2 100 ±100 nA 3.0 3.0 V V 16 20 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA Q1 Q2 ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25°C Q1 Q2 -6 -5.5 VGS = 10 V, ID = 11.5 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 11.5 A, TJ = 125°C Q1 9.2 12.6 11.8 11.4 15.7 14.7 VGS = 10 V, ID = 12 A VGS = 4.5 V, I= 9.5 A VGS = 10 V, ID = 12 A, TJ = 125°C Q2 9.7 12.8 12.3 11.6 17.2 15.4 VDD = 5 V, ID = 11.5 A VDD = 5 V, ID = 12 A Q1 Q2 53 47 Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 1050 947 1400 1260 pF Q1 Q2 295 191 395 255 pF Q1 Q2 32 131 50 200 pF 1.6 1.0 4.0 2.5 Ω Q1 Q2 7 6 14 12 ns Q1 Q2 3 3 10 10 ns Q1 Q2 18 19 33 34 ns Q1 Q2 3 3 10 10 ns Q1 Q2 16 19 22 27 nC Q1 Q2 8 10 11 15 nC Q1 Q2 3.2 2.6 nC Q1 Q2 2.0 4.2 nC rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1.0 1.0 2.1 1.9 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 0.2 0.2 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge VGS = 0V to 10 V Qg(TOT) Total Gate Charge VGS = 0V to 5 V Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C Q1 VDD = 15 V, ID = 11.5 A, RGEN = 6 Ω Q2 VDD = 15 V, ID = 12 A, RGEN = 6 Ω Q1 VDD = 15 V, ID = 11.5 A Q2 VDD = 15 V, ID = 12 A 2 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q1 Q2 Q2 0.76 0.87 0.75 0.85 1.2 1.2 1.2 1.2 V Q1 Q2 22 18 35 33 ns Q1 Q2 7 6 13 12 nC Drain-Source Diode Characteristics VSD VGS = 0 VGS = 0 Source-Drain Diode Forward Voltage VGS = 0 VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge V, IS = 2 A V, IS = 11.5 A V, IS = 2 A V, IS = 12 A (Note 2) (Note 2) (Note 2) (Note 2) Q1 IF = 11.5 A, di/dt = 100 A/s Q2 IF = 12 A, di/dt = 100 A/s Notes: 1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper a. 57 °C/W when mounted on a 1 in2 pad of 2 oz copper d. 120 °C/W when mounted on a minimum pad of 2 oz copper c. 125 °C/W when mounted on a minimum pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied 4. Q1: EAS of 25 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 13 A, VDD = 27 V, VGS = 10 V. Q2: EAS of 33 mJ is based on starting TJ = 25 oC, L = 0.3 mH, IAS = 15 A, VDD = 27 V, VGS = 10 V. ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C 3 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted 50 5 VGS = 4 V 40 ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V 30 VGS = 6 V VGS = 4.5 V 20 VGS = 3.5 V 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0.0 0.5 1.0 1.5 4 VGS = 4 V 3 2 VGS = 4.5 V 1 0 2.0 0 10 rDS(on), DRAIN TO 1.0 0.8 0 25 50 75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.2 50 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID = 11.5 A 24 16 TJ = 25 oC 8 100 125 150 TJ = 125 oC 2 TJ, JUNCTION TEMPERATURE (oC) 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature Figure 4. On-Resistance vs Gate to Source Voltage 50 50 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 40 32 ID = 11.5 A VGS = 10 V -25 30 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 -50 20 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 0.6 -75 VGS = 10 V VGS = 6 V VDS, DRAIN TO SOURCE VOLTAGE (V) 1.4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = 3.5 V 40 VDS = 5 V 30 TJ = 150 oC 20 TJ = 25 oC TJ = -55 oC 10 0 1.5 2.0 2.5 3.0 3.5 4.0 TJ = 150 oC 1 TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.001 0.0 4.5 VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C VGS = 0 V 10 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 4 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 2000 ID = 11.5 A VDD = 10 V 1000 Ciss 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 15 V 6 VDD = 20 V 4 Coss 100 2 0 0 3 6 9 12 15 10 0.1 18 1 Figure 7. Gate Charge Characteristics ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) 50 TJ = 25 oC 10 TJ = 100 oC TJ = 125 oC 0.01 0.1 1 10 40 VGS = 10 V 30 VGS = 4.5 V 20 10 0 25 40 Limited by Package o RθJC = 4.6 C/W 50 tAV, TIME IN AVALANCHE (ms) 125 150 Figure 10. Maximum Continuous Drain Current vs Case Temperature P(PK), PEAK TRANSIENT POWER (W) 500 10 100 μs 1 ms 10 ms THIS AREA IS LIMITED BY rDS(on) 100 ms SINGLE PULSE TJ = MAX RATED 1s 10s o RθJA = 125 C/W DC o TA = 25 C 0.01 0.01 100 o 60 0.1 75 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 1 30 Figure 8. Capacitance vs Drain to Source Voltage 20 1 0.001 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) ID, DRAIN CURRENT (A) Crss f = 1 MHz VGS = 0 V 0.1 1 10 o RθJA = 125 C/W 100 10 1 0.5 -4 10 100200 -3 10 -2 10 -1 10 1 100 10 1000 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C SINGLE PULSE Figure 12. Single Pulse Maximum Power Dissipation 5 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 125 C/W (Note 1c) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C 6 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted 5 VGS = 10 V VGS = 6 V ID, DRAIN CURRENT (A) 50 VGS = 4.5 V VGS = 4 V 40 VGS = 3.5 V 30 20 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 10 0 0.0 0.5 1.0 1.5 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 60 4 VGS = 3.5 V 3 VGS = 4 V 2 1 0 2.0 0 10 Figure 14. On-Region Characteristics rDS(on), DRAIN TO 1.0 0.8 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.2 32 ID = 12 A 28 24 20 TJ = 125 oC 16 12 TJ = 25 oC 8 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 17. On-Resistance vs Gate to Source Voltage 100 60 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 50 ID, DRAIN CURRENT (A) 60 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 36 4 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 16. Normalized On-Resistance vs Junction Temperature VDS = 5 V 40 30 TJ = 150 oC 20 TJ = 25 oC 10 TJ = -55 oC 0 50 40 1.4 -50 40 Figure 15. Normalized on-Resistance vs Drain Current and Gate Voltage ID = 12 A VGS = 10 V 0.6 -75 30 ID, DRAIN CURRENT (A) VDS, DRAIN TO SOURCE VOLTAGE (V) 1.6 20 VGS = 10 V VGS = 6 V VGS = 4.5 V 1 2 3 4 10 TJ = 150 oC TJ = 25 oC 1 TJ = -55 oC 0.1 0.01 0.0 5 0.2 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 18. Transfer Characteristics ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C VGS = 0 V Figure 19. Source to Drain Diode Forward Voltage vs Source Current 7 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted 2000 ID = 12 A Ciss 1000 8 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 15 V 4 VDD = 20 V Coss 100 2 50 0.1 0 0 5 10 15 20 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 21. Capacitance vs Drain to Source Voltage Figure 20. Gate Charge Characteristics 30 40 10 ID, DRAIN CURRENT (A) IAS, AVALANCHE CURRENT (A) Crss f = 1 MHz VGS = 0 V TJ = 25 oC TJ = 100 oC TJ = 125 oC VGS = 10 V 30 VGS = 4.5 V 20 Limited by Package 10 o RθJC = 4.7 C/W 1 0.001 0 0.01 0.1 1 10 40 25 50 75 100 125 150 o TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) Figure 23. Maximum Continuous Drain Current vs Case Temperature Figure 22. Unclamped Inductive Switching Capability 70 P(PK), PEAK TRANSIENT POWER (W) ID, DRAIN CURRENT (A) 500 100 μs 10 1 ms 1 10 ms THIS AREA IS LIMITED BY rDS(on) 0.1 100 ms 1s SINGLE PULSE TJ = MAX RATED 10s RθJA = 120 oC/W DC TA = 25 oC 0.01 0.01 0.1 1 10 100200 SINGLE PULSE o 10 1 0.5 -4 10 VDS, DRAIN to SOURCE VOLTAGE (V) RθJA = 120 C/W 100 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 24. Forward Bias Safe Operating Area ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C Figure 25. Single Pulse Maximum Power Dissipation 8 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZθJA 1 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 SINGLE PULSE 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 120 C/W (Note 1d) 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 26. Junction-to-Ambient Transient Thermal Response Curve ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C 9 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted A 5.0 0 .1 0 C 1 .2 7 B 2X 8 0.65 TYP 7 6 5 0.40 0 .6 3 0.25 0 2.67 6 .0 0.66 6.30 0.54 0 .9 2 PIN#1 QUADRANT 0.10 C 2 1 2X TOP VIEW 0 .6 5 (5X) 3 4 4 .0 0 RECOMMENDED LA ND PATTERN (OPTI ON 1 - FUSED LEADS 5,6,7) 1.27 8 0.10 C 7 6 0.65 TYP 5 0.40 0 .6 3 0 .8 0 MAX (0.20 ) 0.08 C 0.05 0.00 SIDE VI EW SEATING PL ANE 2.67 0.66 6.30 0.54 0 .9 2 1 2 3.85 3.75 3 0.48 (5X) 0.38 4 1 PIN #1 IDENT 2 4 .0 0 3 4 RECOMMENDED LA ND PATTERN (OPTI ON 2 - ISOLATED LEADS) 0.97 0.87 0.66 0.55 2 .7 2 2 .6 2 0.45 0.340 4 X 0.56 0.46 (5 X) 0.10 C A B 0.05 C 8 7 6 1.27 5 A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION, MO-229. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14. 5M, 1994 D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY E. DRAWING FILE NAME : MKT-MLP08Prev1 0 .2 0 3.81 B OTTOM VIEW ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C 10 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET Dimensional Outline and Pad Layout tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Fairchild’s Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Definition Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I54 ©2011 Fairchild Semiconductor Corporation FDMS7606 Rev.C 11 www.fairchildsemi.com FDMS7606 Dual N-Channel PowerTrench® MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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