STMICROELECTRONICS M74HC595

M54HC595
M74HC595
8 BIT SHIFT REGISTER WITH OUTPUT LATCHES (3 STATE)
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.
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.
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.
.
.
HIGH SPEED
fMAX = 55 MHz (TYP.) AT VCC = 5 V
LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS FOR QA TO QH
10 LSTTL LOADS FOR QH’
SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN.) FOR QA TO QH
|IOH| = IOL = 4 mA (MIN.) FOR QH’
BALANCED PROPAGATION DELAYS
tPLH = tPHL
WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE
WITH LSTTL 54/74LS595
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC595F1R
M74HC595M1R
M74HC595B1R
M74HC595C1R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC595 is a high speed CMOS 8-BIT
SHIFT REGISTERS/OUTPUT LATCHES (32
STATE) fabricated in silicon C MOS technology. It
has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage register. The storage register has 8 3-STATE outputs.
Separate clocks are provided for both the shift register and the storage register.
The shift register has a direct-overriding clear, serial
input, and serial output (standard) pins for cascading. Both the shift register and storage register use
positive-edge triggered clocks. If both clocks are
connected together, the shift register state will always be one clock pulse ahead of the storage register.
All inputs are equipped with protection circuits
against static discharge and transient excess voltage.
April 1993
NC =
No Internal
Connection
1/13
M54/M74HC595
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
INPUTS
OUTPUT
SI
SCK
SCLR
RCK
G
X
X
X
X
X
X
X
X
H
L
X
X
L
X
X
SHIFT REGISTER IS CLEARED
FIRST STAGE OF S.R. BECOMES ”L” OTHER STAGES
STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY
L
H
X
X
H
H
X
X
H
X
QA THRU QH OUTPUTS DISABLE
QA THRU QH OUTPUTS ENABLE
X
FIRST STAGE OF S.R. BECOMES ”H” OTHER STAGES
STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY
STATE OF S.R IS NOT CHANGED
X
X
X
X
S.R. DATA IS STORED INTO STORAGE REGISTER
X
X
X
X
STORAGE REGISTER STATE IS NOT CHANGED
X
X: DON’T CARE
LOGIC DIAGRAM
2/13
M54/M74HC595
LOGIC DIAGRAM
TIMING CHART
3/13
M54/M74HC595
PIN DESCRIPTION
IEC LOGIC SYMBOL
PIN No
SYMBOL
NAME AND FUNCTION
1, 2, 3, 4, 5,
6, 7, 15
9
QA to QH
Data Outputs
QH’
Serial Data Outputs
10
SCLR
Shift Register Clear
Input
11
SCK
Shift Register Clock
Input
13
14
G
SI
Output Enable Input
Serial Data Input
12
RCK
Storage Register Clock
Input
8
16
GND
V CC
Ground (0V)
Positive Supply Voltage
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Supply Voltage
Value
-0.5 to +7
Unit
V
VI
DC Input Voltage
-0.5 to VCC + 0.5
V
VO
IIK
DC Output Voltage
DC Input Diode Current
-0.5 to VCC + 0.5
± 20
V
mA
IOK
DC Output Diode Current
± 20
mA
IO
IO
DC Output Current Per Output Pin QA-QH
DC Output Current Per Output Pin QH’
± 35
± 25
mA
mA
DC VCC or Ground Current
± 70
mA
500 (*)
-65 to +150
mW
o
C
ICC or IGND
PD
Tstg
Power Dissipation
Storage Temperature
TL
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Supply Voltage
VI
Input Voltage
VO
Top
Output Voltage
Operating Temperature: M54HC Series
M74HC Series
Input Rise and Fall Time
tr, tf
4/13
VCC = 2 V
Value
2 to 6
Unit
V
0 to VCC
V
0 to VCC
-55 to +125
-40 to +85
0 to 1000
V
C
o
C
ns
VCC = 4.5 V
0 to 500
VCC = 6 V
0 to 400
o
M54/M74HC595
DC SPECIFICATIONS
Test Conditions
Symbol
VIH
V IL
Parameter
High Level Input
Voltage
Low Level Input
Voltage
Value
VCC
(V)
TA = 25 oC
54HC and 74HC
Min. Typ. Max.
2.0
1.5
1.5
1.5
4.5
6.0
3.15
4.2
3.15
4.2
3.15
4.2
High Level
Output Voltage
(for QH’ output)
0.5
0.5
0.5
4.5
1.35
1.35
1.35
2.0
4.5
6.0
4.5
V OH
VOL
High Level
Output Voltage
(for QA to QH
outputs)
Low Level Output
Voltage
(for QH’ output)
6.0
2.0
Low Level Output
Voltage
(for QA to QH
outputs)
IO=-5.2 mA
6.0
4.5
6.0
IO=-7.8 mA
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
II
VI =
IO=-20 µA
VIH
or
V IL IO=-4.0 mA
VI =
IO=-20 µA
VIH
or
V IL IO=-6.0 mA
4.5
4.5
6.0
VOL
1.8
1.8
V
1.8
1.9
2.0
1.9
1.9
4.4
5.9
4.5
6.0
4.4
5.9
4.4
5.9
4.18
4.31
4.13
4.10
5.68
1.9
5.8
2.0
5.63
1.9
5.60
1.9
4.4
4.5
4.4
4.4
5.9
4.18
6.0
4.31
5.9
4.13
5.9
4.10
5.68
5.8
5.63
Unit
V
2.0
6.0
V OH
-40 to 85 oC -55 to 125 oC
74HC
54HC
Min. Max. Min. Max.
V
V
5.60
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.0
0.1
0.1
0.1
0.17
0.18
0.26
0.26
0.33
0.33
0.40
0.40
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
0.0
0.1
0.1
0.1
0.17
0.18
0.26
0.26
0.33
0.33
0.40
0.40
VI = VCC or GND
±0.1
±1
±1
µA
VI =
IO= 20 µA
VIH
or
V IL IO= 4.0 mA
IO= 5.2 mA
VI =
IO= 20 µA
VIH
or
V IL IO= 6.0 mA
IO= 7.8 mA
V
V
Input Leakage
Current
6.0
IOZ
3 State Output
Off State Current
6.0
VI = VIH or VIL
VO = VCC or GND
±0.5
±5
±10
µA
ICC
Quiescent Supply
Current
6.0
VI = VCC or GND
4
40
80
µA
5/13
M54/M74HC595
AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)
Test Conditions
Symbol
Parameter
VCC
(V)
CL
(pF)
tTLH
tTHL
Output Transition
Time (Qn)
2.0
4.5
50
tTLH
tTHL
Output Transition
Time (QH’)
6.0
2.0
4.5
6.0
tPLH
tPHL
Propagation
Delay Time
(SCK - QH’)
tPLH
tPHL
Propagation
Delay Time
(SCLR - QH’)
tPLH
tPHL
Propagation
Delay Time
(RCK - Qn)
tPZL
tPZH
3 State Output
Enable Time
2.0
4.5
6.0
2.0
4.5
TA = 25 oC
54HC and 74HC
Min.
50
50
50
6
30
8
7
10
75
15
13
13
95
19
16
15
115
23
20
45
15
13
60
18
125
25
21
175
35
155
31
26
220
44
190
38
32
265
53
30
150
30
26
37
190
38
32
45
225
45
38
ns
ns
ns
ns
ns
190
38
32
240
48
41
285
57
48
ns
2.0
4.5
50
45
15
135
27
170
34
205
41
ns
13
60
23
175
29
220
35
265
20
17
35
30
44
37
53
45
30
15
14
150
30
26
190
38
32
225
45
38
Maximum Clock
Frequency
2.0
4.5
6.0
2.0
6/13
Max.
90
18
75
25
22
fMAX
Minimum Set-up
Time
(SI - CCK)
Min.
150
2.0
4.5
6.0
ts
Max.
75
15
2.0
4.5
6.0
3 State Output
Disable Time
Minimum Pulse
Width
(SCLR)
Max.
60
12
50
tPLZ
tPHZ
tW(L)
Typ.
25
7
15
60
20
17
4.5
6.0
Minimum Pulse
Width
(SCK, RCK)
Min.
Unit
6.0
2.0
4.5
6.0
RL = 1 KΩ
6.0
2.0
tW(H)
Value
-40 to 85 oC -55 to 125 oC
74HC
54HC
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
150
RL = 1 KΩ
50
RL = 1 KΩ
50
150
50
50
50
6.0
30
35
5.2
17
50
59
14
4.8
24
28
4.2
4
20
24
3.4
26
31
40
45
17
6
6
21
25
17
20
75
15
13
95
19
16
110
22
19
20
6
6
25
75
15
13
50
95
19
16
65
110
22
19
75
5
4
10
9
13
11
15
13
ns
ns
ns
ns
ns
ns
ns
M54/M74HC595
AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = tf = 6 ns)
Test Conditions
Symbol
ts
ts
th
tREM
Parameter
Minimum Set-up
Time
(SCK - RCK)
Minimum Set-up
Time
(SCRL - RCK)
Minimum Hold
Time
Minimum Clear
Remuval Time
o
VCC
(V)
CL
(pF)
2.0
4.5
50
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
TA = 25 C
54HC and 74HC
Min.
Max.
75
15
6
40
10
7
13
100
20
17
16
125
25
21
19
145
29
25
15
3
0
0
0
50
10
0
0
0
65
13
0
0
0
75
15
ns
9
10
11
10
13
10
pF
50
50
50
Input Capacitance
Power Dissipation
Capacitance
3
5
184
Min.
Max.
95
19
Min.
Max.
110
22
Unit
Typ.
35
8
6.0
CIN
CPD (*)
Value
-40 to 85 oC -55 to 125 oC
74HC
54HC
ns
ns
ns
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC
SWITCHING CHARACTERISTICS TEST WAVEFORM
WAVEFORM 1
WAVEFORM 2
7/13
M54/M74HC595
SWITCHING CHARACTERISTICS TEST WAVEFORM (continued)
WAVEFORM 3
WAVEFORM 4
WAVEFORM 5
WAVEFORM 6
GND
VCC
TEST CIRCUIT ICC (Opr.)
INPUT WAVEFORM
8/13
M54/M74HC595
Plastic DIP16 (0.25) MECHANICAL DATA
mm
DIM.
MIN.
a1
0.51
B
0.77
TYP.
inch
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.030
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
17.78
0.700
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
0.130
1.27
0.050
P001C
9/13
M54/M74HC595
Ceramic DIP16/1 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
20
0.787
B
7
0.276
D
E
3.3
0.130
0.38
e3
0.015
17.78
0.700
F
2.29
2.79
0.090
0.110
G
0.4
0.55
0.016
0.022
H
1.17
1.52
0.046
0.060
L
0.22
0.31
0.009
0.012
M
0.51
1.27
0.020
0.050
N
P
Q
10.3
7.8
8.05
5.08
0.406
0.307
0.317
0.200
P053D
10/13
M54/M74HC595
SO16 (Narrow) MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
MAX.
0.004
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45° (typ.)
D
9.8
E
5.8
10
0.385
6.2
0.228
0.393
0.244
e
1.27
0.050
e3
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.62
0.024
8° (max.)
P013H
11/13
M54/M74HC595
PLCC20 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
9.78
10.03
0.385
0.395
B
8.89
9.04
0.350
0.356
D
4.2
4.57
0.165
0.180
d1
2.54
0.100
d2
0.56
0.022
E
7.37
8.38
0.290
0.330
e
1.27
0.050
e3
5.08
0.200
F
0.38
0.015
G
0.101
0.004
M
1.27
0.050
M1
1.14
0.045
P027A
12/13
M54/M74HC595
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectonics.
 1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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13/13