M54/74HCT374 M54/74HCT534 OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HCT374 NON INVERTING - HCT534 INVERTING . . . . . . . HIGH SPEED fMAX = 62 MHz (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOL = IOH= 6 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS374/534 DESCRIPTION The M54/74HCT374, M54/74HCT534, are high speed CMOS OCTAL D-TYPE FLIP FLOP WITH 3STATE OUTPUTS fabricated with in silicon gate 2 C MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power comsuption. These8-bit D-type flip-flops are controlled by a clock input (CK) and an ouput enable input (OE). On the positive transition of the clock, the Q outputs will be set to the logic state that were setup at the D inputs (HCT374) or their complements (HCT534). While the OE input is low, the eight outputs will be in a normal logic state (high or low logic level), and while high level, the outputs will be in a high impedance state. The output control does not affect the internal operation of flip-flops. That is, the old data can B1R (Plastic Package) F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) ORDER CODES : M54HCTXXXF1R M74HCTXXXM1R M74HCTXXXB1R M74HCTXXXC1R be retained or the new data can be entered even while the outputs are off. The application engineer has a choice of combination of inverting and non-inverting outputs. The 3-state output configuration and the wide choice of outline make bus-organized systems simple. All inputs are equipped with protection circuits against static discharge and transient excess voltage. This integrated circuit has input and output characteristics that are fully compatible with 54/74 LSTTL logic families. M54/74HCT devices are designed to directly interface HSC2MOS systems with TTL and NMOS components. They are also plug in replacements for LSTTL devices giving a reduction of power consumption. PIN CONNECTION (top view) April 1993 1/13 M54/M74HCT374/534 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION (HCT374) PIN No SYMBOL 1 OE 2, 5, 6, 9, 12, 15, 16, 19 Q0 to Q7 3, 4, 7, 8, 13, 14, 17, 18 NAME AND FUNCTION PIN DESCRIPTION (HCT534) PIN No SYMBOL 1 OE 3 State outputs 2, 5, 6, 9, 12, 15, 16, 19 Q0 to Q7 3 State outputs D0 to D7 Data Inputs 3, 4, 7, 8, 13, 14, 17, 18 D0 to D7 Data Inputs 11 CLOCK Clock Input (LOW to HIGH, edge triggered) 11 CLOCK Clock Input (LOW to HIGH, edge triggered) 10 20 GND V CC Ground (0V) Positive Supply Voltage 10 20 GND VCC 3 State output Enable Input (Active LOW) NAME AND FUNCTION 3 State output Enable Input (Active LOW) Ground (0V) Positive Supply Voltage IEC LOGIC SYMBOLS HCT374 2/13 HCT534 M54/M74HCT374/534 TRUTH TABLE INPUTS OE H L L L CK X OUTPUTS D X Q (HC374) Z Q (HC534) Z X L H NO CHANGE L H NO CHANGE H L LOGIC DIAGRAMS HCT374 HCT534 3/13 M54/M74HCT374/534 ABSOLUTE MAXIMUM RATINGS Symbol Value Unit VCC VI Supply Voltage DC Input Voltage -0.5 to +7 -0.5 to VCC + 0.5 V V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK IOK DC Input Diode Current DC Output Diode Current ± 20 ± 20 mA mA IO DC Output Source Sink Current Per Output Pin ± 35 mA DC VCC or Ground Current ± 70 mA 500 (*) mW ICC or IGND Parameter PD Power Dissipation Tstg TL Storage Temperature Lead Temperature (10 sec) -65 to +150 300 o o C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oC to 85 oC RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage VI Input Voltage VO Top Output Voltage Operating Temperature: M54HC Series M74HC Series Input Rise and Fall Time (VCC = 4.5 to 5.5V) tr, tf 4/13 Value 4.5 to 5.5 Unit V 0 to VCC V 0 to VCC -55 to +125 -40 to +85 0 to 500 V C o C ns o M54/M74HCT374/534 DC SPECIFICATIONS Test Conditions Symbol Parameter VCC (V) VIH High Level Input Voltage 4.5 to 5.5 V IL Low Level Input Voltage 4.5 to 5.5 V OH High Level Output Voltage VOL II ICC ∆ICC Low Level Output Voltage Input Leakage Current Quiescent Supply Current Additional worst case supply current Value TA = 25 oC 54HC and 74HC Min. Typ. Max. 2.0 -40 to 85 oC -55 to 125 oC 74HC 54HC Min. Max. Min. Max. 2.0 0.8 4.5 VI = IO=-20 µA VIH or IO=-6.0 mA V IL 4.5 VI = IO= 20 µA VIH or IO= 6.0 mA V IL 2.0 0.8 V 0.8 4.4 4.5 4.4 4.4 4.18 4.31 4.13 4.10 Unit V V 0.0 0.1 0.1 0.1 0.17 0.26 0.33 0.4 VI = VCC or GND ±0.1 ±1 ±1 µA 5.5 VI = VCC or GND 4 40 80 µA 5.5 Per Input pin VI = 0.5V or V I = 2.4V Other Inputs at V CC or GND IO= 0 2.0 2.9 3.0 mA 5.5 V 5/13 M54/M74HCT374/534 AC ELECTRICAL CHARACTERISTICS (C L = 50 pF, Input t r = t f = 6 ns) Test Conditions TA = 25 oC 54HC and 74HC Value -40 to 85 oC -55 to 125 oC 74HC 54HC Symbol Parameter VCC (V) CL (pF) tTLH tTHL tPLH tPHL Output Transition Time Propagation Delay Time (CLOCK - Q, Q) 4.5 50 Typ. 7 Max. 12 4.5 50 20 30 38 45 4.5 150 25 38 48 57 tPZL tPZH Output Enable Time 4.5 4.5 50 150 RL = 1 KΩ RL = 1 KΩ 17 25 30 38 38 48 45 57 tPZL tPZH fMAX Output Disable Time Maximum CLock Frequency Minimum Pulse Width (CLOCK) Minimum Set-up Time Minimum Hold Time Input Capacitance 4.5 50 RL = 1 KΩ 16 28 35 42 4.5 50 4.5 50 15 19 23 4.5 50 15 19 23 4.5 50 0 0 0 10 10 10 tW(L) tW(H) ts th CIN COUT CPD (*) Out put Capacitance Power Dissipation Capacitance Min. 31 50 5 10 48 Min. Max. 15 25 Min. Max. 18 21 Unit ns ns ns ns ns ns ns ns ns ns pF pF pF (*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC/8 (per FLIP-FLOP) and CPD when N pcs of FLIP-FLOP operate, can be gained by following equation: CPD (TOTAL) = 38 + 18 x N (pF) 6/13 M54/M74HCT374/534 SWITCHING CHARACTERISTICS TEST WAVEFORM tPLH, tPHL, ts, th, tw fMAX tPLZ, tPZL The 1KΩ load resistors should be connected between outputs and VCC line and the 50pF load capacitors should be connected between outputsand GND line. All inputs except OE input should be connected to VCC line or GND line such that outputs will be in low logic level while OE input is held low. tPHZ, tPZH The 1KΩ load resistors and the 50pF load capacitors should be connected between each output and GND line. All inputs except OE input should be connected to VCC or GND line such that output will be in high logic level while OE input is held low. 7/13 M54/M74HCT374/534 TEST CIRCUIT ICC (Opr.) INPUT WAVEFORM IS THE SAME AS THAT IN CASE OF SWITCHING CHARACTERISTICS TEST. 8/13 M54/M74HCT374/534 Plastic DIP20 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.254 B 1.39 TYP. inch MAX. MIN. TYP. MAX. 0.010 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 D 25.4 1.000 E 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 F 7.1 0.280 I 3.93 0.155 L Z 3.3 0.130 1.34 0.053 P001J 9/13 M54/M74HCT374/534 Ceramic DIP20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 25 0.984 B 7.8 0.307 D E 3.3 0.5 e3 0.130 1.78 0.020 22.86 0.070 0.900 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 I 1.27 1.52 0.050 0.060 L 0.22 0.31 0.009 0.012 M 0.51 1.27 0.020 0.050 N1 P Q 4° (min.), 15° (max.) 7.9 8.13 5.71 0.311 0.320 0.225 P057H 10/13 M54/M74HCT374/534 SO20 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 2.65 0.10 0.104 0.20 a2 MAX. 0.004 0.007 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45° (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 M S 0.75 0.029 8° (max.) P013L 11/13 M54/M74HCT374/534 PLCC20 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 12/13 M54/M74HCT374/534 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use ascritical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13