ST1284-xxA8/T8 ® A.S.D.TM PARALLEL PORT SINGLE TERMINATION NETWORK WITH ±15kV ESD PROTECTION MAIN APPLICATIONS ECP/EPP Parallel Port termination on: Desktops Notebooks Workstations Servers PC Peripherals Set Top Box ■ ■ ■ ■ ■ ■ QSOP28 / TSSOP28 FEATURES One device for parallel port termination Compliant with IEEE1284 standard EMI / RFI noise filtering Highly integrated solution in 28 pin QSOP and TSSOP packages One single device provides the proper termination for 8 datalines, 1 strobe line, 4 control lines and 4 statuts lines In system ESD protection of ±15 kV (air discharge) as per IEC61000-4-2 level 4 ■ SCHEMATIC DIAGRAM ■ ■ ■ ■ ■ 1 2 3 Vcc Vcc R1 R1 R1 R2 C C C C COMPLIES WITH THE FOLLOWING ESD STANDARDS : - IEC61000-4-2 ±15kV (air discharge) ± 8kV (contact discharge) - MIL STD 883E - Method 3015-7 : Class 3 (human body model). July 2002 - Ed: 1B Vcc 28 27 Vcc Rs R1 C Rs 26 Vcc R1 4 25 Vcc R1 C Rs 5 DESCRIPTION The ST1284-xxA8/T8 is a highly integrated termination for enhanced high speed parallel ports. The integrated termination complies to the IEEE1284 Standard recommendations and government EMC compatibility requirements. It is built around two basic cells. The first one (Cell 1) provides line termination, EMI filtering and ESD protection for the Strobe and Datalines while the second one (Cell 2) provides EMI filtering and ESD protection for the Control and Status lines. In addition, ST1284-xxA8 provides extra protection against ESD. When tested according to IEC61000-4-2, they withstand ±8kV contact discharges and ±15kV air-discharges, thereby providing to the system the necessary robustness to meet up to level 4 of IEC61000-4-2, without the need for additional ESD protection components. Cells 1 and 2 are described in more detail in figures 1 and 2. Vcc 24 Vcc C R1 Rs 6 Rs 7 Vcc 23 Vcc R1 C Gnd C 22 R2 8 C Rs 9 Vcc 21 Vcc R1 Vcc 20 C R2 10 Rs 11 19 Vcc R1 C 18 Vcc C R2 12 13 17 Vcc C Rs R1 C Rs 14 C 16 Vcc Vcc R1 R2 15 C R1 R2 Rs C Code 01 4.7kΩ 4.7kΩ 33Ω 180pF Code 02 2.2kΩ 2.2kΩ 33Ω 220pF Code 03 1kΩ 5.1kΩ 39Ω 150pF ± 10% ± 10% ± 10% ± 20% Tolerance 1/7 ST1284-xxA8/T8 ABSOLUTE MAXIMUM RATINGS (Tamb Symbol 25°C) Value Unit ESD discharge IEC61000-4-2, air discharge ±16 kV ESD discharge IEC61000-4-2, contact discharge ±9 kV ESD discharge - MIL STD 883E - Method 3015-7 ±25 kV Vcc Supply voltage 5.5 V Pr Power rating per resistor 100 mW PP Package Power rating 1 W Top Operating temperature range 0 to +70 °C Tstg Storage temperature range -55 to +150 °C 125 °C VPP Tj Parameter Maximum operating junction temperature ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol Parameter Test condition Leakage current Vcc = 5.0V VBR Breakdown voltage IR = 1mA VF Forward voltage drop IF = 50mA IR Min. Typ. 6 Max. Unit 10 µA V 0.9 V BASIC CELL CONFIGURATIONS The ST1284-xxA8/T8 is built around the two basic cells described below which integrate the recommended IEEE1284 network and the ESD protection compatible with IEC61000-4-2 level 4 Fig. 1:Cell 1 for line termination, EMI filtering and ESD protection for the Datalines and Strobe signals. There are 9 of these cells inside the ST1284-xxA8/T8 Vcc Fig. 2: Cell 2 for EMI filtering and ESD protection of the Control and Status signals. There are 8 of these cells inside the ST1284-xxA8/T8 Vcc IEEE1284 Recommendation Rp IEEE1284 Recommendation Rp Rs C Gnd 2/7 C Gnd ST1284-xxA8/T8 FUNCTIONAL DIAGRAM ST1284-xxA8/T8 Vcc 17 Select in 16 Reset 1 15 Error 14 Autofeed 2 Vcc 28 27 20 1 1 Strobe 2 Bit 1 3 Bit 2 4 Bit 3 5 Bit 4 6 Bit 5 7 Bit 6 8 Bit 7 9 Bit 8 10 11 12 13 Acknowledge Busy Paper Out Select paper 3 4 5 6 7 9 11 13 14 8 10 Vcc 14 26 25 24 23 21 19 18 17 16 12 15 22 25 Gnd 13 APPLICATION INFORMATION The functional diagram here above presents a IEEE1284-A connector pinout and show how to connect the ST1284-xxA8/T8 in order to correctly terminate and filter the 17 signal lines. The IEEE1284-A connector is the PC standard for the host connection. Control and status lines (from 10 to 17) only require a pull-up resistor (Rp) and a filter capacitor (C). The data lines (from 2 to 9) and the STROBE (pin 1) also require a termination series resistor (Rs) in addition to the pull-up resistor and a filter capacitor. The Vcc is connected to pin 20 and the ground to pin 22. The ST1284-xxA8/T8 can be used with all 3 types of connectors defined in the IEEE1284 standard: - IEEE1284-A is a 25DB connector which is the PC standard for the host connection. - IEEE1284-B is a 36 pin, 0.085 inch centerline connector used on the peripheral device. - IEEE1284-C is a new 36 pin, 0.050 inch centerline connector which can be used for both host and peripherals. 3/7 ST1284-xxA8/T8 TECHNICAL INFORMATION FREQUENCY BEHAVIOR OF DATA AND STROBE SIGNALS Fig. A2: Typical frequency response curve for data and strobe signals. Fig. A1: Measurement conditions 0.00 dB - 5.00 +5V TRACKING GENERATOR SPECTRUM ANALYSER - 10.00 50Ω - 15.00 ST1284 50Ω Vg Vin - 20.00 Vout - 25.00 - 30.00 1 3 1284 - 01 1284 - 03 10 30 F (MHz) 100 1284 - 02 300 1,000 ESD PROTECTION In addition to the requirements of termination and EMC compatibility, computing devices are required to be tested for ESD susceptibility. This test is described in the IEC61000-4-2 and is already in place in Europe. This test requires that a device tolerates ESD events and remain operational without user intervention. The ST1284-xxA8/T8 is particularly optimized to perform ESD protection. ESD protection is based on the use of device which clamps at : Vouput = VBR + Rd .IPP This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the voltage very low at the output. Fig. A3: ST1284 ESD clamping behavior Rg S1 Rd VPP ESD Surge 4/7 VBR R S2 Rd Vinput Rload Voutput ST1284-xxA8/T8 VBR Device to be protected ST1284-xxA8/T8 To have a good approximation of the remaining voltages at both Vin and Vout stages, we give the typical dynamical resistance value Rd. By taking into account these following hypothesis : Rt>Rd, Rg>Rd and Rload>Rd, it gives these formulas: Rg .VBR + Rd .VPP Vinput = Rg Rt.VBR + Rd .Vinput Voutput = Rt The results of the calculation done for V PP =8kV, Rg=330Ω (IEC61000-4-2 standard), V BR=7V (typ.) and Rd = 1Ω (typ.) give: Vinput = 31.2 V Voutput = 7.95 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at the input side. This parasitic effect is not present at the output side due the low current involved after the resistance R. The measurements done here after show very clearly (Fig. A5) the high efficiency of the ESD protection : - no influence of the parasitic inductances on Vout stage - Voutput clamping voltage very close to VBR (positive strike) and -VF (negative strike) Fig. A4: Measurement conditions ESD SURGE ST1284 Vinput Voutput Fig. A5: Remaining voltage at the input and output of the device during a ±16kV ESD surge (IEC61000-4-2). 5/7 ST1284-xxA8/T8 PACKAGE MECHANICAL DATA QSOP28 (Plastic) DIMENSIONS REF. L A b S a1 e b1 E D 28 15 F 1 Millimeters Min. Max. Min. Max. A 1.55 1.75 0.061 0.069 a1 0.10 0.25 0.004 0.010 b 0.20 0.30 0.008 0.012 b1 0.18 0.25 0.007 0.010 D 9.80 9.98 0.386 0.393 F 5.79 6.20 0.228 0.244 e 14 Inches 0.64 typ. 0.025 typ. E 3.80 3.98 0.15 0.157 L 0.40 0.90 0.016 0.035 S 8° max 8° max PACKAGE MECHANICAL DATA TSSOP28 (Plastic) DIMENSIONS REF. Millimeters Min. Typ. A L A2 aaa b e A K A1 L1 D 28 c 15 E1 Inches Max. Min. Typ. Max. 1.200 0.047 0.150 0.002 0.006 A1 0.050 A2 0.800 b 0.190 0.300 0.007 0.012 c 0.090 0.200 0.003 0.008 D 9.600 9.700 9.800 0.378 0.382 0.386 E 6.200 6.400 6.600 0.244 0.252 0.260 E1 4.300 4.400 4.500 0.169 0.173 0.177 1.000 1.050 0.031 0.039 0.041 E 1 14 e L 0.650 0.450 L1 K aaa 6/7 0.026 0.600 0.750 0.018 0.024 0.029 1.000 0d 0.039 8d 0.100 0d 8d 0.004 ST1284-xxA8/T8 FOOTPRINT (QSOP28 / TSSOP28) dim in mm Package General Specifications 0.4 1.7 7.1 3.7 Lead Plating Tin-Lead Lead Plating Thickness 7 µm Min 20 µm Max Lead Material Copper Alloy Lead Coplanarity 0.102 mm (0.004") Body Material Molded Epoxy Resine Meets UL94V.0 standard 0.65 Order code Marking Package Weight Delivery mode Base qty ST1284-01A8 ST1284-01 QSOP28 0.147 g Tube 48 ST1284-01A8RL ST1284-01 QSOP28 0.147 g Tape & Reel 2500 ST1284-02A8 ST1284-02 QSOP28 0.147 g Tube 48 ST1284-02A8RL ST1284-02 QSOP28 0.147 g Tape & Reel 2500 ST1284-03A8RL ST1284-03 QSOP28 0.147 g Tape & Reel 2500 ST1284-01T8RL ST1284-01 TSSOP28 0.104 g Tape & Reel 2500 ST1284-02T8RL ST1284-02 TSSOP28 0.104 g Tape & Reel 2500 ST1284-03T8RL ST1284-03 TSSOP28 0.104 g Tape & Reel 2500 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All rights reserved. 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