STA505 40V 3.5A QUAD POWER HALF BRIDGE ■ MINIMUM INPUT OUTPUT PULSE WIDTH DISTORTION ■ 200mΩ RdsON COMPLEMENTARY DMOS OUTPUT STAGE ■ CMOS COMPATIBLE LOGIC INPUTS ■ THERMAL PROTECTION ■ THERMAL WARNING OUTPUT ■ UNDER VOLTAGE PROTECTION MULTIPOWER BCD TECHNOLOGY PowerSO36 ORDERING NUMBER: STA505 DESCRIPTION put stage of a stereo All-Digital High Efficiency (DDX™) amplifier capable to deliver 50 + 50W @ THD = 10% at Vcc 30V output power on 8Ω load and 80W @ THD = 10% at Vcc 36V on 8Ω load in single BTL configuration. STA505 is a monolithic quad half bridge stage in Multipower BCD Technology. The device can be used as dual bridge or reconfigured, by connecting CONFIG pin to Vdd pin, as single bridge with double current capability, and as half bridge (Binary mode) with half current capability. The input pins have threshold proportional to Ibias pin voltage. The device is particularly designed to make the outAUDIO APPLICATION CIRCUIT (Dual BTL) +VCC VCC1A IN1A 29 M3 IN1A +3.3V R57 10K IBIAS 23 CONFIG 24 PWRDN PWRDN 25 R59 10K FAULT 27 C58 100nF TH_WAR 26 17 16 M2 PROTECTIONS & LOGIC TRI-STATE M5 TH_WAR 28 IN1B 30 VDD 21 VDD 22 VSS 33 VSS 34 C53 100nF C60 100nF VCCSIGN IN2A IN2A GND-Reg GND-Clean IN2B GND1A 12 VCC1B REGULATORS GND1B 7 VCC2A IN2B GNDSUB 8 M15 31 20 M16 1 C32 1µF GND2A 4 VCC2B OUT2B OUT2B M14 5 C21 100nF C110 100nF C109 330pF R103 6 C33 1µF 3 R100 6 C99 100nF C23 470nF C101 100nF L113 22µH OUT2A 6 R98 6 L19 22µH OUT2A 2 32 R63 20 OUT1B 13 9 19 C52 330pF OUT1B M4 35 36 C20 100nF C31 1µF 11 C55 1000µF L18 22µH OUT1A 14 M17 VCCSIGN C30 1µF OUT1A 10 IN1B C58 100nF 15 R104 20 R102 6 C107 100nF C108 470nF C106 100nF C111 100nF L112 22µH GND2B D00AU1148B July 2003 1/9 STA505 PIN FUNCTION N° Pin 1 GND-SUB 35 ; 36 Vcc Sign 15 Vcc1A Positive Supply 12 Vcc1B Positive Supply 7 Vcc2A Positive Supply 4 Vcc2B Positive Supply 14 GND1A Negative Supply 13 GND1B Negative Supply 6 GND2A Negative Supply 5 GND2B Negative Supply 16 ; 17 OUT1A Output half bridge 1A 10 ; 11 OUT1B Output half bridge 1B 8;9 OUT2A Output half bridge 2A 2;3 OUT2B Output half bridge 2B 29 IN1A Input of half bridge 1A 30 IN1B Input of half bridge 1B 31 IN2A Input of half bridge 2A 32 IN2B Input of half bridge 2B 21 ; 22 Vdd 5V Regulator referred to ground 33 ; 34 Vss 5V Regulator referred to +Vcc 25 PWRDN 26 TRI-STATE 27 FAULT Fault pin advisor 24 CONFIG Configuration pin 28 TH-WAR Thermal warning advisor 19 GND-clean 23 IBIAS 18 NC 20 GND-Reg 2/9 Description Substrate ground Signal Positive Supply Stand-by pin Hi-Z pin Logical ground High logical state setting voltage Not connected Ground for regulator Vdd STA505 FUNCTIONAL PIN STATUS PIN NAME Logical value IC -STATUS FAULT 0 Fault detected (Short circuit, or Thermal ..) FAULT (*) 1 Normal Operation TRI-STATE 0 All powers in Hi-Z state TRI-STATE 1 Normal operation PWRDN 0 Low absorpion PWRDN 1 Normal operation THWAR 0 Temperature of the IC =130C THWAR(*) 1 Normal operation CONFIG 0 Normal Operation CONFIG(**) 1 OUT1A=OUT1B ; OUT2A=OUT2B (IF IN1A = IN1B; IN2A = IN2B) (*) : The pin is open collector. To have the high logic value, it needs to be pulled up by a resistor. (**): To put CONFIG = 1 means connect Pin 24 (CONFIG) to Pins 21, 22 (Vdd) PIN CONNECTION VCCSign 36 1 GND-SUB VCCSign 35 2 OUT2B VSS 34 3 OUT2B VSS 33 4 VCC2B IN2B 32 5 GND2B IN2A 31 6 GND2A IN1B 30 7 VCC2A IN1A 29 8 OUT2A TH_WAR 28 9 OUT2A FAULT 27 10 OUT1B TRI-STATE 26 11 OUT1B PWRDN 25 12 VCC1B CONFIG 24 13 GND1B IBIAS 23 14 GND1A VDD 22 15 VCC1A VDD 21 16 OUT1A GND-Reg 20 17 OUT1A GND-Clean 19 18 N.C. D01AU1273 3/9 STA505 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCE DC Supply Voltage (Pin 4,7,12,15) 40 V Vmax Maximum Voltage on pins 23 to 32 5.5 V 0 to 70 °C -40 to 150 °C Top Tstg, Tj Operating Temperature Range Storage and Junction Temperature THERMAL DATA Symbol Tj-case Parameter Min. Typ. Thermal Resistance Junction to Case (thermal pad) Max. Unit 2.5 °C/W TjSD Thermal shut-down junction temperature 150 °C Twarn Thermal warning temperature 130 °C thSD Thermal shut-down hysteresis 25 °C ELECTRICAL CHARACTERISTCS (Ibias = 3.3V; Vcc = 30V; T = 25°C unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit 200 270 mΩ 50 µA RdsON Power Pchannel/Nchannel MOSFET RdsON Id=1A; Idss Power Pchannel/Nchannel leakage Idss Vcc=35V gN Power Pchannel RdsON Matching Id=1A 95 % gP Power Nchannel RdsON Matching Id=1A 95 % Dt_s Low current Dead Time (static) see test circuit no.1; see fig. 1 Dt_d 10 20 ns High current Dead Time (dinamic) L=22µH; C = 470nF; Rl = 8 Ω Id=3.5A; see fig. 3 50 ns td ON Turn-on delay time Resistive load 100 ns td OFF Turn-off delay time Resistive load 100 ns tr Rise time Resistive load; as fig.1; 25 ns tf Fall time Resistive load; as fig. 1; 25 ns 36 V Ibias/2 +300mV V VCC Supply voltage operating voltage VIN-H High level input voltage VIN-L Low level input voltage IIN-H Hi level Input current Pin voltage = Ibias 1 µA IIN-L Low level input current Pin voltage = 0.3V 1 µA 4/9 9 Ibias/2 -300mV V STA505 ELECTRICAL CHARACTERISTCS (continued) Symbol Parameter Test conditions IPWRDN-H Hi level PWRDN pin input current Min. Ibias = 3.3V Typ. Max. Unit µA 35 VL Low logical state voltage VL (pin PWRDN, TRISTATE) (note 1) Ibias = 3.3V VH High logical state voltage VH (pin PWRDN, TRISTATE) (note 1) Ibias = 3.3V 1.7 V IVCCPWRDN Supply current from Vcc in Power Down PWRDN = 0 3 mA IFAULT Output Current pins FAULT -TH-WARN when FAULT CONDITIONS IVCC-hiz IVCC V Vpin = 3.3V 1 mA Supply current from Vcc in Tristate Tri-state=0 22 mA Supply current from Vcc in operation both channel switching) Input pulse width = 50% Duty; Switching Frequency = 384Khz; No LC filters; 80 mA IVCC-q Isc (short circuit current limit) (note 2) IOUT-SH Undervoltage protection threshold VOV 0.8 Output minimum pulse width 3.5 6 8 A 7 No Load 70 V 150 ns Notes: 1. The following table explains the VL, VH variation with Ibias Ibias VLmin VHmax Unit 2.7 0.7 1.5 V 3.3 0.8 1.7 V 5 0.85 1.85 V Note 2: If used in single BTL configuration, the device may be not short circuit protected LOGIC TRUTH TABLE (see fig. 2) TRI-STATE INxA INxB Q1 Q2 Q3 Q4 OUTPUT MODE 0 x x OFF OFF OFF OFF Hi-Z 1 0 0 OFF OFF ON ON DUMP 1 0 1 OFF ON ON OFF NEGATIVE 1 1 0 ON OFF OFF ON POSITIVE 1 1 1 ON ON OFF OFF Not used 5/9 STA505 Figure 1. Test Circuit. OUTxY Vcc (3/4)Vcc Low current dead time = MAX(DTr,DTf) (1/2)Vcc (1/4)Vcc +Vcc t DTr Duty cycle = 50% DTf M58 OUTxY INxY R 8Ω M57 + - V67 = vdc = Vcc/2 gnd D03AU1458 Figure 2. +VCC Q1 Q2 OUTxA INxA OUTxB Q3 INxB Q4 GND D00AU1134 Figure 3. High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B)) +VCC Duty cycle=A Duty cycle=B DTout(A) M58 DTin(A) Q2 Q1 Rload=8Ω OUTxA INxA Iout=3.5A M57 Q3 DTout(B) L67 22µ C69 470nF L68 22µ C71 470nF C70 470nF DTin(B) OUTxB INxB Iout=3.5A Q4 Duty cycle A and B: Fixed to have DC output current of 3.5A in the direction shown in figure 6/9 M64 M63 D00AU1162 STA505 Figure 4. Typical Single BTL Configuration to obtain 80W @ THD 10%, R L = 8Ω, VCC = 36V (note 1) IBIAS +3.3V GND-Clean GND-Reg 100nF X7R 10K 23 18 N.C. 22µH 100nF VDD VDD CONFIG TH_WAR TH_WAR PWRDN nPWRDN FAULT 10K IN1A IN1B IN1A IN2A IN2B IN1B VSS VSS 100nF X7R 16 20 11 10 21 VCCSIGN 100nF X7R VCCSIGN Add. GNDSUB OUT1A 100nF FILM OUT1A OUT1B 6.2 1/2W 22Ω 1/2W OUT1B OUT2A 22 9 24 OUT2A 330pF 8 6.2 1/2W OUT2B 28 3 25 15 26 12 29 30 31 7 4 8Ω 22µH VCC1A +36V 1µF X7R VCC1B 2200µF 63V VCC2A +36V 1µF X7R 32 33 100nF X7R 470nF FILM 100nF X7R 100nF FILM OUT2B 2 27 TRI-STATE 100nF 17 19 VCC2B GND1A 34 14 GND1B 35 13 36 6 1 5 GND2A GND2B D01AU1274 Note: 1. "A PWM modulator as driver is needed . In particular, this result is performed using the STA30X+STA50X demo board". Figure 5. Typical Quad Half bridge Configuration +VCC VCC1P IN1A 29 IBIAS 23 CONFIG 24 PWRDN 25 M3 IN1A +3.3V PWRDN R57 10K R59 10K C58 100nF TH_WAR FAULT 27 26 16 M2 PROTECTIONS & LOGIC M5 28 IN1B 30 C58 100nF C53 100nF C60 100nF VDD 21 22 VSS 33 VSS 34 VCCSIGN IN2A GND-Reg GND-Clean IN2B PGND1P 12 VCC1N C51 1µF REGULATORS 13 7 C41 330pF PGND1N VCC2P C71 100nF R51 6 C81 100nF C61 100nF OUTNL OUTNL M4 R41 20 R42 20 C42 330pF C72 100nF R52 6 C82 100nF IN2B GNDSUB 9 36 M15 31 20 19 M16 1 OUTPR 6 PGND2P 4 VCC2N 3 2 32 OUTPR C52 1µF 5 C43 330pF PGND2N D03AU1474 C73 100nF R53 6 C83 100nF C62 100nF OUTNR OUTNR M14 R43 20 C44 330pF R66 5K R67 5K L14 22µH R44 20 R64 5K R65 5K L13 22µH 8 35 R62 5K R63 5K L12 22µH M17 VCCSIGN IN2A 14 10 IN1B VDD OUTPL OUTPL 11 R61 5K L11 22µH 17 TRI-STATE TH_WAR 15 C74 100nF R54 6 C84 100nF R68 5K C31 820µF C21 2200µF C91 1µF C32 820µF C92 1µF C33 820µF C93 1µF C34 820µF C94 1µF For more information refer to the application notes AN1456 and AN1661 7/9 STA505 DIM. A A2 A4 A5 a1 b c D D1 D2 E E1 E2 E3 E4 e e3 G H h L N s MIN. 3.25 mm TYP. 0.8 MAX. 3.5 3.3 1 MIN. 0.128 0.075 0.38 0.32 16 9.8 0 0.008 0.009 0.622 0.37 14.5 11.1 2.9 6.2 3.2 0.547 0.429 0.031 0.2 0 0.22 0.23 15.8 9.4 5.8 2.9 0.8 OUTLINE AND MECHANICAL DATA 0.003 0.015 0.012 0.630 0.38 0.039 0.57 0.437 0.114 0.244 1.259 0.228 0.114 0.65 11.05 0 15.5 MAX. 0.138 0.13 0.039 0.008 1 13.9 10.9 inch TYP. 0.026 0.435 0.075 0 15.9 0.61 1.1 1.1 0.031 10˚ (max) 8˚ (max) 0.003 0.625 0.043 0.043 PowerSO36 (SLUG UP) (1) “D and E1” do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15mm (0.006”) (2) No intrusion allowed inwards the leads. 7183931 8/9 STA505 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2003 STMicroelectronics - All Rights Reserved DDX is a trademark of Apogee tecnology inc. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 9/9