STB70NFS03L N - CHANNEL 30V - 0.008Ω - 70A D2PAK STripFET MOSFET PLUS SCHOTTKY RECTIFIER PRELIMINARY DATA MAIN PRODUCT CHARACTERISTICS MOSFET SCHOTTKY V DSS R DS(on ) ID 30V <0.01Ω 70A IF (A V) V RRM V F(M AX) 3A 30V 0.51V 3 1 D2PAK TO-263 (suffix ”T4”) DESCRIPTION: This product associates a Power MOSFET of the third generation of ST Microelectronics unique ”Single Feature Size” strip-based process and a low drop Schottky diode. The transistor shows the best trade-off between on-resistance and gate charge. Used as low side in buck regulators, the product is the best solution in terms of conduction losses and space saving. INTERNAL SCHEMATIC DIAGRAM MOSFET ABSOLUTE MAXIMUM RATINGS Symbol Valu e Unit Drain-source Voltage (VGS = 0) 30 V V DGR Drain- gate Voltage (RGS = 20 kΩ) 30 V V GS Gate-source Voltage VDS Parameter ± 22 V ID Drain Current (continuous) at Tc = 25 o C 70 A ID Drain Current (continuous) at Tc = 100 oC 50 A Drain Current (pulsed) 280 A IDM(•) P t ot T stg Tj o Total Dissipation at Tc = 25 C 100 W Derating Factor 0.67 W/ oC Storage Temperature Max. Operating Junct ion Temperature -65 to 175 o C 175 o C (•) Pulse width limited by safe operating area SCHOTTKY ABSOLUTE MAXIMUM RATINGS Symb ol V RRM I F(RMS) Valu e Un it Repetitive Peak Reverse Voltage Parameter 30 V RMS F orward Current 20 A 3 A 75 A 10000 V/µs I F (AV) Average F orward Current I FSM Surge Non Repetitive F orward Current dv/dt Critical Rate Of Rise O f Reverse Voltage April 2000 T L =125 o C δ =0.5 tp= 10 ms Sinusoidal 1/6 STB70NFS03L THERMAL DATA R thj -case R thj -amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature F or Soldering Purpose o 1.5 62.5 175 o C/W C/W o C ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage V GS = ± 20 V Current (VDS = 0) Min. Typ. Max. 30 Unit V T c =125 oC 1 10 µA µA ± 100 nA Max. Unit ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On V GS = 10 V Resistance V GS = 5 V I D(o n) On State Drain Current Min. Typ. 1 ID = 35 A I D = 18 A V 0.008 0.015 0.01 0.018 70 V DS > ID(o n) x R DS(on )ma x V GS = 10 V Ω Ω A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/6 Parameter Forward Transconductance Test Con ditions V DS > ID(o n) x R DS(on )ma x Input Capacitance V DS = 25 V Output Capacitance Reverse T ransfer Capacitance f = 1 MHz I D =35 A V GS = 0 Min. Typ. Max. Unit 40 S 1470 490 110 pF pF pF STB70NFS03L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 15 V ID = 35 A R G = 4.7 Ω V GS = 10 V (Resistive Load, see fig. 3) 20 350 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V 35 5 10 45 nC nC nC Typ. Max. Unit I D = 46 A V GS = 10 V ns ns SWITCHING OFF Symbo l t d(of f) tf Parameter Off-voltage Rise T ime Fall T ime Test Con ditions Min. 35 65 V DD = 24 V I D = 35 A V GS = 10 V R G = 4.7 Ω (Resistive Load, see fig. 3) ns ns SOURCE DRAIN DIODE Symbo l Parameter ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage t rr Q rr I RRM Reverse Time Reverse Charge Reverse Current Test Con ditions I SD = 70 A Min. Typ. V GS = 0 Max. Unit 70 280 A A 1.5 V Recovery I SD = 70 A di/dt = 100 A/µs T j = 150 o C V DD = 15V Recovery (see test circuit, figure 5) 70 ns 105 nC Recovery 2.4 Α (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area SCHOTTCKY STATIC ELETTRICAL CHARACTERISTICS Symbo l I R (∗) V F(∗) Parameter Reversed Current Test Con ditions o Leakage T J= 25 C T J= 125 oC Forward Voltage drop T J= 25 oC T J= 125 oC Min. Typ. Max. Unit V R =30V V R=30V 0.03 0.2 100 mA mA I F =3A I F =3A 0.38 0.51 0.46 V V 3/6 STB70NFS03L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STB70NFS03L TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.4 0.393 0.409 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 D C2 A2 A C DETAIL”A” DETAIL ”A” A1 B2 E B G L2 L L3 P011P6/E 5/6 STB70NFS03L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6