STMICROELECTRONICS STD1HNC60

STD1HNC60
N-CHANNEL 600V - 4Ω - 2A - IPAK/DPAK
PowerMesh™II MOSFET
TYPE
STD1HNC60
■
■
■
■
■
VDSS
RDS(on)
ID
600 V
<5Ω
2A
TYPICAL RDS(on) = 4 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
NEW HIGH VOLTAGE BENCHMARK
GATE CHARGE MINIMIZED
DESCRIPTION
The PowerMESH™II is the evolution of the first
generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area
figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate
charge and ruggedness.
3
2
3
1
1
DPAK
TO-252
IPAK
TO-251
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITH MODE POWER SUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVER
■
ABSOLUTE MAXIMUM RATINGS
Symbol
VDS
VDGR
VGS
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
600
V
Drain-gate Voltage (RGS = 20 kΩ)
600
V
Gate- source Voltage
±30
V
ID
Drain Current (continuos) at TC = 25°C
2
A
ID
Drain Current (continuos) at TC = 100°C
1.3
A
8
A
Total Dissipation at TC = 25°C
50
W
IDM
(1)
PTOT
Drain Current (pulsed)
Derating Factor
0.4
W/°C
dv/dt
Peak Diode Recovery voltage slope
3.5
V/ns
Tstg
Storage Temperature
–65 to 150
°C
150
°C
Tj
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
(1)ISD ≤ 2A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX
.
February 2001
1/9
STD1HNC60
THERMAL DATA
Rthj-case
Thermal Resistance Junction-case Max
2.5
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
100
°C/W
Rthj-sink
Thermal Resistance case-sink Typ
1.5
°C/W
Maximum Lead Temperature For Soldering Purpose
275
°C
Tl
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
Unit
2
A
120
mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)
OFF
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Test Conditions
Min.
Typ.
Max.
600
Unit
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
1
µA
VDS = Max Rating, TC = 125 °C
50
µA
Gate-body Leakage
Current (VDS = 0)
VGS = ±30V
±100
nA
V
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250µA
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 1 A
ID(on)
On State Drain Current
VDS > ID(on) x RDS(on)max,
VGS = 10V
Min.
Typ.
Max.
Unit
2
3
4
V
4
5
Ω
2
A
DYNAMIC
Symbol
gfs (1)
2/9
Parameter
Forward Transconductance
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer
Capacitance
Test Conditions
VDS > ID(on) x RDS(on)max,
ID = 1A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
Typ.
Max.
Unit
2
S
228
pF
40
pF
6
pF
STD1HNC60
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
td(on)
tr
Turn-on Delay Time
Rise Time
VDD = 300V, ID = 1 A
RG = 4.7Ω VGS = 10V
(see test circuit, Figure 3)
9
8.5
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 480V, ID = 2 A,
VGS = 10V
11.3
2.8
5
15.5
nC
nC
nC
Typ.
Max.
Unit
ns
ns
SWITCHING OFF
Symbol
tr(Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
VDD = 480V, ID = 2 A,
RG = 4.7Ω, VGS = 10V
(see test circuit, Figure 5)
18
9
27
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
ISD
ISDM (2)
VSD (1)
Parameter
Test Conditions
Min.
Typ.
Source-drain Current
Source-drain Current (pulsed)
Forward On Voltage
ISD = 2 A, VGS = 0
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
ISD = 2A, di/dt = 100A/µs, VDD
= 100V, Tj = 150°C
(see test circuit, Figure 5)
IRRM
Reverse Recovery Current
Max.
Unit
2
A
8
A
1.6
V
480
ns
1032
nC
4.3
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
Safe Operating Area
Thermal Impedence
3/9
STD1HNC60
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/9
STD1HNC60
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STD1HNC60
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STD1HNC60
TO-252 (DPAK) MECHANICAL DATA
mm
DIM.
MIN.
TYP.
inch
MAX.
MIN.
TYP.
MAX.
A
2.20
2.40
0.087
0.094
A1
0.90
1.10
0.035
0.043
A2
0.03
0.23
0.001
0.009
B
0.64
0.90
0.025
0.035
B2
5.20
5.40
0.204
0.213
C
0.45
0.60
0.018
0.024
C2
0.48
0.60
0.019
0.024
D
6.00
6.20
0.236
0.244
E
6.40
6.60
0.252
0.260
G
4.40
4.60
0.173
0.181
H
9.35
10.10
0.368
0.398
L2
L4
V2
0.8
0.60
0
o
0.031
1.00
8
o
0.024
0
o
0.039
0o
P032P_B
7/9
STD1HNC60
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
2.4
0.086
MAX.
0.094
0.043
A
2.2
A1
0.9
1.1
0.035
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
0.95
0.037
C
0.45
0.6
0.017
0.023
C2
0.48
0.6
0.019
0.023
D
6
6.2
0.236
0.244
E
6.4
6.6
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
L2
0.8
0.047
1
0.031
0.039
A1
C2
A3
A
C
H
B
B3
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B6
L2
L1
0068771-E
8/9
STD1HNC60
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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