STD2NC60 N-CHANNEL 600V - 3.3Ω - 2A DPAK / IPAK PowerMesh™II MOSFET ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID STD2NC60 600V < 3.6Ω 2A TYPICAL RDS(on) = 3.3Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 3 2 1 1 DPAK DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. IPAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVERS ■ ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 600 V Drain-gate Voltage (RGS = 20 kΩ) 600 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 2 A ID Drain Current (continuos) at TC = 100°C 1.3 A IDM (●) PTOT Drain Current (pulsed) 8 A Total Dissipation at TC = 25°C 60 W 0.48 W/°C Derating Factor dv/dt(1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature 4 V/ns –65 to 150 °C 150 °C (•)Pulse width limited by safe operating area (1)ISD ≤2A, di/dt ≤100A/µs, VDD ≤ V (BR)DSS, T j ≤ T JMAX. January 2001 1/9 STD2NC60 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max Rthj-amb Tl 2 °C/W Thermal Resistance Junction-ambient Max 100 °C/W Maximum Lead Temperature For Soldering Purpose 275 °C AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 2 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 80 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V V(BR)DSS Min. Typ. Max. 600 Unit V VDS = Max Rating, TC = 125 °C 1 µA 50 µA ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 1.5 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 3.3 3.6 Ω 2 A DYNAMIC Symbol gfs (1) 2/9 Parameter Forward Transconductance Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 1.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 1.2 2 S 400 pF 57 pF 7 pF STD2NC60 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. Typ. Max. Unit VDD = 300V, ID = 1.5A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) 13 ns 9 ns VDD = 480V, ID = 3A, VGS = 10V 15 22 nC 6.2 nC 5.6 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 480V, ID = 3A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. 11 Unit ns 13 ns 18 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 3A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 3A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 2 A 8 A 1.6 V 500 ns 2.1 µC 8.5 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/9 STD2NC60 Output Characteristics Tranfer Characteristics Tranconductance Static Drain-Source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD2NC60 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STD2NC60 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD2NC60 TO-251 (IPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. 2.4 0.086 MAX. 0.094 0.043 A 2.2 A1 0.9 1.1 0.035 A3 0.7 1.3 0.027 0.051 B 0.64 0.9 0.025 0.031 B2 5.2 5.4 0.204 0.212 B3 0.85 B5 0.033 0.3 0.012 B6 0.95 0.037 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 15.9 16.3 0.626 0.641 L 9 9.4 0.354 0.370 L1 0.8 1.2 0.031 L2 0.8 0.047 1 0.031 0.039 A1 C2 A3 A C H B B3 = 1 = 2 G = = = E B2 = 3 B5 L D B6 L2 L1 0068771-E 7/9 STD2NC60 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 L4 V2 0.8 0.60 0 o 0.031 1.00 8 o 0.024 0 o 0.039 0o P032P_B 8/9 STD2NC60 Information furnished is believed to be accurate and reliable. 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