STMICROELECTRONICS STG3680QTR

STG3680
LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
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HIGH SPEED:
tPD = 0.3ns (TYP.) at VCC = 3.0V
tPD = 0.4ns (TYP.) at VCC = 2.3V
ULTRA LOW POWER DISSIPATION:
ICC = 0.2µA (MAX.) at TA = 85°C
LOW "ON" RESISTANCE VIN = 0V:
RON-S1 = 0.5Ω (MAX. TA = 25°C) at VCC=2.7V
RON-S2 = 0.8Ω (MAX. TA = 25°C) at VCC=2.7V
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY
4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT
at VCC = 2.3 to 3.0V
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
DESCRIPTION
The STG3680 is an high-speed CMOS DUAL
ANALOG S.P.D.T. (Single Pole Dual Throw)
SWITCH or DUAL 2:1 Multiplexer/Demultiplexer
Bus Switch fabricated in silicon gate C2MOS
technology. It is designed to operate from 1.65V to
4.3V, making this device ideal for portable
applications.
It offers very low ON-Resistance (<0.5Ω 1S1 and
2S1 channels; <0.8Ω 1S2 and 2S2 channels) at
VCC=2.7V. The nIN inputs are provided to control
the switches. The switches nS1 are ON (they are
QFN
ORDER CODES
PACKAGE
T&R
QFN
STG3680QTR
connected to common Ports Dn) when the nIN
input is held high and OFF (high impedance state
exists between the two ports) when nIN is held
low; the switches nS2 are ON (they are connected
to common Ports Dn) when the nIN input is held
low and OFF (high impedance state exists
between the two ports) when IN is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s available in the
commercial temperature range in the QFN
package.
PIN CONNECTION
May 2004
Rev. 3
1/11
STG3680
Figure 1: Input Equivalent Circuit
Table 1: Pin Description
QFN
PIN N°
SYMBOL
NAME AND
FUNCTION
1, 9
2, 10
4, 12
3, 11
5,7,8,13,15,16
6
14
1IN, 2IN
1S1 to 2S1
1S2 to 2S2
D1, D2
NC
GND
VCC
Controls
Independent Channels
Common Channels
Not Connected
Ground (0V)
Positive Supply
Voltage
Table 2: Truth Table
IN
SWITCH S1
SWITCH S2
H
L
ON
OFF(*)
OFF(*)
ON
(*) High Impedance
Table 3: Absolute Maximum Ratings
Symbol
VCC
Parameter
Supply Voltage
VI
DC Input Voltage
VIC
DC Control Input Voltage
VO
DC Output Voltage
IIKC
Value
-0.5 to 4.6
Unit
V
-0.5 to VCC + 0.5
V
-0.5 to 4.6
V
-0.5 to VCC + 0.5
V
DC Input Diode Current on control pin (VIN < 0V)
− 50
mA
IIK
DC Input Diode Current (VIN < 0V)
± 50
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 300
mA
IOP
DC Output Current Peak (pulse at 1ms, 10% duty cycle)
± 500
mA
ICC or IGND DC VCC or Ground Current
Power Dissipation at Ta=70°C (1)
PD
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
± 100
mA
1120
mW
-65 to 150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
(1) Derate above 70°C: by 18.5mW/°C.
Table 4: Recommended Operating Conditions
Symbol
VCC
Parameter
Unit
V
Input Voltage
0 to VCC
V
VIC
Control Input Voltage
0 to 4.3
V
VO
Output Voltage
Top
Operating Temperature
VI
dt/dv
Input Rise and Fall Time Control Input
1) Truth Table guaranteed: 1.2V to 4.3V.
2/11
Value
1.65 to 4.3
Supply Voltage (note 1)
0 to VCC
V
-55 to 125
°C
VCC= 1.65V to 2.7V
0 to 20
VCC= 3.0V to 4.3V
0 to 10
ns/V
STG3680
Table 5: DC Specifications
Test Conditions
Symbol
Parameter
Value
TA = 25°C
VCC
(V)
Min.
Typ.
-40 to 85°C
Max.
VIH
High Level
1.65-1.95
0.65VCC
Input Voltage 2.3-2.5
1.4
2.7-3.0
1.4
3.3
1.5
3.6
1.7
4.3
2.2
VIL
Low Level
1.65-1.95
Input Voltage 2.3-2.5
2.7-3.6
3.3
3.6
4.3
RON-S1 Switch
4.3
ON-S1
3.0
Resistance
VS=0V to VCC
2.7
(1)
IS=100mA
2.3
1.8
1.65
RON-S2 Switch
4.3
ON-S2
3.0
Resistance
VS=0V to VCC
2.7
(1)
IS=100mA
2.3
1.8
1.65
∆RON ON Resist.
Match
VS=1.5V
between
2.7
IS=100mA
channels
(1, 2)
RFLAT ON
4.3
Resistance
VS=1.5V
3.0
FLATNESS
IS=100mA
2.7
(3)
2.3
1.65
VS=0.8V
IS=100mA
IOFF
IIN
ICC
OFF State
Leakage
Current
(nSn), (Dn)
Input Leak.
Current
Quiescent
Supply
Current (1)
0.40
0.40
0.40
0.50
0.70
0.80
0.40
0.50
0.50
0.50
0.50
1.3
0.80
0.80
0.80
2
4.0
4.0
0.50
0.50
0.50
0.80
3.0
3.0
Min.
Max.
-55 to 125°C
Min.
0.65VCC
0.65VCC
1.4
1.4
1.5
1.7
2.2
1.4
1.4
1.5
1.7
2.2
0.40
0.50
0.50
0.50
0.50
1.3
0.80
0.80
0.80
2
5.0
5.0
0.60
0.60
0.60
0.80
4.0
4.0
Max.
V
0.40
0.50
0.50
0.50
0.50
1.3
V
Ω
Ω
Ω
0.06
0.07
Unit
0.15
0.15
Ω
4.3
VS=0.3 or 4V
±10
± 100
nA
0 - 4.3
VIN= 0 to 3.6V
±0.1
±1
µA
1.65-4.3
VIN=VCC or
GND
±0.05
±0.2
±1
µA
Note 1: Guaranteed by design
Note 2: ∆RON = RON(MAX) - RON(MIN).
Note 3: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified
analog signal ranges.
3/11
STG3680
Table 6: AC Electrical Characteristics (CL = 35pF, R L = 50Ω, tr = tf ≤ 5ns)
Test Condition
Symbol
Parameter
tPLH, tPHL Propagation Delay
tON
tOFF
tD
Q
TURN-ON time
TURN-OFF time
Break Before Make
Time Delay
Charge injection
Value
TA = 25°C
VCC
(V)
Min.
Typ.
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
VI=OPEN
0.45
0.40
0.30
0.30
VS=0.8V
70
2.3-2.7
VS=1.5V
30
50
60
3.0-3.6
VS=1.5V
30
50
60
50
60
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
3.6-4.3
VS=1.5V
30
VS=0.8V
45
2.3-2.7
VS=1.5V
25
30
40
3.0-3.6
VS=1.5V
25
30
40
3.6-4.3
VS=1.5V
25
30
40
CL=35pF
RL= 50Ω
VS=1.5V
2
2
2
Max.
ns
1.65-1.95
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
1.65-1.95
2.3-2.7
3.0-3.6
3.6-4.3
ns
ns
15
15
15
CL= 100pF
RL= 1MΩ
VGEN= 0V
RGEN= 0Ω
Unit
ns
200
200
200
pC
Table 7: Analog Switch Characteristics (CL = 5pF, RL = 50Ω, TA = 25°C)
Test Condition
Symbol
Parameter
Off Isolation (1)
1.65-4.3
Xtalk
Crosstalk
1.65-4.3
THD
Total Harmonic
Distortion
2.3-4.3
BW
-3dB Bandwidth
1.65-4.3
CIN
Control Pin Input
Capacitance
Sn Port Capacitance
D Port Capacitance when
Switch is Enabled
CSn
CD
TA = 25°C
VCC
(V)
OIRR
Value
Min.
VS= 1VRMS
f= 100KHz
VS= 1VRMS
f= 100KHz
RL= 600Ω
VIN= 2VPP
f= 20Hz to 20kHz
RL= 50Ω
Max.
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
-64
dB
-54
dB
0.03
%
50
MHz
5
3.3
f= 1MHz
37
f= 1MHz
84
3.3
Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input at off switch
4/11
Typ.
-40 to 85°C
pF
STG3680
Figure 2: ON Resistance
Figure 3: OFF Leakage
Figure 5: Bandwidth
Figure 6: Channel To Channel Crosstalk
Figure 4: OFF Isolation
5/11
STG3680
Figure 7: Test Circuit
CL = 5/35pF or equivalent (includes jig and probe capacitance)
RL = 50Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
Figure 8: Break Before Make Time Delay
Figure 9: Charge Injection (VGEN=0V, RGEN=0Ω, RL=1MΩ, CL=100pF)
6/11
STG3680
Table 8: Turn ON, Turn OFF Delay Time
7/11
STG3680
QFN16 (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
0.80
0.90
1.00
0.032
0.035
0.039
A1
0.02
0.05
0.001
0.002
A3
0.20
A
b
0.18
D
D2
0.30
0.007
0.010
3.00
1.55
E
E2
0.25
0.008
1.70
0.118
1.80
0.061
0.067
3.00
1.55
1.70
1.80
0.061
0.067
0.50
0.020
K
0.20
0.008
0.30
r
0.09
E
0.40
0.071
0.118
e
L
0.012
0.50
0.012
0.016
0.071
0.020
0.006
E2
A
K
A1
e
D2
D
b
A3
8/11
K
L
r
STG3680
Tape & Reel QFNxx/DFNxx (3x3) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
330
13.2
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
MAX.
0.504
0.519
18.4
0.724
Ao
3.3
0.130
Bo
3.3
0.130
Ko
1.1
0.043
Po
4
0.157
P
8
0.315
9/11
STG3680
Table 9: Revision History
Date
Revision
17-May-2004
3
10/11
Description of Changes
Characteristics at VCC = 4.3 V Added on Tables 3, 4, 5, 6 and 7.
STG3680
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
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11/11