STG3685 LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH, SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE PRELIMINARY DATA ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V ULTRA LOW POWER DISSIPATION: ICC = 0.2µA (MAX.) at TA = 85°C LOW "ON" RESISTANCE VI = 0V: RON = 0.4Ω (MAX. TA = 25°C) at VCC = 4.2V RON = 0.5Ω (MAX. TA = 25°C) at VCC = 3.0V RON = 0.6Ω (MAX. TA = 25°C) at VCC = 2.3V WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 1.4V to 4.3V SINGLE SUPPLY 4.3V TOLERANT AND 1.8V COMPATIBLE THRESHOLD ON DIGITAL CONTROL INPUT at VCC = 2.3 to 4.3V LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17) ESD PERFORM. (ANALOG CHAN. vs GND): HBM > 4KV (MIL STD 883 method 3015) DESCRIPTION The STG3685 is an high-speed CMOS DUAL ANALOG S.P.D.T. (Single Pole Dual Throw) SWITCH or DUAL 2:1 Multiplexer/Demultiplexer Bus Switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.4V to 4.3V, making this device ideal for portable applications. It offers very low ON-Resistance (<0.5Ω) at VCC=3.0V. The IN input is provided to control the switches. The switches nS1 are ON (they are Flip-Chip Table 1: Order Codes PACKAGE T&R Flip-Chip9 STG3685BJR connected to common Ports Dn) when the IN input is held high and OFF (high impedance state exists between the two ports) when IN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the IN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. It’s available in the commercial temperature range Flip-chip package with Epoxy Protection. Figure 1: Pin Connection (Top Through View) And Schematic Circuit July 2005 Rev. 2 1/10 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. STG3685 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL NAME AND FUNCTION B2 A3, A1 C3, C1 B3, B1 C2 A2 IN 2S1, 1S1 2S2, 1S2 D2, D1 GND VCC Control Independent Channels Common Channels Ground (0V) Positive Supply Voltage Table 3: Truth Table IN SWITCH S1 SWITCH S2 H L ON OFF(*) OFF(*) ON (*) High Impedance Table 4: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage VI DC Input Voltage VIC DC Control Input Voltage VO DC Output Voltage IIKC DC Input Diode Current on control pin (VIN < 0V) Value -0.5 to 4.6 Unit V -0.5 to VCC + 0.5 V -0.5 to 4.6 V -0.5 to VCC + 0.5 V − 50 mA IIK DC Input Diode Current (VIN < 0V) ± 50 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 300 mA IOP DC Output Current Peak (pulse at 1ms, 10% duty cycle) ± 500 mA ICC or IGND DC VCC or Ground Current PD Power Dissipation at Ta=70°C (1) Tstg Storage Temperature TL Lead Temperature (10 sec) ± 100 mA TBD mW -65 to 150 °C 260 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. (1) Derate above 70°C: by 18.5mW/°C. Table 5: Recommended Operating Conditions Symbol VCC VI Supply Voltage (note 1) Parameter Value 1.4 to 4.3 Unit V Input Voltage 0 to VCC V VIC Control Input Voltage 0 to 4.3 V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C dt/dv Input Rise and Fall Time Control Input 1) Truth Table guaranteed: 1.2V to 4.3V. 2/10 VCC= 1.4V to 2.7V 0 to 20 VCC= 3.0V to 3.6V 0 to 10 ns/V STG3685 Table 6: DC Specifications Test Conditions Symbol VIH VIL RON RFLAT IOFF IIN ICCL ICCH Parameter VCC (V) Value TA = 25°C Min. Typ. High Level 1.65-1.95 0.65VCC Input Voltage 2.3-2.5 1.4 2.7-3.0 1.4 3.3 1.5 3.6 1.6 4.3 1.6 Low Level 1.65-1.95 Input Voltage 2.3-2.5 2.7-3.6 3.3 3.6 4.3 250 Switch ON 4.3 Resistance 3.0 300 (See Fig. 12) VS=0V to VCC 2.7 300 IS=100mA 2.3 350 1.8 550 1.4 1200 ON 4.3 Resistance 3.0 VS=0 to VCC FLATNESS 2.7 0.07 IS=100mA (1) 2.3 1.65 OFF State 4.3 VS=0.3 or 4V Leakage Current (nSn), (Dn) Input 0 - 4.3 VIN=0 to 4.3V Leakage Current Quiescent 1.65-4.3 VIN=VCC or Supply GND Current Quiescent 415 4.2 VIN=1.65V Supply 360 VIN=1.8V Current 120 VIN=2.6V -40 to 85°C Max. Min. Max. -55 to 125°C Min. 0.65VCC 0.65VCC 1.4 1.4 1.5 1.6 1.6 1.4 1.4 1.5 1.6 1.6 Unit Max. V 0.40 0.50 0.50 0.50 0.50 0.50 400 500 500 600 2000 2500 0.40 0.50 0.50 0.50 0.50 0.50 500 600 600 800 4000 5000 0.15 0.15 Ω ±10 ± 100 nA ±0.1 ±1 µA ±0.05 ±0.2 500 0.40 0.50 0.50 0.50 0.50 0.50 V mΩ ±1 µA µA 400 150 Note 1: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. 3/10 STG3685 Table 7: AC Electrical Characteristics (CL = 35pF, R L = 50Ω, tr = tf ≤ 5ns) Test Condition Symbol Parameter tPLH, tPHL Propagation Delay tON tOFF tD Q TURN-ON time TURN-OFF time 2.3-2.7 3.0-3.6 3.6-4.3 1.65-1.95 Break Before Make Time Delay Charge injection TA = 25°C VCC (V) 1.65-1.95 2.3-2.7 3.0-3.6 3.6-4.3 1.65-1.95 2.3-2.7 3.0-3.6 3.6-4.3 1.65-1.95 2.3-2.7 3.0-3.6 3.6-4.3 1.65-1.95 2.3-2.7 3.0-3.6 3.6-4.3 Value Min. Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Max. 0.45 0.40 0.30 0.30 VS=0.8V 70 VS=1.5V 32 32 30 VS=0.8V 45 VS=1.5V 25 15 15 CL=35pF RL= 50Ω VS=1.5V 2 2 2 ns 50 50 50 60 60 60 30 30 30 40 40 40 ns ns 15 15 15 50 40 35 35 CL= 100pF RL= 1MΩ VGEN= 0V RGEN= 0Ω Unit ns pC Table 8: Analog Switch Characteristics (CL = 5pF, RL = 50Ω, TA = 25°C) Test Condition Symbol Parameter OIRR Off Isolation (1) Xtalk Crosstalk THD Total Harmonic Distortion BW -3dB Bandwidth CIN Control Pin Input Capacitance Sn Port Capacitance D Port Capacitance when Switch is Enabled CSn CD Value TA = 25°C VCC (V) Min. 1.65-4.3 VS= 1VRMS f= 100KHz 1.65-4.3 VS= 1VRMS f= 100KHz 2.3-4.3 RL= 600Ω VI= 2VPP f = 20Hz to 20kHz 1.65-4.3 RL= 50Ω Max. -55 to 125°C Min. Min. Max. Unit Max. -64 dB -32 dB 0.03 % 50 MHz 10 3.3 f = 1MHz 35 f = 1MHz 91 3.3 Note 1: Off Isolation = 20Log10 (VD/VS), VD = output. VS = input at off switch. 4/10 Typ. -40 to 85°C pF STG3685 Figure 3: On Resistance Figure 6: Bandwidth Figure 4: Off Leakage Figure 7: Channel To Channel Crosstalk Figure 5: Off Isolation 5/10 STG3685 Figure 8: Test Circuit CL = 5/35pF or equivalent (includes jig and probe capacitance) RL = 50Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 9: Break Before Make Time Delay Figure 10: Charge Injection (VGEN = 0V, RGEN = 0Ω, RL = 1MΩ, C L = 100pF) 6/10 STG3685 Figure 11: Turn On, Turn Off Delay Time TYPICAL CHARACTERISTICS Figure 12: Switch-On RON vs VIN 7/10 STG3685 Flip-Chip9 MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 1.59 1.64 1.69 62.6 64.6 66.5 B 1.42 1.47 1.52 55.9 57.9 59.8 C D 0.80 0.295 E F 8/10 0.345 11.6 0.5 0.35 G H 0.32 31.5 0.40 0.0635 13.6 19.7 0.45 13.8 0.25 0.061 12.6 15.7 17.7 9.8 0.066 2.4 2.5 2.6 STG3685 Table 9: Revision History Date Revision 13-Jan-2005 04-Jul-2005 1 2 Description of Changes First Release. The Q Values on Table 7 has been updated. 9/10 STG3685 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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