STP11NC40, STP11NC40FP N-CHANNEL 400V - 0.44Ω - 9.5A TO-220/TO-220FP PowerMESH™II Power MOSFET ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID Pw STP11NC40 STP11NC40FP 400 V 400 V < 0.55 Ω < 0.55 Ω 9.5 A 9.5 A(*) 120 W 30 W TYPICAL RDS(on) = 0.44 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 1 TO-220 DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. 2 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER ■ ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STP11NC40 P11NC40 TO-220 TUBE STP11NC40FP P11NC40FP TO-220FP TUBE January 2002 1/10 STP11NC40, STP11NC40FP ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit STP11NC40 VDS VDGR VGS STP11NC40FP Drain-source Voltage (VGS = 0) 400 V Drain-gate Voltage (RGS = 20 kΩ) 400 V Gate- source Voltage ± 30 V ID Drain Current (continuos) at TC = 25°C 9.5 9.5 (*) A ID Drain Current (continuos) at TC = 100°C 6 6 (*) A IDM (l) PTOT dv/dt (1) Drain Current (pulsed) 38 38 (*) A Total Dissipation at TC = 25°C 120 30 W Derating Factor 0.96 0.24 W/°C Peak Diode Recovery voltage slope VISO Insulation Withstand Voltage (DC) Tj Tstg Operating Junction Temperature Storage Temperature 3.5 V/ns - 2500 V -55 to 150 -55 to 150 °C °C (l) Pulse width limited by safe operating area (1) I SD ≤9.5A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA TO-220 TO-220FP 1.04 4.1 Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl °C/W AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 9.5 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 300 mJ ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30V VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 5 A V(BR)DSS 2/10 Min. Typ. Max. 400 2 Unit V 1 50 µA µA ±100 nA 3 4 V 0.44 0.55 Ω STP11NC40, STP11NC40FP ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions Min. VDS = 15 V, ID = 5 A VDS = 25V, f = 1 MHz, VGS = 0 Typ. Max. Unit 8.6 S 995 172 25 pF pF pF SWITCHING ON Symbol Parameter Test Conditions td(on) tr Turn-on Delay Time Rise Time VDD = 200 V, ID = 5 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 320V, ID = 10 A, VGS = 10V Min. Typ. Max. 15 18 Unit ns ns 32.5 6 15 45.5 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol Parameter Test Conditions Min. td(off) tf Turn-off Delay Time Fall Time VDD = 320 V, ID = 5 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) 43 15 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 320V, ID = 10 A, RG = 4.7Ω, VGS = 10V (Inductive Load see, Figure 5) 7.5 14 23 ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 9.5 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 9.5 A, di/dt = 100A/µs VDD = 100V, Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. Max. Unit 9.5 38 A A 1.6 V 315 2100 13.6 ns nC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area For TO-220 Safe Operating Area For TO-220FP 3/10 STP11NC40, STP11NC40FP Thermal Impedance For TO-220 Thermal Impedance For TO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/10 STP11NC40, STP11NC40FP Gate Charge vs Gate-source Voltage Capacitance Variations NormalizedGateThresholdVoltagevsTemperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature 5/10 STP11NC40, STP11NC40FP Maximum Avalanche Energy vs Temperature 6/10 Id vs Temperature STP11NC40, STP11NC40FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 7/10 STP11NC40, STP11NC40FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 8/10 L4 P011C STP11NC40, STP11NC40FP TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. 4.6 0.173 TYP. 0.181 MAX. B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 L2 0.409 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F2 H G G1 ¯ F F1 L7 L2 L5 1 2 3 L4 9/10 STP11NC40, STP11NC40FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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