STMICROELECTRONICS STP5NB60

STP5NB60
STP5NB60FP

N - CHANNEL 600V - 1.8Ω - 5A - TO-220/TO-220FP
PowerMESH MOSFET
TYPE
ST P5NB60
ST P5NB60FP
■
■
■
■
■
V DSS
R DS(on)
ID
600 V
600 V
< 2.0 Ω
< 2.0 Ω
5 A
3 A
TYPICAL RDS(on) = 1.8 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
3
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
1
3
2
1
TO-220
2
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWER SUPPLIES (SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symb ol
Parameter
Value
STP5NB60
V DS
V DGR
V GS
Unit
STP5NB60F P
Drain-source Voltage (VGS = 0)
600
V
Drain- gate Voltage (RGS = 20 kΩ)
600
V
± 30
G ate-source Voltage
V
ID
Drain Current (continuous) at Tc = 25 o C
5
3
A
ID
Drain Current (continuous) at Tc = 100 oC
3.1
1.9
A
I DM (•)
P tot
dv/dt( 1)
Drain Current (pulsed)
20
20
A
T otal Dissipation at T c = 25 oC
100
35
W
Derating F actor
0.8
0.28
W /o C
V/ns
Peak Diode Recovery voltage slope
4.5
4.5
V ISO
Insulation Withstand Voltage (DC)

2000
T s tg
Storage T emperature
Tj
Max. Operating Junction T emperature
(•) Pulse width limited by safe operating area
September 1999
V
-65 to 150
o
C
150
o
C
( 1) ISD ≤ 5A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
1/9
STP5NB60/FP
THERMAL DATA
R thj -case
Thermal Resistance Junction-case
R thj -amb
R thc-sink
Tl
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
Max
TO-220
TO220-FP
1.25
3.57
62.5
0.5
300
o
C/W
o
C/W
C/W
o
C
o
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
Min.
Value
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
E AS
Single Pulse Avalanche Energy
(starting Tj = 25 o C, I D = IAR , VDD = 50 V)
Max.
Value
Unit
5
A
300
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
I DSS
IGSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
Gate-body Leakage
Current (VDS = 0)
T yp.
Max.
600
V GS = 0
Zero G ate Voltage
V DS = Max Rating
Drain Current (V GS = 0) V DS = Max Rating
Min.
Unit
V
T c = 125 oC
V GS = ± 30 V
1
50
µA
µA
± 100
nA
ON (∗)
Symbo l
Parameter
Test Con ditions
ID = 250 µA
V GS(th)
Gate Threshold
Voltage
R DS(on)
Static Drain-source O n V GS = 10V
Resistance
I D(o n)
V DS = V GS
Min.
T yp.
Max.
Unit
3
4
5
V
1.8
2.0
Ω
ID = 2.5 A
5.0
On State Drain Current V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/9
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
Input Capacitance
Output Capacitance
Reverse T ransfer
Capacitance
V DS = 25 V
f = 1 MHz
I D = 2.5 A
V GS = 0
Min.
T yp.
2.5
4.5
680
103
10.5
Max.
Unit
S
884
139
14
pF
pF
pF
STP5NB60/FP
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
T yp.
Max.
Unit
t d(on)
tr
Turn-on Time
Rise Time
Parameter
V DD = 300 V ID = 2.5 A
VGS = 10 V
R G = 4.7 Ω
(see test circuit, figure 3)
Test Con ditions
Min.
12
10
17
14
ns
ns
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 480 V
21
7.6
7.5
30
nC
nC
nC
T yp.
Max.
Unit
8
7
15
13
12
23
ns
ns
ns
T yp.
Max.
Unit
5
20
A
A
I D = 5 A V GS = 10 V
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Con ditions
Min.
V DD = 480 V ID = 5 A
R G = 4.7 Ω V GS = 10 V
(see test circuit, figure 5)
SOURCE DRAIN DIODE
Symbo l
ISD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Con ditions
Min.
Source-drain Current
Source-drain Current
(pulsed)
Forward On Voltage
I SD = 5 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 5 A di/dt = 100 A/µs
T j = 150 o C
V DD = 100 V
(see test circuit, figure 5)
V GS = 0
1.6
V
610
ns
3.6
µC
11.7
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area for TO-220
Safe Operating Area for TO-220FP
3/9
STP5NB60/FP
Thermal Impedance for TO-220
Thermal Impedance for TO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
4/9
STP5NB60/FP
Gate Charge vs Gate-source Voltage
Capacitance Variations
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STP5NB60/FP
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/9
STP5NB60/FP
TO-220 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
D1
0.107
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
14.0
0.511
L2
16.4
L4
0.645
13.0
0.551
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
D1
C
D
A
E
L5
H2
G
G1
F1
L2
F2
F
Dia.
L5
L9
L7
L6
L4
P011C
7/9
STP5NB60/FP
TO-220FP MECHANICAL DATA
mm
DIM.
MIN.
A
4.4
inch
TYP.
MAX.
MIN.
TYP.
MAX.
4.6
0.173
0.181
B
2.5
2.7
0.098
0.106
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
28.6
30.6
1.126
1.204
L4
9.8
10.6
0.385
0.417
L6
15.9
16.4
0.626
0.645
L7
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L3
L3
L6
F
F1
L7
F2
H
G
G1
¯
1 2 3
L2
8/9
L4
STP5NB60/FP
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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