STP5NK80Z - STP5NK80ZFP N-CHANNEL 800V - 1.9Ω - 4.3A TO-220/TO-220FP Zener-Protected SuperMESH™Power MOSFET TYPE STP5NK80Z STP5NK80ZFP ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID Pw 800 V 800 V < 2.4 Ω < 2.4 Ω 4.3 A 4.3 A 110 W 30 W TYPICAL RDS(on) = 1.9 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY DESCRIPTION The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. 3 1 TO-220 2 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC ■ LIGHTING ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STP5NK80Z P5NK80Z TO-220 TUBE STP5NK80ZFP P5NK80ZFP TO-220FP TUBE July 2002 1/10 STP5NK80Z - STP5NK80ZFP ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value STP5NK80Z VDS VDGR VGS Unit STP5NK80ZFP Drain-source Voltage (VGS = 0) 800 V Drain-gate Voltage (RGS = 20 kΩ) 800 V Gate- source Voltage ± 30 V ID Drain Current (continuous) at TC = 25°C 4.3 4.3 (*) A ID Drain Current (continuous) at TC = 100°C 2.7 2.7 (*) A IDM (l) PTOT VESD(G-S) dv/dt (1) Drain Current (pulsed) 17.2 17.2 (*) A Total Dissipation at TC = 25°C 110 30 W Derating Factor 0.88 0.24 W/°C Gate source ESD(HBM-C=100pF, R=1.5KΩ) 3500 V 4.5 V/ns Peak Diode Recovery voltage slope VISO Insulation Withstand Voltage (DC) Tj Tstg Operating Junction Temperature Storage Temperature - 2500 -55 to 150 -55 to 150 V °C °C (l) Pulse width limited by safe operating area (1) I SD ≤4.3A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX. (*) Limited only by maximum temperature allowed THERMAL DATA TO-220 TO-220FP 1.14 4.2 Rthj-case Thermal Resistance Junction-case Max Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl °C/W AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 4.3 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 190 mJ GATE-SOURCE ZENER DIODE Symbol BVGSO Parameter Gate-Source Breakdown Voltage Test Conditions Igs=± 1mA (Open Drain) Min. 30 Typ. Max. Unit V (#) When mounted on minimum Footprint PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 2/10 STP5NK80Z - STP5NK80ZFP ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditions Min. Typ. Max. Drain-source Breakdown Voltage ID = 1 mA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating, TC = 125 °C 1 50 µA µA IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 30V ±10 µA VGS(th) Gate Threshold Voltage VDS = VGS, ID = 100µA 3.75 4.5 V RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.15 A 1.9 2.4 Ω Typ. Max. Unit V(BR)DSS 800 Unit 3 V DYNAMIC Symbol gfs (1) Ciss Coss Crss Coss eq. (3) Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Equivalent Output Capacitance Test Conditions Min. VDS = 15 V, ID = 2.15 A VDS = 25V, f = 1 MHz, VGS = 0 VGS = 0V, VDS = 0V to 400V 4.25 S 910 98 20 pF pF pF 40 pF SWITCHING ON Symbol Parameter Test Conditions td(on) tr Turn-on Delay Time Rise Time VDD = 400 V, ID = 2 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 640V, ID = 4.3 A, VGS = 10V Min. Typ. Max. 18 25 Unit ns ns 32.4 5 18.5 45.5 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol Parameter Test Conditions Min. td(off) tf Turn-off Delay Time Fall Time VDD = 400 V, ID = 2 A RG = 4.7Ω VGS = 10 V (Resistive Load see, Figure 3) 45 30 ns ns tr(Voff) tf tc Off-voltage Rise Time Fall Time Cross-over Time VDD = 640V, ID = 4.3 A, RG = 4.7Ω, VGS = 10V (Inductive Load see, Figure 5) 22 10 32 ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (2) Source-drain Current Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 4.3 A, VGS = 0 Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 4.3 A, di/dt = 100A/µs VDD = 40V, Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. 500 3 12 Max. Unit 4.3 17.2 A A 1.6 V ns µC A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 3/10 STP5NK80Z - STP5NK80ZFP Safe Operating Area For TO-220 Safe Operating Area For TO-220FP Thermal Impedance For TO-220 Thermal Impedance For TO-220FP Output Characteristics Transfer Characteristics 4/10 STP5NK80Z - STP5NK80ZFP Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature 5/10 STP5NK80Z - STP5NK80ZFP Source-drain Diode Forward Characteristics Maximum Avalanche Energy vs Temperature 6/10 Normalized BVDSS vs Temperature STP5NK80Z - STP5NK80ZFP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 7/10 STP5NK80Z - STP5NK80ZFP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 8/10 L4 P011C STP5NK80Z - STP5NK80ZFP TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. 4.6 0.173 TYP. MAX. 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.5 0.045 0.067 F2 1.15 1.5 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 L2 0.409 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F2 H G G1 ¯ F F1 L7 L2 L5 1 2 3 L4 9/10 STP5NK80Z - STP5NK80ZFP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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