STS4DNF30L DUAL N-CHANNEL 30V - 0.039Ω - 4A SO-8 STripFET™ POWER MOSFET PRELIMINARY DATA TYPE STS4DNF30L ■ ■ ■ VDSS RDS(on) ID 30 V < 0.050 Ω 4A TYPICAL RDS(on) = 0.039 Ω STANDARD OUTLINE FOR EASY AUTOMATED SURFACE MOUNT ASSEMBLY LOW THRESHOLD DRIVE DESCRIPTION SO-8 This Power MOSFET is the second generation of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS BATTERY MANAGMENT IN NOMADIC EQUIPMENT ■ POWER MANAGMENT IN CELLULAR PHONES ■ DC MOTOR DRIVE ■ MOSFET ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (● ) PTOT Value Unit Drain-source Voltage (VGS = 0) Parameter 30 V Drain-gate Voltage (RGS = 20 kΩ) 30 V ± 16 V Drain Current (continuous) at TC = 25°C 4 A Gate- source Voltage Drain Current (continuous) at TC = 100°C 2.5 A Drain Current (pulsed) 16 A Total Dissipation at TC = 25°C Dual Operation 2 W (● )Pulse width limited by safe operating area. August 2002 1/6 STS4DNF30L THERMAL DATA Rthj-amb Tstg Tl (*)Thermal Resistance Junction-ambient Max Storage Temperature Range Junction Temperature 62.5 °C/W -55 to 150 °C 150 °C (*) Mounted on FR-4 board (t≤ 10sec) MOSFET ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Min. Typ. Max. 30 Unit Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 V Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 10 µA Gate-body Leakage Current (VDS = 0) VGS = ± 16 V ±100 nA Typ. Max. Unit ON (1) Symbol Parameter Test Conditions Min. VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 2 A 0.039 0.050 Ω VGS = 4.5V, ID = 2 A 0.046 0.060 Ω Min. Typ. Max. Unit 1 3 S 330 pF 1 V DYNAMIC Symbol gfs (1) 2/6 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2 A VDS = 25V, f = 1 MHz, VGS = 0 Ciss Input Capacitance Coss Output Capacitance 90 pF Crss Reverse Transfer Capacitance 40 pF STS4DNF30L ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 15 V, ID = 2 A RG = 4.7Ω VGS = 4.5 V (see test circuit, Figure 3) VDD = 24 V, ID = 4 A, VGS = 10 V Typ. Max. Unit 11 ns 100 ns 6.5 9 nC 3.6 nC 2 nC SWITCHING OFF Symbol Parameter Test Conditions Min. Typ. Max. Unit td(off) tf Turn-off Delay Time Fall Time VDD = 15 V, ID = 2 A, RG = 4.7Ω, VGS = 4.5 V (see test circuit, Figure 3) 25 22 ns ns tr(Voff) tf tc Off-Voltage Rise Time Fall Time Cross-over Time VDD = 24 V, ID = 4 A, RG = 4.7Ω, VGS = 4.5 V (see test circuit, Figure 5) 22 55 75 ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) Parameter Test Conditions Min. Typ. Source-drain Current Source-drain Current (pulsed) Forward On Voltage ISD = 4 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 4 A, di/dt = 100A/µs, VDD = 20 V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 4 A 16 A 1.2 V 30 ns 18 nC 1.2 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3/6 STS4DNF30L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STS4DNF30L SO-8 MECHANICAL DATA mm DIM. MIN. TYP. A a1 MIN. TYP. 1.75 0.1 0.003 0.009 1.65 0.65 MAX. 0.068 0.25 a2 a3 inch MAX. 0.064 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 c1 45 (typ.) e 1.27 0.050 e3 3.81 0.150 F 3.8 4.0 0.14 0.157 L 0.4 1.27 0.015 0.050 M S 0.6 0.023 8 (max.) 0016023 5/6 STS4DNF30L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 6/6