STMICROELECTRONICS STV6410A

STV6410A
AUDIO/VIDEO SWITCH MATRIX
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I2C BUS CONTROL
STANDBY MODE
VIDEO SECTION
5 CVBS INPUTS, 4 CVBS OUTPUTS (ONE
WITH SELECTABLE CHROMA TRAP FILTER)
5 Y/C INPUTS, 3 Y/C OUTPUTS
6dB GAIN ON ALL CVBS/Y AND C OUTPUTS
1 Y/C ADDER
2 RGB/FB INPUTS, 1 RGB/FB OUTPUT WITH
6dB ADJUSTABLE GAIN
VIDEO MUTING ON ALL THE OUTPUTS
3 SLOW BLANKING INPUTS/OUTPUTS
SYNC BOTTOM CLAMP ON ALL CVBS/Y
AND RGB INPUTS, AVERAGE ON C INPUTS
BANDWIDTH : 15MHz
CROSSTALK : 60dB Typ.
AUDIO SECTION
5 STEREO INPUTS, 4 STEREO OUTPUTS
(TWO WITH LEVEL ADJUSTMENT)
MONO SOUND OUTPUT
STEREO TO MONO CAPABILITY ON ALL
SCARTS
AUDIO MUTING ON ALL THE OUTPUTS
TQFP64 (10 x 10 x 1.4mm)
(Full Plastic Quad Flat Pack)
ORDER CODE : STV6410AD
DESCRIPTION
The STV6410A is a highly integrated I2C bus-controlled audio and video switch matrix, optimized for
use in digital set-top box applications. It provides
all the audio and video routings required in a full
three scart set-top box design. It is also fully pin
compatible with STV6411A, the two scart version.
December 1998
1/22
STV6410A
LOUT_AUX
COUT_VCR
ROUT_AUX
YCVBSOUT_TV
LOUT_TV
RCOUT_TV
5
4
3
2
1
FBOUT_TV
17
64
ROUT_TV
FBIN_AUX
18
63
GOUT_TV
FBIN_ENC
19
62
LOUT_VCR
ADD
20
61
BOUT_TV
SCL
21
60
ROUT_VCR
SDA
22
59
LOUT_CINCH
VCC12
23
58
ROUT_CINCH
YCVBSIN_AUX
24
57
GNDA
44
45
46
47
48
LIN_ENC
BIN_ENC
RIN_VCR
CIN_VCR
LIN_VCR
GIN_ENC
49
43
32
RIN_ENC
BIN_AUX
42
YCVBSIN_VCR
RCIN_ENC
50
41
31
LIN_STB
VREF
SLB_AUX
40
51
39
30
RIN_STB
YCVBSIN_TV
GIN_AUX
CIN_ENC
52
38
29
YIN_ENC
LIN_TV
GNDV1
37
53
RIN_AUX
28
36
CIN_TV
RCIN_AUX
YCVBSIN_ENC
54
35
27
LIN_AUX
VCCA
SLB_VCR
34
RIN_TV
55
33
56
26
VCC1
25
CVBSIN_STB
SLB_TV
YIN_AUX
6410A-01.EPS
YCVBSOUT_VCR
GNDV3
10
6
FILTER
11
AOUT_RF
VCC3
12
7
COUT_AUX
13
VOUT_RF
GNDV2
14
8
YCVBSOUT_AUX
15
9
VCC2
16
PIN CONNECTIONS
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2/22
Symbol
RCOUT_TV
LOUT_TV
YCVBSOUT_TV
ROUT_AUX
COUT_VCR
LOUT_AUX
YCVBSOUT_VCR
AOUT_RF
VOUT_RF
GNDV3
FILTER
VCCV3
COUT_AUX
GNDV2
YCVBSOUT_AUX
Description
Red/chroma Output, to TV Scart
Audio Left Output, to TV Scart
Y/CVBS Output, to TV scart
Audio Right Output, to AUX Scart
Chroma Output, to VCR Scart
Audio Left Output, to AUX Scart
Y/CVBS Output, to VCR Scart
Audio (L+R) Output to RF Modulator
Video (CVBS) Output to RF Modulator
Video Switches Ground 3
Chroma Trap Filter
Video Switches Supply 3 (8V)
Chroma Output, to AUX Scart
Video Switches Ground 2
Y/CVBS Output, to AUX Scart
6410A-01.TBL
PIN LIST
STV6410A
PIN LIST (continued)
Symbol
VCCV2
FBOUT_TV
FBIN_AUX
FBIN_ENC
ADD
SCL
SDA
VCC12
YCVBSIN_AUX
SLB_TV
YIN_AUX
SLB_VCR
RCIN_AUX
GNDV1
GIN_AUX
SLB_AUX
BIN_AUX
VCCV1
CVBSIN_STB
LIN_AUX
YCVBSIN_ENC
RIN_AUX
YIN_ENC
RIN_STB
CIN_ENC
LIN_STB
RCIN_ENC
RIN_ENC
GIN_ENC
LIN_ENC
BIN_ENC
RIN_VCR
CIN_VCR
LIN_VCR
YCVBSIN_VCR
VREF
YCVBSIN_TV
LIN_TV
CIN_TV
VCCA
RIN_TV
GNDA
ROUT_CINCH
LOUT_CINCH
ROUT_VCR
BOUT_TV
LOUT_VCR
GOUT_TV
ROUT_TV
Description
Video Switches Supply 2 (8V)
Fast Blanking Output, to TV Scart
Fast Blanking Input, from AUX Scart
Fast Blanking Input, from Encoder
I2C Bus IC Address Programmation
I2C Bus Clock
I2C Bus Data
Slow Blanking Power Supply (12V)
Y/CVBS Input from AUX Scart
Slow Blanking Input/Ouput from TV
Y Input, from AUX Scart
Slow Blanking Input/Ouput from VCR
Red/Chroma Input, from AUX Scart
Video Switches Ground 1
Green Input, from AUX Scart
Slow Blanking Input/Ouput from AUX
Blue Input, from AUX Scart
Video Switches Supply 1 (8V)
CVBS Input from STB
Audio Left Input, from AUX Scart
Y/CVBS Input from Encoder
Audio Right Input, from AUX Scart
Y Input, from Encoder
Audio Right Input, from STB
Chroma Input, from Encoder
Audio Left Input, from STB
Red/Chroma Input, from Encoder
Audio Right Input, from Encoder
Green Input, from Encoder
Audio Left Input, from Encoder
Blue Input, from Encoder
Audio Right Input, from VCR Scart
Chroma Input, from VCR Scart
Audio Left Input, from VCR
Y/CVBS Input from VCR Scart
Voltage Reference Decoupling
Y/CVBS Input, from TV Scart
Audio Left Input, from TV Scart
Chroma Input, from TV Scart
Audio Switches Supply (8V)
Audio right input, from TV Scart
Audio Switches Ground
Audio Right Output, to CINCH
Audio Left Output, to CINCH
Audio Right Output, to VCR sCart
Blue Output, to TV Scart
Audio Left Output, to VCR Scart
Green Output, to TV Scart
Audio Right Output, to TV Scart
6410A-01.TBL
Pin Number
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
3/22
STV6410A
BLOCK DIAGRAM
STV6410A
FB SWITCH
FBIN_ENC 19
4V
0V
17 FBOUT_TV
FBIN_AUX 18
RGB SWITCH
B_ENC
B_AUX
G_ENC
G_AUX
R/C_ENC
R/C_AUX
MUTE
BIN_ENC 46
BIN_AUX 32
GIN_ENC 44
6dB
61 BOUT_TV
6dB
63 GOUT_TV
6dB
1
RCOUT_TV
9
VOUT_RF
C SWITCH
R/C_AUX
R/C_ENC
C_ENC
C_VCR
MUTE
GIN_AUX 30
RCIN_ENC 42
RCIN_AUX 28
6dB
Y/CVBS SWITCH
CVBS/Y_AUX
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
Y_AUX
Y_ENC
MUTE
CIN_ENC 40
CIN_VCR 48
YCVBSIN_AUX 24
TRAP
11 FILTER
3
6dB
YCVBS/OUT_TV
C SWITCH
R/C_ENC
C_ENC
C_VCR
C_TV
MUTE
CIN_TV 54
Y/CVBS SWITCH
CVBS/Y_ENC
CVBS/Y_VCR
CVBS_STB
CVBS/Y_TV
Y_ENC
MUTE
YCVBSIN_ENC 36
YCVBSIN_VCR 50
CVBSIN_STB 34
6dB
13 COUT_AUX
6dB
15 YCVBSOUT_AUX
C SWITCH
R/C_ENC
C_ENC
C_TV
C_AUX
MUTE
6dB
Y/CVBS SWITCH
CVBS_STB
CVBS/Y_ENC
CVBS/Y_AUX
CVBS/Y_TV
Y_AUX
Y_ENC
MUTE
YCVBSIN_TV 52
YIN_AUX 26
YIN_ENC 38
LIN_STB 41
LIN_TV 53
LIN_VCR 49
COUT_VCR
7
YCVBSOUT_VCR
6dB
25 SLB_TV
SLOW BLANK,
I/O MONITOR
CINCH SWITCH
L_ENC
L_STB
L_TV
L_VCR
L_AUX
R_ENC
R_STB
R_TV
R_VCR
R_AUX
MUTE
LIN_ENC 45
5
-14dB
0/6dB
-14dB
0/6dB
27 SLB_VCR
31 SLB_AUX
59 LOUT_CINCH
58 ROUT_CINCH
AUX SWITCH
L_ENC
L_STB
L_TV
L_VCR
R_VCR
R_TV
R_STB
R_ENC
MUTE
LIN_AUX 35
RIN_ENC 43
RIN_STB 39
6
LOUT_AUX
4
ROUT_AUX
STEREO/
MONO
VCR SWITCH
L_ENC
L_STB
L_TV
L_AUX
R_ENC
R_STB
R_AUX
R_TV
MUTE
RIN_VCR 47
SCL 21
SDA 22
4/22
I2C BUS
DECODER
RIN_AUX 37
62 LOUT_VCR
STEREO/
MONO
60 ROUT_VCR
TV SWITCH
L_ENC
L_STB
L_VCR
L_AUX
R_AUX
R_VCR
R_STB
R_ENC
MUTE
-14dB
0/6dB
STEREO/
MONO
-14dB
0/6dB
8
AOUT_RF
2
LOUT_TV
64 ROUT_TV
6410A-02.EPS
RIN_TV 56
STV6410A
Parameter
VI
Supply voltage for Audio and Video Sections
Voltage at pin i to GND. Except SDA, SCL at 5.5V max
VCC12
Supply Voltage for Slow Blanking Sections
VSLBK
Voltage at slow blanking pins to GND
VESD
Maximum ESD Voltage allowed (100pF capacitor discharged
through 1.5kΩ serial resistor - Human Body Model)
Toper
Operating Ambient Temperature
Tstg
Storage Temperature
Value
Unit
10
V
0, VCC
V
13.2
V
0, VCC12
V
±4
kV
0, +70
o
C
-20, +150
o
C
THERMAL DATA
Symbol
Rth (j-a)
Parameter
Value
Junction-ambient Thermal Resistance
Max.
Unit
o
68
C/W
6410A-03.TBL
Symbol
AVCC,VVCC
6410A-02.TBL
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ,
unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
7.5
8
8.5
V
AVCC
Audio Operating Supply Voltage
VVCC
Video Operating Supply Voltage
7.5
8
8.5
V
VCC12
Slow Blanking Control Supply Voltage
11.2
12
12.8
V
ACTIVE (all channels ON)
ICCA
Audio Supply Current
AVCC = 8V, no input signal
10
15
mA
ICCV
Video Supply Current
(Iccv1 + Iccv2 + Iccv3)
VVCC = 8V, no input signal
65
80
mA
ICC12
12V Supply Current
VCC12 = 12V
SlBlk input mode
SlBlk output mode, no load
0
2.0
2
3
µA
mA
ICCAstd
Audio Supply Current in stand by mode
AVCC = 8V
1.2
mA
ICCVstd
Video Supply Current in stand by mode
(ICCV1 + ICCV2 + ICCV3)
VVCC = 8V
9
mA
5/22
6410A-04.TBL
STANDBY (all channels OFF)
STV6410A
ELECTRICAL CHARACTERISTICS (continued)
Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ,
unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VRIPPLE = 500mVRMS at f = 100Hz,
Gain = 0dB,
VREF filter cap = 47µF
VREF filter cap = 220µF
60
72
82
dB
dB
Supply Voltage Rejection
VRIPPLE = 500mVRMS at f = 1kHz,
Gain = 0dB
70
80
dB
VINDC
Input DC Level
AVCC = 8V
VCC/2
V
VINAC
Input signal amplitude
AUDIO SECTION
SVR1K
RIN
RINmatch
Frange
Flatness
Supply Voltage Rejection
2
Input Resistance
45
55
±1
Input resistance matching
Bandwith
-3dB, 0.5VRMS, RL = 10kΩ, Gain = 0dB
Spread of gain in audio band
0.5VRMS, 20Hz to 20kHz, Gain = 0dB
VRMS
kΩ
±10
50
%
kHz
0.5
Channel Separation (from audio inputs) VIN = 0.5VRMS, f = 1kHz, on one input,
RL =10kΩ, Gain = 0dB
Between L &R of TV outputs
80
70
74
dB
Ci
Channel Isolation from video inputs
VIN = 1 VPP, f = 15kHz, on one input,
RL = 10kΩ, Gain = 0dB
70
85
dB
VOUT
Output DC Level
AVCC = 8V
VOFF
DC Offset change
Switching between inputs
ROUT
Output Resistance
1
V
±15
Equivalent Input Voltage Noise
BW = 20Hz, 20kHz, Gain = 0dB
0dB Gain
0.5VRMS, RL = 10kΩ, Gain = 0dB
-0.5
Step of Gain
-14dB to +6dB
1.75
GMATCH1
Gain matching between different
inputs on one output
VIN = 0.5VRMS, 1kHz, Gain = 0dB
GMATCH2
Gain matching between Left/Right
outputs of one input channel
VIN = 0.5VRMS, 1kHz, Gain = 0dB
Total Harmonic Distorsion
1kHz, LPF @ 80kHz
VIN = VOUT = 0.5VRMS
VIN = VOUT = 2VRMS
mV
Ω
60
G0
THD
dB
VCC/2
eNI
GSTEP
90
dB
Cs
µV
5
+0.5
dB
2.25
dB
-0.5
0.5
dB
-0.5
0.5
dB
0.05
%
%
2
0.002
0.003
VCL
Output clipping Level
THD = 0.2%, 1kHz
2.1
2.25
VRMS
RL
Output Load Resistance
VIN = 1VRMS, THD = 0.3%, Gain = 0dB
2
2.25
kΩ
Mute Suppression
VIN = 0.5VRMS, on one input
90
Mute
6/22
dB
6410A-05.TBL
SVR100
STV6410A
ELECTRICAL CHARACTERISTICS (continued)
Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ,
unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
2
V
1
2
mA
VIDEO SECTION
VDCIN
DC Input Level
Bottom Synch Pulse
ICLAMP
Clamping current
at VDCIN - 400mV
Input Leakage Current
VIN = VDCIN + 1V
ILEAK
CIN
Input Capacitance
VIN
Max Input Signal
VVCC = 8V
1
1.5
10
µA
2
pF
2
VPP
DYN
Dynamic Output Signal
VVCC = 8V
3
4
VPP
BW
Bandwidth at -3dB Y/CVBS
RGB
Y/C mixer (on RF out)
VIN = 1VPP
VIN = 1VPP
VINY = 1VPP, VINC = muted
15
15
10
18
18
15
MHz
MHz
MHz
CT
Crosstalk Isolation between Channels
VIN = 1VPP at f = 5MHz,
on one input
50
60
dB
50
Ω
ROUT
Output Resistance
RLOAD
Load Impedance
1
4.7
∞
GRGB
Gain at RGB outputs
VIN = 1VPP, gain set to 6dB
5.5
6
6.5
dB
Gain matching between R, G, B
VIN = 1VPP, gain set to 6dB
-0.3
0
0.3
dB
Step of Gain
3dB to 6dB
0.75
1
1.25
dB
Gain on Y/CVBS channels
VIN = 1VPP
5.5
6
6.5
dB
Gain matching between Y, CVBS inputs
VIN = 1VPP
-0.5
0
0.5
dB
GRGBM
GRGBSTEP
GYCVBS
GYCVBSM
kΩ
DCOUT
DC Output Voltage
Bottom sync pulse
1.1
1.3
V
DCOUT RF
RF Output Voltage
Bottom sync pulse
1.5
1.8
V
DPHI
Differential Phase
VIN = 1VPP, 4.43MHz
0.7
°
Differential Gain
VIN = 1VPP, 4.43MHz
Mute
Mute Suppression
VIN = 1VPP at f = 5MHz,
on one input
-55
IVOUT
Output current
VOUT DC @ +1V
1.5
DG
0.4
%
dB
2.5
mA
3
V
55
kΩ
CHROMA SECTION
DC Input Level
RIN
Input Resistance
CIN
Input Capacitance
VIN
Max Input Signal
Dyn
Dynamic Output Signal
45
DCOUT
DC Output Voltage
CBW
Chroma Bandwidth
CIN = 1VPP at - 3dB
Crosstalk Isolation between Channel
VIN = 1VPP at f = 5MHz,
on one input
CT
ROUT
Output Resistance
GOUTC
2
pF
1.5
2
VPP
V
3
3.8
1.9
2.3
V
10
19
MHz
52
dB
50
Ω
Gain at OUTC
VIN = 1VPP
5.5
6
6.5
GCM
Gain matching between C inputs
VIN = 1VPP
-0.5
0
0.5
Mute
Mute Suppression
VIN = 1VPP at f = 5MHz,
on one input
CtoYdel
Chroma to luma delay,source Y/C
Pin other than RF_OUT 1,
VPP @ 5MHz
±4
±20
ns
CtoYdel
Chroma to luma delay,source Y/C
Pin RF_OUT
±4
±20
ns
55
dB
dB
dB
7/22
6410A-06.TBL
VDCIN
STV6410A
ELECTRICAL CHARACTERISTICS (continued)
Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ,
unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
SLOW BLANKING SECTION
INPUT (Input mode VCC8 = 8V ±5%)
SLBlow
Input Low Level Threshold
2.5
3.25
4
V
SLBhigh
Input High Level Threshold
7.5
8.25
9
V
50
100
µA
IIN
Input current
OUTPUT (Output mode VCC12 = 12V ±5%, VCC8 = 8V ±5%, RLOAD > 10kΩ)
SLBLOW
Output Low Level (int. TV)
0
0.02
1.5
V
SLBMED
Output Med Level (ext. 16/9)
5
5.75
6.5
V
SLBHIGH
Output High Level (ext. 4/3)
10
11
12
V
0.4
0.7
0.9
V
2
10
µA
0.7
0.3
V
V
FAST BLANKING SECTION
INPUT (Input mode VCCV = 8V ±5%)
FBlow/high Input Low/High Level Threshold
IIN
Input current
OUTPUT (Output mode VCCV = 8V ±5%, RLOAD > 1kΩ)
FBLOW
Output Low Level
IIN = 1.0mA
IIN = 0.2mA
FBHIGH
Output High Level
IOUT = 1.0mA
FBDEL
Fast blanking to RGB delay
at 50% on digital RGB transients,
at 2.7VON FB rise transient, at 1.5V
on FB fall CLOAD = 10pF max
Fast Blanking transitions at FB output
Rise Time
Fall Time
CLOAD = 10pF max
between 10% and 90%
between 90% and 10%
FBTRANS
0
3.6
4
4.4
V
30
ns
30
30
ns
ns
ADDsel_L
Address selection low level
ADDsel_H
Address selection high level
ILEAK
8/22
Leakage Current
0
4
0.2
V
VCC
(8V)
V
10
µA
6410A-07.TBL
ADDRESS SELECTION INPUT
STV6410A
ELECTRICAL CHARACTERISTICS (continued)
Tamb = 25°C, AVCC = VVCC = 8V, VCC12 = 12V, RLOUTA = 10kΩ, RGA = 600Ω, RGV = 50Ω, RLOUTV = 4.7kΩ,
unless otherwise specified.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
2
I C BUS CHARACTERISTICS
SCL
VIL
Low Level Input Voltage
-0.3
1.5
V
VIH
High Level Input Voltage
3
5.5
V
ILI
Input Leakage Current
fSCL
Clock Frequency
tR
Input Rise Time
tF
Input Fall Time
Cl
Input Capacitance
10
µA
100
kHz
1.5V to 3V
1
µs
1.5V to 3V
300
ns
10
pF
VIN = 0 to 5.5V
-10
0
0
SDA
VIL
Low Level Input Voltage
-0.3
1.5
V
VIH
High Level Input Voltage
3
5.5
V
10
µA
10
pF
ILI
Input Leakage Current
Cl
Input Capacitance
tR
Input Rise Time
1.5V to 3V
1
µs
tF
Input Fall Time
1.5V to 3V
300
ns
Low level Output Voltage
IOL = 3mA
0.4
V
tF
Output Fall Time
3V to 1.5V
CL
Load Capacitance
VOL
VIN = 0 to 5.5V
-10
0
250
ns
400
pF
TIMING
tLOW
Clock Low Period
4.7
µs
tHIGH
Clock High Period
4
µs
tSU,DAT
Data Set-up Time
250
ns
tHD,DAT
Data Hold Time
0
tSU,STO
Set-up Time from Clock High to Stop
4
µs
4.7
µs
4
µs
4.7
µs
Start Set-up Time following a Stop
tHD,STA
Start Hold Time
tSU,STA
Start Set-up Time following Clock Low to High Transition
ns
9/22
6410A-08.TBL
tBUF
340
STV6410A
I2C BUS SELECTION
Data transfers follow the usual I2C format: after the start condition (S), a 7-bit slave address is sent, followed
by an eighth bit which is a data direction bit (W). A 8-bit subadress is sent to select a register, followed by
a 8-bit data word to put in it.
The IC’s I2C bus decoder permits the automatic incrementation mode in write mode.
String Format
Write only mode (S : start condition, P : stop condition, A : acknowledge)
S
SLAVE ADDRESS
0
A
SUBADDRESS
A
DATA
A
P
A
DATA
A
P
Read only mode
S
SLAVE ADDRESS
1
Slave Address
Address
A6
A5
A4
A3
A2
A1
A0
Value
1
0
0
1
0
1
X
Auto Increment Mode
S
SLAVE ADDRESS
0
A
SUBADDRESS
A
DATA0
A
DATA1
A
........ DATAN
A
P
I2C Bus Address
Write Address : 1001 01X0
Read Address : 1001 01X1
Address Selection Pin Grounded : X = 0, write address = 94HEX, read address = 95HEX
Address Selection Pin to Supply : X = 1, write address = 96HEX, read address = 97HEX
Input Signals Summary (Write Mode)
Reg.
Address
(HEX)
DATA D7
DATA D6
DATA D5
DATA D4
DATA D3
DATA D2
DATA D1
DATA D0
00
TV Audio Level Adjustment
0/6dBGain
TV Mono
TV Audio Outputs control
01
Cinch Audio Level Adjustment
0/6dBGain
Not used
Cinch Audio Outputs control
02
AUX Mono
VCR Mono
AUX Audio Outputs control
03
Not used
TV chroma
mute
Y/CVBS & Chroma TV outputs control
04
TV RGB outputs control
05
AUX
Chroma
Mute
06
Not used
07
08
AUX Y/CVBS &
Chroma Outputs control
Not used
VCR
AUX
Output OFF Output OFF
Not used
Not used
Not used data must be put to "0"
10/22
TV FB Output control
Slow Blanking
AUX SCART
VCR Audio Outputs control
TV RF ouput control
R/Csub
AUX Clamp
RGB Gain
VCR
Chroma
Mute
TV R/C
ouput
control
R/Csub
Encoder
Clamp
VCR Y/CVBS &
Chroma Outputs control
Slow Blanking
VCR SCART
TV Output
OFF
ENCOD
Clamp
disable
TV Clamp
disable
ASTB
Clamp
disable
Not used
Not used
Not used
Not used
Slow Blanking
TV SCART
VCR
Clamp
disable
AUX
Clamp
disable
RF Mod
CINCH
Output OFF Output OFF
STV6410A
I2C BUS SELECTION (continued)
Input Signals (Write Mode)
Data Byte
TV Audio Output
Register
Address
(HEX)
00
Data
Description
Audio Output selection
Bits
3
Stereo or Mono Mode
1
6dB Extra Gain
1
Level Adjustment
3
Comments
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
0
0
0
Muted
X
X
X
X
X
0
0
1
AUX inputs selected
X
X
X
X
X
0
1
0
VCR inputs selected
X
X
X
X
X
0
1
1
ASTB inputs selected
X
X
X
X
X
1
0
0
NOT ALLOWED
X
X
X
X
X
1
0
1
Encoder inputs selected
X
X
X
X
X
1
1
0
NOT ALLOWED
X
X
X
X
X
1
1
1
NOT ALLOWED
X
X
X
X
0
X
X
X
0 = Stereo
X
X
X
X
1
X
X
X
1 = Mono
X
X
X
0
X
X
X
X
0 = 0dB
X
X
X
1
X
X
X
X
1 = +6dB
0
0
0
X
X
X
X
X
0dB Adjustment
1
1
1
X
X
X
X
X
-14dB Adjustment (-2dB/step)
Audio Cinch Output
Register
Address
(HEX)
01
Data
Description
Audio Output Selection
Bits
3
6dB Extra Gain
1
Level Adjustment
3
Comments
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
0
0
0
Muted
X
X
X
X
X
0
0
1
AUX inputs selected
X
X
X
X
X
0
1
0
VCR inputs selected
X
X
X
X
X
0
1
1
ASTB inputs selected
X
X
X
X
X
1
0
0
TV inputs selected
X
X
X
X
X
1
0
1
Encoder input selected
X
X
X
X
X
1
1
0
NOT ALLOWED
X
X
X
X
X
1
1
1
NOT ALLOWED
X
X
X
0
X
X
X
X
0 = 0dB
X
X
X
1
X
X
X
X
1 = +6dB
0
0
0
X
X
X
X
X
0dB Adjustment
1
1
1
X
X
X
X
X
-14dB Adjustment (-2dB/step)
11/22
STV6410A
I2C BUS SELECTION (continued)
VCR And AUX Audio Outputs Selection
Register
Address
(HEX)
02
Data
Description
VCR Audio Output Selection
AUX Audio Output Selection
12/22
Bits
3
3
Comments
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
0
0
0
Muted
X
X
X
X
X
0
0
1
AUX inputs selected
X
X
X
X
X
0
1
0
NOT ALLOWED
X
X
X
X
X
0
1
1
ASTB inputs selected
X
X
X
X
X
1
0
0
TV inputs selected
X
X
X
X
X
1
0
1
Encoder inputs selected
X
X
X
X
X
1
1
0
NOT ALLOWED
X
X
X
X
X
1
1
1
NOT ALLOWED
X
0
X
X
X
X
X
X
0 = Stereo
X
1
X
X
X
X
X
X
1 = Mono
X
X
0
0
0
X
X
X
Muted
X
X
0
0
1
X
X
X
NOT ALLOWED
X
X
0
1
0
X
X
X
VCR inputs selected
X
X
0
1
1
X
X
X
ASTB inputs selected
X
X
1
0
0
X
X
X
TV inputs selected
X
X
1
0
1
X
X
X
Encoder inputs selected
X
X
1
1
0
X
X
X
NOT ALLOWED
X
X
1
1
1
X
X
X
NOT ALLOWED
0
X
X
X
X
X
X
X
0 = Stereo
1
X
X
X
X
X
X
X
1 = Mono
STV6410A
I2C BUS SELECTION (continued)
TV Video Output
Register
Address
(HEX)
03
Data
Description
R/C TV Output Selection
1
RF output : adder control
and chroma subcarrier filter
selection
2
Y/CVBS output and
chroma signal selection
04
Bits
3
Chroma switch muting
1
ENCODER R/Csub Clamp
1
AUX R/Csub Clamp
1
RGB output Gain
FB Output
RGB ouputs selection
2
2
2
Comments
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
X
X
0
Red signal selected
X
X
X
X
X
X
X
1
Chroma signal selected
X
X
X
X
X
X
0
X
CVBS to RF output
X
X
X
X
X
X
1
X
Y+C to RF output
X
X
X
X
X
0
X
X
Filter not active
X
X
X
X
X
1
X
X
Filter active
X
X
0
0
0
X
X
X
Y/CVBS & chroma muted
X
X
0
0
1
X
X
X
Y/CVBS_AUX & R/C_AUX
X
X
0
1
0
X
X
X
Y_AUX & R/C_AUX
X
X
0
1
1
X
X
X
Y/CVBS _VCR & C_VCR
X
X
1
0
0
X
X
X
CVBS_ASTB & Chr. muted
X
X
1
0
1
X
X
X
Y/CVBS_ENC & R/C_ENC
X
X
1
1
0
X
X
X
Y_ENC & C_ENC
X
X
1
1
1
X
X
X
NOT ALLOWED
X
0
X
X
X
X
X
X
Chroma Output controlled by
d5-d4-d3 from register 03.
X
1
X
X
X
X
X
X
Chroma Output forced to mute.
X
X
X
X
X
X
X
0
Bottom Level Clamp
X
X
X
X
X
X
X
1
Average Level Clamp
X
X
X
X
X
X
0
X
Bottom Level Clamp
X
X
X
X
X
X
1
X
Average Level Clamp
X
X
X
X
0
0
X
X
+6dB gain
X
X
X
X
1
1
X
X
+3dB gain (1dB/Step)
X
X
0
0
X
X
X
X
FB forced to low level
X
X
0
1
X
X
X
X
FB forced to high level
X
X
1
0
X
X
X
X
FB from Encoder
X
X
1
1
X
X
X
X
FB from AUX
0
0
X
X
X
X
X
X
Muted
0
1
X
X
X
X
X
X
RGB_Encoder selected
1
0
X
X
X
X
X
X
RGB_AUX selected
1
1
X
X
X
X
X
X
NOT ALLOWED
13/22
STV6410A
I2C BUS SELECTION (continued)
VCR And AUX Video Outputs
Register
Address
(HEX)
Description
Bits
Data
05
VCR Y/CVBS & Chroma
Outputs Selection
3
VCR Chroma Output
Muting
1
AUX Video Output
Selection
3
AUX Chroma Output
Muting
1
Comments
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
0
0
0
Y/CVBS & chroma muted
X
X
X
X
X
0
0
1
Y/CVBS_AUX & R/C_AUX
X
X
X
X
X
0
1
0
Y_AUX & R/C_AUX
X
X
X
X
X
0
1
1
NOT ALLOWED
X
X
X
X
X
1
0
0
CVBS_ASTB & Chr. muted
X
X
X
X
X
1
0
1
Y/CVBS_ENC & R/C_ENC
X
X
X
X
X
1
1
0
Y_ENC & C_ENC
X
X
X
X
X
1
1
1
Y/CVBS_TV & C_TV
X
X
X
X
0
X
X
X
Chroma Output controlled by d2d1-d0 from register 05.
X
X
X
X
1
X
X
X
Chroma Output forced to mute.
X
0
0
0
X
X
X
X
Y/CVBS & chroma muted
X
0
0
1
X
X
X
X
NOT ALLOWED
X
0
1
0
X
X
X
X
NOT ALLOWED
X
0
1
1
X
X
X
X
Y/CVBS_VCR & C_VCR
X
1
0
0
X
X
X
X
CVBS_ASTB & Chr. muted
X
1
0
1
X
X
X
X
Y/CVBS_ENC & R/C_ENC
X
1
1
0
X
X
X
X
Y_ENC & C_ENC
X
1
1
1
X
X
X
X
Y/CVBS _TV & C_TV
0
X
X
X
X
X
X
X
Chroma Output controlled by d6d5-d4 from register 05.
1
X
X
X
X
X
X
X
Chroma Output forced to mute.
Slow Blanking Switches
Register
Address
(HEX)
06
Data
Description
Slow Blanking TV SCART
Slow Blanking VCR SCART
Slow Blanking AUX SCART
14/22
Bits
2
2
2
d7 d6 d5 d4 d3 d2 d1 d0
Comments
X
X
X
X
X
X
0
0
Input mode
X
X
X
X
X
X
0
1
Output < 2V
X
X
X
X
X
X
1
0
Output 16/9 format
X
X
X
X
X
X
1
1
Output 4/3 format
X
X
X
X
0
0
X
X
Input mode
X
X
X
X
0
1
X
X
Output < 2V
X
X
X
X
1
0
X
X
Output 16/9 format
X
X
X
X
1
1
X
X
Output 4/3 format
X
X
0
0
X
X
X
X
Input mode
X
X
0
1
X
X
X
X
Output < 2V
X
X
1
0
X
X
X
X
Output 16/9 format
X
X
1
1
X
X
X
X
Output 4/3 format
STV6410A
I2C BUS SELECTION (continued)
Standby Modes Selection
Register
Address
(HEX)
07
Data
Description
AUX Clamps Disabling
1
VCR Clamps Disabling
1
ASTB Clamps Disabling
1
TV Clamps Disabling
1
Encoder Clamps Disabling
1
TV/RGB Output Disabling
1
AUX Output Disabling
VCR Output Disabling
08
Bits
1
1
CINCH Output Disabling
1
RF MOD Output Disabling
1
d7 d6 d5 d4 d3 d2 d1 d0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Comments
0
Clamp Active
X
1
Clamp Disabled
0
X
Clamp Active
X
1
X
Clamp Disabled
0
X
X
Clamp Active
1
X
X
Clamp Disabled
X
X
X
X
0
X
X
X
Clamp Active
X
X
X
X
1
X
X
X
Clamp Disabled
X
X
X
0
X
X
X
X
Clamp Active
X
X
X
1
X
X
X
X
Clamp Disabled
X
X
0
X
X
X
X
X
Audio & Video Outputs ON
X
X
1
X
X
X
X
X
Audio & Video Outputs OFF
X
0
X
X
X
X
X
X
Audio & Video Outputs ON
X
1
X
X
X
X
X
X
Audio & Video Outputs OFF
0
X
X
X
X
X
X
X
Audio & Video Outputs ON
1
X
X
X
X
X
X
X
Audio & Video Outputs OFF
X
X
X
X
X
X
X
0
CINCH Output ON
X
X
X
X
X
X
X
1
CINCH Output OFF
X
X
X
X
X
X
0
X
RF MOD Output ON
X
X
X
X
X
X
1
X
RF MOD Output OFF
Output Signals (Read Mode)
Data Byte
Register
Address
(HEX)
Data
Description
Slow Blanking TV SCART
Slow Blanking VCR SCART
Slow Blanking AUX SCART
Bits
2
2
2
d7 d6 d5 d4 d3 d2 d1 d0
Comments
X
X
X
X
X
X
0
1
Input < 2V
X
X
X
X
X
X
1
0
Input 16/9 format
X
X
X
X
X
X
1
1
Input 4/3 format
X
X
X
X
0
1
X
X
Input < 2V
X
X
X
X
1
0
X
X
Input 16/9 format
X
X
X
X
1
1
X
X
Input 4/3 format
X
X
0
1
X
X
X
X
Input < 2V
X
X
1
0
X
X
X
X
Input 16/9 format
X
X
1
1
X
X
X
X
Input 4/3 format
15/22
STV6410A
I2C BUS SELECTION (continued)
Power-on Reset - Bus Register Initial Conditions
Power on reset is active when the power supply voltage is below (Tbf) volts.
Not significant bits (X) are preset to "0"
Register
DATA
Address
d7 d6 d5 d4 d3 d2 d1 d0
HEX
COMMENTS
00
0
0
0
0
0
0
0
0
Audio TV Output Muted,Stereo Mode,0dB Gain, 0dB Gain Adjustment.
01
0
0
0
0
0
0
0
0
Audio Cinch Output Muted,0 dB Gain, 0dB Gain Adjustment.
02
0
0
0
0
0
0
0
0
Audio VCR Output Muted,Audio AUX Output Muted.
03
0
0
0
0
0
0
0
0
Red signal selected on R/C_TV output, CVBS to RF ouput,TV video and
chroma switches muted, Chroma ouput controlled by d5-d4-d3 from
register 03.
04
0
0
0
0
0
0
0
0
Encoder R/Csub Bottom Level Clamp,AUX R/Csub Bottom Level Clamp,
RGB Outputs 6dB Gain, FB Output forced to 0V, RGB outputs muted.
05
0
0
0
0
0
0
0
0
VCR Video and chroma switches Muted, VCR Chroma Output controlled
by d2-d1-d0 from register 05,AUX Video and chroma switches Muted,
AUX Chroma Output controlled by d6-d5-d4 from register 05.
06
0
0
0
0
0
0
0
0
TV SCART Slow Blanking Input Mode,VCR SCART Slow Blanking Input
Mode, AUX SCART Slow Blanking Input Mode.
07
0
0
0
0
0
0
0
0
AUX, VCR, ASTB, TV, ENCODER Clamps Active ; TV/RGB, AUX, VCR
Outputs ON.
08
0
0
0
0
0
0
0
0
Cinch, RF Mod Outputs ON.
16/22
STV6410A
INPUT/OUTPUT GROUPS
Figure 1 : Bottom Clamped Video Inputs (Pins 24,
26, 30, 32 ,34, 36, 38, 44, 46, 50, 52)
VCC 8V
Figure 2 : Average Clamped Video Inputs
(Pins 40, 48, 54)
VCC 8V
VCC 8V
VCC 8V
2V + VD
IB
25kW
25kW
3V
15kW
6410A-03.EPS
tri
Protected Pad
Figure 3 : Audio Inputs (5 Stereo)
(Pins 35-37, 39-41, 47-49, 53-56)
6410A-04.EPS
tri
Protected Pad
Figure 4 : Audio Outputs (4 Stereo +1)
(Pins 58, 59, 60-62, 4-6, 8)
VCC 8V
VCC 8V
50kW
VCC/2
60W
Protected Pad
Figure 5 : Trap Filter (Pin 11)
Protected Pad
6410A-06.EPS
6410A-05.EPS
IB
Figure 6 : Video Outputs
(Pins 61, 63, 1, 3, 5, 7, 9, 13,15)
VCC 8V
VCC 8V
VCC 8V
VCC 8V
50W
100W
5kW
5kW
Protected Pad
6410A-08.EPS
Protected Pad
6410A-07.EPS
1kW
17/22
STV6410A
INPUT/OUTPUT GROUPS (continued)
Figure 7 : VREF External Capacitor (Pin 51)
Figure 8 : Slow Blanking (Pins 25, 27, 31)
VCC 12V
VCC 8V
VCC 8V
40kW
VCC 12V
1kW
IB
25kW
IB
80kW
40kW
Figure 9 : Input Fast Blanking (Pins 18, 19)
80kW
Protected Pad
6410A-10.EPS
6410A-09.EPS
Protected Pad
Figure 10 : Output Fast Blanking (Pin 17))
1kW
VCC 8V
VCC 8V
50W
Protected Pad
Figure 11 : I2C Bus (Add) (Pin 20)
Protected Pad
Figure 12 : I2C Bus (SCL) (Pin 21)
VCC 8V
VCC 8V
18/22
6410A-13.EPS
Protected Pad
6410A-14.EPS
10kW
10kW
Protected Pad
6410A-12.EPS
6410A-11.EPS
25kW
STV6410A
INPUT/OUTPUT GROUPS (continued)
Figure 13 : I2C Bus (SDA) (Pin 22)
VCC 8V
Acknowledge
6410A-15.EPS
10kW
Protected Pad
APPLICATION DIAGRAM
R
SCART1
TV
RF MOD
SCART3
VCR
R/C
C
G
B
FAST BLANK
CVBS/Y
AUDIO L
AUDIO R
CVBS/Y
AUDIO L
AUDIO R
SLOW BLANK
CVBS
AUDIO L+R
CVBS/Y
C
AUDIO L
AUDIO R
CVBS/Y
C
AUDIO L
AUDIO R
SLOW BLANK
STV6410A
R, G, B, FB
SWITCHES
CVBS/Y
SWITCHES
CHROMA
SWITCHES
AUDIO
SWITCHES
SLOW BLANK,
I/O CONTROL
R/C
G
B
FAST BLANK
CVBS/Y
C
AUDIO L
AUDIO R
Y
CVBS
AUDIO L
AUDIO R
R/C
G
B
FAST BLANK
CVBS/Y
AUDIO L
AUDIO R
Y
CVBS/Y
C
AUDIO L
AUDIO R
SLOW BLANK
CINCH
OUTPUT
ENCODER
ANALOG
STB
SCART2
AUX
6410A-16.EPS
AUDIO L
AUDIO R
19/22
STV6410A
APPLICATION NOTE
2 - Video Part
2.a - Inputs
Video inputs need to be AC coupled. But only some
small capacitor values are requested thanks to the
internal clamps provided by these devices. Usually
some 100nF HF capacitors (47nF to 220nF) are
enough to provide good performances on Y,
CVBS,RGB and C inputs.
Chrominance inputs : - average clamp - that means
that the DC is measured as the average value of the
input signal and set to an internal reference (close
to 3V). The dynamic allowed is more than 1.5V.
RGB, Y, CVBS inputs : - bottom sync top clamp that means that the DC level is measured at the
lowest value of the input signal and set to an
internal reference (close to 2V). The dynamic allowed is more than 1.5V.
1 - Audio Part
1.a - Inputs
The audio inputs are designed to follow sources up
to (at least) 2VRMS (that is around 6VPP) with an
expected DC level of VCC/2 (4V typ.). That’s why
the device is providing this DC polarization. That
means that in most of the cases the inputs are AC
coupled via chemical capacitors. The recommended values are 1µF, 2.2µF or 4.7µF (internal
polar. is made via a 50kΩ resistor). I want to point
out that the internal polarization is filtered by an
external capacitor (on Pin called ‘VREF’). This capacitor contribute to good performance of the device. Its value should be 47µF or more (coupled
with an 47nF HF cap. for internal video references).
Figure 14 : Audio Inputs
4.7m F
220W
L/R Audio
Figure 16 : Video Inputs
Audio In
NB: In some particular cases (loopback from outputs to inputs) the AC coupling capacitor can be
removed... but some small offsets in the audio
chain can cause some noise while switching from
one input to another.
20/22
75W
STV6410A
Video Out
75W
Video
470W
(4.7kW )
STV6410A
1kW
6410A-20.EPS
L/R Audio
6410A-18.EPS
STV6410A
Video In
Figure 17 : Video (and Fast Blanking) Outputs
Figure 15 : Audio Outputs
Audio Out
Y/C/CVBS/RGB
2.b - Outputs
On these devices the video outputs are NOT ABLE
to drive 150Ω. That means that external buffers (one
simple NPN-Transistor per output) are needed. To
reduce the external components, the output DC
level have been chosen to allow a direct drive of the
base of the output follower (NPN). The emitters of
the NPNs will be polarized to ground via 1kΩ resistors (more or less) and will drive the outputs through
some 75Ω resistors. Do not forget to bufferize your
favourite UHF modulator video input...
Chrominance outputs have a DC of 2.3V (it is an
average value) and Luminance type output have a
DC of 1.3V (it is a bottom value).
1.b - Outputs
Audio output buffers are able to provide more than
2.1VRMS (around 6VPP) on a typical load of 10kΩ
(in fact a 2kΩ load is acceptable). The DC level is
once more VCC/2 for best dynamic performance.
Usually some AC coupling capacitors are used at
the outputs. To drive some typical 10kΩ loads, it is
normal to use capacitors with value 5 to 10 times
the value of the input capacitors. That gives a value
between 4.7µF and 47µF. Moreover it can be a
good idea to insert resistors (220Ω or 470Ω) in the
audio outputs. That will provide a protection for
output stages. No external drivers or buffers are
needed in typical use of the device.
4.7m F
100nF
6410A-19.EPS
STV6410A
6410A-17.EPS
220W
12kW
STV6410A
APPLICATION NOTE (continued)
2.c - Fast Blanking
Fast Blanking signal is used to make an equipment
consider its RGB inputs for full-screen display or
fast insertion (OSD, etc.). The output of such signal
is exactly managed in the same way as RGB (that
is important for levels and delays).
The input is DC coupled (insert a few hundreds
ohms resistors for external input).
2.d - Slow Blanking
Slow Blanking signal is used to make an equipment
consider an external input (e.g. CVBS and
SOUND). The input/output of such signal is very
simple, DC coupled (insert a few hundreds ohms
resistors for external I/O). Notice that this function
is requesting a 12V power supply (on Pin VCC12).
This pin can be left open (not pulled down) if this
function is not used.
3 - I2C Bus
3.a - Address
You can choose the address of the device by
setting the Pin ADD to ground or to VDD. The former
selects 94h and the latter selects 96h. These values correspond to the writeable (or control) registers. Change the lowest bits to ‘1’ (that gives 95h
and 97h) to read the readable register of the device.
One device will answer (acknowledge) to its both
addresses 94h and 95h or 96h and 97h.
3.b - Write Mode
This mode is used to control the device, to select
switches positions, gains, etc.
Send a start condition, the address of the device,
the address of the register (its number), and the
data to put in it. At this point you can send a stop
or send the data of the following registers (that is
what we call auto-increment).
3.c - Read Mode
This mode is used to read some data such as
slow-blanking input signals.
Send a start condition, the address of the device
(+1) and then send one byte clock to read the
unique data register.
N.B.: Do not forget your favourite ESD protections for I/O signals of plugs.
21/22
STV6410A
PACKAGE MECHANICAL DATA
64 PINS - FULL PLASTIC QUAD FLAT PACK (TQFP)
A
A2
e
64
A1
49
48
16
33
E3
E1
E
B
1
0,10 mm
.004 inch
SEATING PLANE
c
Dimensions
A
A1
A2
B
C
D
D1
D3
e
E
E1
E3
L
L1
K
Min.
0.05
1.35
0.17
0.09
0.45
Millimeters
Typ.
1.40
0.22
12.00
10.00
7.50
0.50
12.00
10.00
7.50
0.60
1.00
Max.
1.60
0.15
1.45
0.27
0.20
Min.
0.002
0.053
0.007
0.004
1
0.75
0.018
PM-5W.EPS
K
0,25 mm
.010 inch
GAGE PLANE
Inches
Typ.
0.055
0.009
0.472
0.394
0.295
0.0197
0.472
0.394
0.295
0.024
0.039
Max.
0.063
0.006
0.057
0.011
0.008
0.030
0o (Min.), 7o (Max.)
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No licence is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems
without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1998 STMicroelectronics - All Rights Reserved
Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to
the I2C Standard Specifications as defined by Philips.
STMicroelectronics GROUP OF COMPANIES
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22/22
5W.TBL
32
L
D3
D1
D
L1
17