STV6413 ® Audio/Video Switch Matrix Main Features ■ I²C Bus Control ■ Standby Mode with Interrupt Signal Output ■ Video Section ● 3 CVBS Inputs, 2 CVBS Outputs ● 3 Y/C Inputs, 2 Y/C Outputs ● 6 dB Gain on all CVBS/Y and C Outputs ● Integrated 150 W Buffers ● 2 RGB/FB Inputs, 1 Tri-state RGB/FB Output with 6 dB Adjustable Gain (from +3 dB to +9 dB) ● Video Muting on all Outputs ● 2 Slow Blanking Inputs/Outputs ● Sync Bottom Clamp on all CVBS/Y and RGB Inputs, Average Clamp on C Inputs ● Bandwidth: 15 MHz ● Crosstalk: 50 dB Minimum ■ Audio Section ● 3 Stereo Inputs, 3 Stereo Outputs ● Stereo-to-Mono Sound Capability ● 0/6/9 dB Selectable Gain on one Stereo Input ● Full Range Volume Control with Soft Control ● Audio Muting on all Outputs TQFP64 (10 x 10 x 1.40 mm) (Thin Full Plastic Quad Flat Pack) Order Codes: STV6413D (Tray) STV6413DT (Tape and Reel) Description The STV6413 is a highly integrated I²C buscontrolled audio and video switch matrix, optimized for use in digital set-top box applications. It provides the audio and video routings required in a two SCART set-top box design. In a TQFP64 (10 x 10 mm) package, the STV6413 is compatible with the STV6412A (TQFP64 14 x 14 mm) used for designing boards with two levels of integration. February 2004 This is preliminary information on a new product now in development. Details are subject to change without notice. 1/28 STV6413 Table of Contents Chapter 1 1.1 Chapter 2 General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 I/O Pin Description ............................................................................................................ 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 2.1 Absolute Maximum Ratings ................................................................................................ 8 2.2 Thermal Data ...................................................................................................................... 8 2.3 Latch-up Data ....................................................................................................................... 8 2.4 Electrical Characteristics ...................................................................................................... 9 Chapter 3 I²C Bus Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 3.1 I²C Bus Addresses ............................................................................................................. 15 3.2 Power-on Reset — Bus Register Initial Conditions ............................................................ 20 Chapter 4 Input/Output Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Chapter 5 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Chapter 6 Package Mechanical Data Chapter 7 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27 2/28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 STV6413 1 General Information General Information Figure 1: STV6413 Pinout Diagram 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 LOUT_TV NC NC NC VCCB 5 BOUT_TV VCCB 4 GOUT_TV GNDB R/COUT_TV VCCB 3 Y/CVBSOUT_TV VCCB 2 COUT_VCR VCCB 1 Y/CVBSOUT_VCR FBOUT_TV FBIN_VCR FBIN_ENC C_GATE VDD NC SCL SDA GND IT_OUT SLB_TV R/CIN_VCR SLB_VCR GIN_VCR VCC12 BIN_VCR 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 STV6413 ROUT_TV VCCAO LOUT_VCR ROUT_VCR LOUT_CINCH ROUT_CINCH NC GNDA VCCA RIN_TV LIN_TV CVBSIN_TV RIN_VCR LIN_VCR Y/CVBSIN_VCR GND 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 DECA NC BIN_ENC LIN_ENC GIN_ENC RIN_ENC R/CIN_ENC NC CIN_ENC NC YIN_ENC GND Y/CVBSIN_ENC DECV NC VCC 1.1 I/O Pin Description Table 1: Pin Description (Sheet 1 of 3) Pin No. Name Function 1 VCC 2 NC 3 DECV Video Decoupling Capacitor 4 Y/CVBSIN_ENC Y/CVBS Input from Encoder 5 GND 6 YIN_ENC 7 NC +5 V Supply Not connected Ground Y Input from Encoder Not connected 3/28 General Information STV6413 Table 1: Pin Description (Sheet 2 of 3) Pin No. Name 8 CIN_ENC 9 NC 10 R/CIN_ENC Red/Chroma Input from Encoder 11 RIN_ENC Audio Right, Input from Encoder 12 GIN_ENC Green Input from Encoder 13 LIN_ENC Audio Left, Input from Encoder 14 BIN_ENC Blue Input from Encoder 15 NC 16 DECA Audio Decoupling Capacitor 17 GND Ground 18 Y/CVBSIN_VCR 19 LIN_VCR Audio Left, Input from VCR SCART 20 RIN_VCR Audio Right, Input from VCR SCART 21 CVBSIN_TV 22 LIN_TV Audio Left, Input from TV SCART 23 RIN_TV Audio Right, Input from TV SCART 24 VCCA Audio Supply Voltage - or - Audio Supply Decoupling 25 GNDA Audio Ground 26 NC Not Connected 27 ROUT_CINCH Audio Right Output to Cinch 28 LOUT_CINCH Audio Left Output to Cinch 29 ROUT_VCR Audio Right Output to VCR SCART 30 LOUT_VCR Audio Left Output to VCR SCART 31 VCCAO 32 ROUT_TV Audio Right Output to TV SCART 33 LOUT_TV Audio Left Output to TV SCART 34 NC Not connected 35 NC Not connected 36 NC Not connected 37 VCCB5 38 BOUT_TV 39 VCCB4 40 GOUT_TV 41 GNDB 42 R/COUT_TV 4/28 Function Chroma Input from Encoder Not connected Not Connected Y/CVBS Input from VCR SCART CVBS Input from TV SCART Audio Output Supply Voltage - or - Main Audio Supply Voltage Video Output Buffer Supply Pin Blue Output to TV SCART Video Output Buffer Supply Pin Green Output to TV SCART Video Buffer Ground Red/Chroma Output to TV SCART STV6413 General Information Table 1: Pin Description (Sheet 3 of 3) Pin No. Name Function 43 VCCB3 Video Output Buffer Supply Pin 44 Y/CVBSOUT_TV Y/CVBS Output to TV SCART 45 VCCB2 Video Output Buffer Supply Pin 46 COUT_VCR Chroma Output to VCR SCART 47 VCCB1 Video Output Buffer Supply Pin 48 Y/CVBSOUT_VCR Y/CVBS Output to VCR SCART 49 FBOUT_TV Fast Blanking Output to TV SCART 50 FBIN_VCR Fast Blanking Input from VCR SCART 51 FBIN_ENC Fast Blanking Input from Encoder 52 C_GATE 53 VDD +5 V I²C Supply 54 NC Not connected 55 SCL I²C Bus Clock 56 SDA I²C Bus Data 57 GND Ground Digital 58 IT_OUT Interrupt Output 59 SLB_TV Slow Blanking Input/Output from TV SCART 60 R/CIN_VCR 61 SLB_VCR Slow Blanking Input/Output from VCR SCART 62 GIN_VCR Green Input from VCR SCART 63 VCC12 64 BIN_VCR External MOS Command for C_VCR bidirectional mode Red Input (or C Input) from VCR SCART +12 V Supply Blue Input from VCR SCART 5/28 General Information STV6413 Figure 2: STV6413 Block Diagram FBIN_ENC FBIN_ENC FBIN_VCR FBIN_VCR FBOUT_TV FB Switch BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC R/CIN_VCR Mute BIN_ENC BIN_VCR GIN_ENC GIN_VCR R/CIN_ENC 3 to 9 dB BOUT_TV 3 to 9 dB GOUT_TV R/CIN_VCR 3 to 9 dB RGB Switch R/COUT_TV R/CIN_VCR CIN_ENC R/CIN_ENC Mute CIN_ENC 6 dB C Switch Y/CVBSIN_VCR YIN_ENC Y/CVBSIN_ENC Mute Y/CVBSIN_VCR YIN_ENC 6 dB Y/CVBS Switch Y/CVBSIN_ENC Mute CIN_ENC R/CIN_ENC Mute Y/CVBSOUT_TV C_GATE 6 dB COUT_VCR C Switch CVBSIN_TV Y_ENC Y/CVBSIN_ENC Mute CVBSIN_TV Slow Blank Monitor Interrupt Signal 6 dB IT_OUT SLB_TV SLB_VCR Y/CVBSOUT_VCR Y/CVBS Switch LIN_ENC 0/6/9 dB LIN_ENC LIN_TV Stereo/ Mono RIN_ENC RIN_TV Mute LIN_TV LOUT_VCR ROUT_VCR 0/6 dB ROUT_CINCH 0/6 dB LOUT_CINCH VCR Switch RIN_ENC RIN_TV LIN_VCR RIN_VCR 0/6/9 dB LIN_ENC LIN_VCR LIN_TV -62 dB RIN_ENC RIN_VCR RIN_TV Mute TV Switch 6/28 -62 dB 0/6 dB Stereo/ Mono LOUT_TV ROUT_TV 0/6 dB I²C Bus Decoder SDA SCL STV6413 General Information Figure 3: STV6413 Functional Diagram AUDIO LEFT AUDIO RIGHT R/C STV6413 G R/C B G FAST BLANKING CVBS SCART1 TV AUDIO LEFT B RGB and FB SWITCHES AUDIO RIGHT AUDIO RIGHT FAST BLANKING CVBS/Y C CVBS/Y AUDIO LEFT CINCH OUTPUT ENCODER AUDIO LEFT CVBS/Y SWITCHES AUDIO RIGHT Y SLOW BLANKING CHROMA SWITCHES R/C G B FAST BLANKING AUDIO SWITCHES CVBS/Y AUDIO LEFT AUDIO RIGHT SCART2 CVBS/Y MCU INTERRUPT SLOW BLANKING, I/O CONTROL C AUDIO LEFT AUDIO RIGHT SLOW BLANKING 7/28 Electrical Characteristics STV6413 2 Electrical Characteristics 2.1 Absolute Maximum Ratings Symbol Parameter Value Unit VCC12 Supply voltage for Slow Blanking sections 13.2 V VCCAO Supply voltage for Audio Drivers 13.2 V VCCA Supply voltage for Digital Audio sections 10 V VDD Supply voltage for Digital sections 6 V VCC, VCCBI Supply voltage for Video sections 6 V 0, VCCA 0, VCC or VCCBI 0, 5.5 0, VCC12 V ±4 kV 0 to +70 °C -20 to +150 °C Value Unit Audio pins Video pins Bus pins Slow Blanking pins Input Voltage at Pin (in reference to GND) VIN VESD Maximum ESD Voltage allowed. (Human Body Model: 100 pF capacitor discharged through 1.5 kOhm serial resistor) TOPER Ambient Operating Temperature TSTG Storage Temperature 2.2 Thermal Data Symbol Parameter RthJC Junction-to-Case Thermal Resistance RthJA Junction-to-Ambient Thermal Resistance1 °C/W 48 Maximum Recommended Junction Temperature TJ °C/W °C 1. Measured on 4-layer application board. 2.3 Latch-up Data At an ambient temperature of 25 °C, all pins meet the following specifications: 8/28 ● I trigger = 200 mA or I trigger = -200 mA. ● Pin 58 (IT_OUT) does not meet this specification and the trigger current must be limited to 100 mA. STV6413 2.4 Electrical Characteristics Electrical Characteristics TAMB = 25° C, VCCAO = 12 V, VCC = 5 V, VCC12 = 12 V, VDD = 5 V RGA = 600 W, RGV = 50 W, RLOUTA = 10 kW, RLOUTV = 150 W (unless otherwise specified). Supply Section Parameter Symbol VDD Test Conditions Digital Supply Voltage - Decoupling capacitor on VCCA - Connected to VCCA Min. Typ. Max. Unit 4.75 5 5.25 V 11.2 8.5 12 9 12.8 9.5 V VCCAO Audio Operating Supply Voltage VCC Video Operating Supply Voltage 4.75 5 5.25 V Slow Blanking Control Supply Voltage 11.2 12 12.8 V Min. Typ. Max. Unit 4.5 10 mA 9 15 mA 43 60 mA 0 2.5 1 4 mA Typ. Max. Unit 4.5 10 mA VCC12 Active Mode (All channels ON) Symbol Parameter Test Conditions IDD Digital Supply Current VDD = 5 V ICCA Audio Supply Current VCCAO = 12 V, No Load ICCV Total Video Supply Current (VCC+VCCB1+VCCB2+VCCB3+VCCB4+V VCC = 5 V, No Load CCB5) ICC12 12 V Supply Current VCC12 = 12 V SLB input mode SLB output mode, No Load Standby Mode (All channels OFF) Symbol Parameter Test Conditions Min. IDD Digital Supply Current VDD = 5 V ICCASTD Audio Supply Current VCCAO = 12 V, No Load 3 mA ICCVSTD Total Video Supply Current VCC = 5 V, No Load 1 mA Audio Section Symbol Parameter Test Conditions SVR100 Supply Voltage Rejection VRIPPLE = 500 mVRMS at 100 Hz, Gain= 0 dB DECA filter cap = 47 µF DECA filter cap = 220 µF SVR1K Supply Voltage Rejection VRIPPLE = 500 mVRMS at 1 kHz, Gain = 0 dB Min. Typ. 60 70 80 70 80 Max. Unit dB dB 9/28 Electrical Characteristics Symbol Parameter VINDC Input DC Level VINAC Input Signal Amplitude RIN STV6413 Test Conditions Min. VCCA = 9 V Typ. Max. VCCA/2 V 2 Input Resistance 30 RINmatch Input Resistance Matching FRANGE Bandwidth -3 dB, 0.5 VRMS, RLOAD = 10 kW, Gain = 0 dB Flatness Spread of Gain in Audio Band -0.5 VRMS, 20 Hz to 20 kHz, Gain = 0 dB 50 ±2 Unit VRMS kW ±10 50 % kHz 0.5 dB CS Channel Separation, from audio inputs VIN = 0.5 VRMS at 1 kHz on one input, RLOAD = 10 kW, Gain = 0 dB Between L & R of TV outputs Ci Channel Isolation from video inputs VIN = 1 VPP at 15 kHz on one point VOUT Output DC Level VCCA = 9 V VOFF DC Offset Change Switching between inputs ROUT Output Resistance PHD Phase Difference 1 VRMS input on each input channel at 1 kHz ASN S/N Ratio VIN = 1 VRMS at 1 kHz input weighted CCIR 468-4 quasi peak, Gain = 0 dB eNI Equivalent RMS Input Voltage Noise BW = 20 Hz, 20 kHz Flat, Gain = 0 dB G0 0 dB Gain 0.5 VRMS, RLOAD = 10 kW, Gain = 0 dB GSTEP Gain Step -62 dB to +6 dB (see Figure 2) GMATCH1 Gain matching between different inputs of one output VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB -0.5 0.5 dB GMATCH2 Gain matching between Left/Right outputs of one input channel VIN = 0.5 VRMS at 1 kHz, Gain = 0 dB -0.5 0.5 dB 0.05 0.05 0.05 % Total Harmonic Distortion THD0 THD6 THD9 ENC Input at 0 dB ENC Input at 6 dB ENC Input at 9 dB 90 74 dB dB 85 dB VCCA/2 V 1 ±15 mV 60 120 W 3 ° deg. 90 dB 5 µV -0.5 +0.5 2 0.01 0.01 0.01 dB dB 2.1 2.3 VRMS VIN = 1 VRMS, THD = 0.3%, Gain = 0 dB 2 2.25 kW VIN = 0.5 VRMS, on one point 90 Output Clipping Level THD = 0.2%, 1 kHz RL Output Load Resistance Mute Suppression 10/28 80 VOUT = 0.5 VRMS at 1 kHz, LPF at 80 kHz, Volume Level Adjustment = 0 dB VCL Mute 80 70 dB STV6413 Electrical Characteristics Video Section Symbol Parameter Test Conditions VDCIN DC Input Level Bottom Sync Pulse ICLAMP Clamping Current at VDCIN - 400 mV Input Leakage Current VIN = VDCIN +1 V ILEAK CIN Input Capacitance VIN Max Input Signal DYN BW Min. 1 Typ. Max. Unit 2 V 2 mA 1 10 µA 2 pF VCC = 5 V 1.5 VPP Dynamic Output Signal VCC = 5 V 3 VPP Bandwidth at -3 dB - Y/CVBS - RGB VIN = 1 VPP VIN = 1 VPPVINC = muted 15 15 MHz Spread of Gain in Video Band (15 kHz - 5 MHz) - Y/CVBS - RGB VIN = 1 VPP VIN = 1 VPP, VINC = Muted CTi Crosstalk Isolation between Input Channel VIN = 1 VPP at 4.43 MHz on one point 60 dB CTo Crosstalk Isolation between Output Channel VIN = 1 VPP at f = 4.43 MHz, on one point, RLOAD = 150W 50 dB Flatness 12 12 ±0.5 ±0.5 dB 5 10 W 5.5 6 6.5 dB VIN = 1 Vpp, Gain = 6 dB -0.3 0 0.3 dB 3 dB to 6 dB 0.75 1 1.25 dB Gain on Y,/CVBS channels VIN = 1 VPP 5.5 6 6.5 dB Gain matching between Y, CVBS inputs VIN = 1 VPP -0.5 0 0.5 dB DCOUT DC Output Voltage Bottom sync pulse DPHI Differential Phase VIN = 1 VPP at 4.43 MHz 1 5 ° deg. Differential Gain VIN = 1 VPP at 4.43 MHz 1 5 % Mute Mute Suppression VIN = 1 VPP at 5 MHz on one point LNL Luminance non-linearity VSN Video S/N Ratio ROUT Output Resistance GRGB Gain at RGB outputs VIN = 1 Vpp, Gain = 6 dB Gain matching between R, G, B GRGBM GRGBSTEP Step of Gain GYCVBS GYCVBSM DG 0.6 55 dB 0.3 Refer to Note 1 V 65 3 % dB Note: 1 S/N = 20 log (VOUT Black to White = 0.7 VPP / VNoise (mVRMS) weighted CCIR 567). 11/28 Electrical Characteristics STV6413 Chroma Section Symbol VDCIN Parameter Test Conditions Min. DC Input Level Typ. Max. Unit 3 V 50 kW 2 pF 1.5 VPP RIN Input Resistance CIN Input Capacitance VIN Max Input Signal DYN Dynamic Output Signal 3 VPP DCOUT DC Output VCR Voltage 2.2 V 30 Chroma Bandwidth CIN = 1 VPP at -3 db CTi Crosstalk Isolation between Input Channel VIN = 1 VPP at 4.43 MHz on one input 55 dB CTo Crosstalk Isolation between Output Channel VIN = 1 VPP at 4.43 MHz on one input, RLOAD = 150 W 50 dB CBW ROUT 10 Output Resistance GOUTC MHz 5 10 W Gain at OUTC VIN = 1 Vpp 5.5 6 6.5 dB GCM Gain Matching between C inputs VIN = 1 VPP -0.5 0 0.5 dB Mute Mute Suppression VIN = 1 VPP at 4.43 MHz on one input CToYdel Chroma to Luma Delay, Source Y/C VPP at 4.43 MHz, CToYdel Chroma to Luma Delay, Source Y/C 55 dB 20 ns 20 ns Slow Blanking Section Symbol Parameter Test Conditions Min. Typ. Max. Unit Input Mode SLBlow Input Low Level Threshold 2.5 3.25 4 V SLBhigh Input High Level Threshold 7.5 8.25 9 V 50 100 µA IIN Input Current Output Mode SLBlow Output Low Level (Int. TV) 0 0.02 1.5 V SLBmed Output Medium Level (Ext. 16:9) 5 5.75 6.5 V SLBhigh Output High Level (Ext. 4:3) 10 11 12 V 12/28 STV6413 Electrical Characteristics Fast Blanking Section Symbol Parameter Test Conditions Min. Typ. Max. Unit 0.4 0.7 0.9 V 2 10 µA 0.5 V 3.8 V Input Mode FBlow/high Input Low/High Level Threshold IIN Input Current Output Mode FBLOW Output Low Level FBHIGH Output High Level FBDEL FBTRANS RLOAD = 150 W 3.0 Fast Blanking RGB delay At 50% on digital RGB transients, at 2 V on FB rise transient, at 1 V on FB fall, CLOAD = 10pF maximum FB Transitions at FB output - Rise Time - Fall Time CLOAD = 10 pF maximum between 10% and 90% between 90% and 10% 3.4 15 ns 10 10 ns C_Gate Function Output Section Symbol Parameter Test Conditions Min. C_GATE-H Pull-up Resistor Value to VCCB1 C_GATE-L Output Low Level Typ. Max. 20 IIN = 0 mA IIN = 1 mA Unit kW 0.3 0.7 V Max. Unit Interrupt Output Section1 Symbol Parameter Test Conditions Min. Typ. IT-Leak High Level Leakage External pull-up to 5 V 10 µA IT-Low Output Low Level (Active) IIN = 0 mA IIN = 1 mA 0.3 0.7 V 1. When bit IT Enable is set, the interrupt is forced to a low level when a change is detected on slow blanking inputs. It can be used in standby mode to wake up the microprocessor. It is released when the I²C bus register is read. 13/28 Electrical Characteristics STV6413 I²C Bus Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Unit SCL VIL Low Level Input Voltage -0.3 1.5 V VIH High Level Input Voltage 2.3 5.5 V ILI Input Leakage Current 10 µA VIL Low Level Input Voltage -0.3 1.5 V VIH High Level Input Voltage 2.3 5.5 V ILI Input Leakage Current 10 µA CI Input Capacitance 10 pF tR Input Rise Time 1.5 V to 3 V 1 µs tF Input Fall Time 3 V to 1.5 V 300 ns Low Level Output Voltage IOL = 3 mA 0.4 V tF Output Fall Time 3 V to 1.5 V 250 ns CL Load Capacitance 400 pF VIN = 0 to 5.5 V -10 0 SDA VOL VIN = 0 to 5.5 V -10 0 Timing tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4 µs tSU,DAT Data Setup Time 250 ns tHD,DAT Data Hold Time 0 tSU,STO Setup Time from Clock High to Stop 4 µs 4.7 µs 4 µs 4.7 µs tBUF Start Setup Time following a Stop tHD,STA Start Hold Time tSU,STA Start Setup Time following Clock Low to High Transition Figure 4: I²C Bus Timing SDA tBUF tF tLOW SCL tHD,STA tHD, DAT tR tHIGH tSU, DAT SDA (Start, Stop) 14/28 tSU, STA tSU, STO 340 ns STV6413 3 I²C Bus Selection I²C Bus Selection Data transfers follow the usual I²C format; i.e. after the start condition (S), a 7-bit slave address is sent, followed by an eight-bit data direction bit (W). An 8-bit sub-address is sent to select a register, followed by an 8-bit data word to be included in the register. The IC’s I²C bus decoder enables the automatic incrementation mode in write mode. String Format Write only mode (S = Start condition, P = Stop condition, A = Acknowledge) S Slave Address 0 A Sub-address A Data A P A Data A P Read only mode S Slave Address 1 Slave Address Address A7 A6 A5 A4 A3 A2 A1 Value 1 0 0 1 0 1 1 Auto Increment Mode S Slave Address 0 A Sub-address A Data0 A Data1 Sub-address 3.1 A ... Sub-address +1 Data n A P Sub-address + N I²C Bus Addresses Write Address: 1001 0110 = 96(hex), Read Address: 1001 0111 = 97(hex) Table 2: Input Signal Summary (Write Mode) Reg. Add. Data d7 d6 00h TV Stereo Mono TV 0/6 dB 01h VCR Stereo Mono Not Used (See Note 1) d5 d4 d3 d2 d1 d0 Audio TV Volume-62 dB to 0 dB - 2 dB steps VCR Audio Switch Control Soft Volume Mode CINCH Audio Gain TV/CINCH Audio Switch Control TV Chroma muted TV Video and Chroma Switch Control Video 02h VCR Chroma muted VCR Video and Chroma Switch Control 03h RGB and FB Tri-state RGB Gain RGB Switch Control Fast Blanking Mode/Input Selection 15/28 I²C Bus Selection STV6413 Table 2: Input Signal Summary (Write Mode) Data Reg. Add. d7 d6 d5 d4 d3 d2 d1 d0 IT Enable SLB Mode Not Used (See Note 1) VCR-C Output Control VCR-C Gate Control Not Used (See Note 1) Not Used (See Note 1) TV R or C Output Selection Miscellaneous 04h 05h VCR Slow Blanking ENC Audio Input Gain 0/6/9 dB TV Slow Blanking VCR R/C sub ENC R/C sub Clamp Clamp Standby 06h Not Used (See Note 1) TV Outputs CINCH Outputs VCR Outputs Not Used (See Note 1) TV Inputs VCR Inputs ENC Inputs Note: 1 At register address 06h, bits marked “Not Used” must be set to “1”. All other bits marked “Not Used” must be set “0”. Table 3: TV Audio Output Reg. Add. Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Soft Volume Change 1 X X X X X X X X X X X X X X 0 1 Active Disabled Level Adjustment 5 X X X X 0 1 0 1 0 1 0 1 0 1 X X 0 dB -62 dB (-2 dB/step) 6 dB Extra Gain 1 X X 0 1 X X X X X X X X X X X X 0 dB +6 dB TV Stereo or Mono Mode 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono 00h 16/28 STV6413 I²C Bus Selection Table 4: Audio Selection & VCR Audio Output Reg. Add. 01h Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Muted Encoder L/R selected VCR L/R selected Not allowed TV L/R selected Not allowed Not allowed Not allowed TV & CINCH Audio Output Selection 3 X X X X X X X X CINCH Audio Gain 1 X X X X X X X X 0 1 X X X X X X 0 dB Follow TV Gain VCR Audio Output Selection 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Muted Encoder L/R selected TV L/R selected Not allowed VCR Stereo or Mono Mode 1 0 1 X X X X X X X X X X X X X X 0 = Stereo 1 = Mono d1 d0 Table 5: TV & VCR Video Selection Reg. Add. Data Description Bits TV Video Output Selection 3 TV Chroma Output Control 1 Comments d7 d6 d5 d4 d3 d2 X X X X X 0 0 0 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 0 0 1 1 1 1 0 1 1 0 0 1 1 1 0 1 0 1 0 1 Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC Y/CVBS_VCR & R/C_VCR Not allowed Not allowed Not allowed Not allowed X X X X X X X X 0 1 X X X X X X Chroma defined by d2d1d0 Chroma force to mute X 0 0 0 X X X X X X X X X X X 0 0 0 1 1 1 1 0 1 1 0 0 1 1 1 0 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X Y/CVBS muted & Chroma muted Y/CVBS_ENC & R/C_ENC Y_ENC & C_ENC CVBS_TV & Chroma muted Not allowed Not allowed Not allowed Not allowed 0 1 X X X X X X X X X X X X X X Chroma defined by d6d5d4 Chroma force to mute 02h VCR Video Output Selection 3 VCR Chroma Output Control 1 17/28 I²C Bus Selection STV6413 Table 6: RGB & Fast Blanking Outputs Reg. Add. Data Description Fast Blanking Control RGB Selection Bits d6 d5 d4 d3 d2 d1 d0 2 X X X X X X X X X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 FB forced to low level FB forced to high level FB from Encoder FB from VCR 2 X X X X X X X X X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X Muted RGB_ENC selected RGB_VCR selected Not allowed 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X +6 dB gain +5 dB gain +4 dB gain +3 dB gain 1 X X 0 1 X X X X X X X X X X X X +0 dB extra gain +3 dB for weak input signals 0 X X X X X X X 1 X X X X X X X RGB and FB outputs high impedance state RGB and FB outputs active 03h RGB Gain RGB and FB Control Comments d7 1 Table 7: Miscellaneous Control Reg. Add. 04h 18/28 Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 R/C TV Output Selection 1 X X X X X X X X X X 0 0 0 0 0 1 Red signal selected Chroma signal selected C_Gate Output Control 1 X X X X X X X X 0 1 0 0 0 0 X X High level Low level X X X 0 X 0 0 X C_VCR Output Control 1 X X X 1 X 0 0 X Tri-state mode (high impedance) Active X X 0 1 X X X X X X 0 0 0 0 X X Normal Mode SLB TV is driven by SLB VCR 0 1 X X X X X X X X 0 0 0 0 X X No interrupt flag IT enable Slow Blanking Mode 1 IT Enable 1 STV6413 I²C Bus Selection Table 8: Slow Blanking & Inputs Control Reg. Add. Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Encoder R/Csub Clamp 1 X X X X X X X X X X X X X X 0 1 Bottom level clamp Average level clamp VCR R/Csub Clamp 1 X X X X X X X X X X X X 0 1 X X Bottom level clamp Average level clamp Encoder Input Level Adjustment 2 X X X X X X X X X X X X 0 0 1 0 1 0 X X X X X X 0 dB for normal audio inputs +6 dB for weak audio inputs +9 dB for weak audio inputs 2 X X X X X X X X 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 2 0 0 1 1 0 1 0 1 X X X X X X X X X X X X X X X X X X X X X X X X Input mode only Output < 2 V Output 16/9 format Output 4/3 format 05h Slow Blanking TV SCART Slow Blanking VCR SCART Table 9: Standby Modes Reg. Add. 06h Data Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 ENC Inputs 1 1 1 X X X X X X 1 1 X X X X 0 1 Inputs active Inputs disabled VCR Inputs 1 1 1 X X X X X X 1 1 X X 0 1 X X Inputs active Inputs disabled TV Inputs 1 1 1 X X X X X X 1 1 0 1 X X X X Inputs active Inputs disabled VCR Outputs 1 1 1 X X X X 0 1 1 1 X X X X X X Audio & Video Outputs ON Audio & Video Outputs OFF CINCH Outputs 1 1 1 X X 0 1 X X 1 1 X X X X X X Audio & Video Outputs ON Audio & Video Outputs OFF TV Outputs 1 1 1 0 1 X X X X 1 1 X X X X X X Audio & Video Outputs ON Audio & Video Outputs OFF 1 1 1 1 1 1 1 1 Only I²C bus and slow blanking detection parts are supplied. Full Stop 19/28 I²C Bus Selection STV6413 Table 10: Output Signals (Read Mode) Data Reg. Add. Description Bits Comments d7 d6 d5 d4 d3 d2 d1 d0 Slow Blanking TV SCART 2 X X X X X X X X X X X X X X X X X X 0 1 1 1 0 1 Input < 2 V Input 16/9 format Input 4/3 format Slow Blanking VCR SCART 2 X X X X X X X X X X X X 0 1 1 1 0 1 X X X X X X Input < 2 V Input 16/9 format Input 4/3 format Interrupt Flag 1 X X X X X X 0 1 X X X X X X X X No change since read One change has been detected (refer to Note 1) Note: 1 The Interrupt Flag will be cleared when this register is read. To prepare for a new interrupt, a “1” must be re-written in the IT Enable bit (Reg. 04, d7). 3.2 Power-on Reset — Bus Register Initial Conditions Power-on Reset is active when the supply VDD is less than 3.5 volts. Non-significant bits (X) are pre-set to “0”. Reg. Add. Data Comments d7 d6 d5 d4 d3 d2 d1 d0 00h 0 0 0 0 0 0 0 0 Audio TV and Cinch outputs are in Stereo Mode, 0 dB Gain Adjustment. 01h 0 0 0 0 0 0 0 0 TV, Cinch and VCR audio outputs are muted. VCR output is in Stereo Mode. 02h 0 0 0 0 0 0 0 0 VCR, TV video outputs are muted. 03h 0 0 0 0 0 0 0 0 Fast Blanking is forced to ‘0’. RGB outputs are muted and in high impedance. 04h 0 0 0 0 0 0 0 0 C_GATE is high. C_VCR is high impedance. 05h 0 0 0 0 0 0 0 0 Encoder and VCR R/Csub Bottom Level Clamp, RGB outputs 6 dB Gain, and Slow Blanking parts are in read mode. 06h 0 0 0 0 0 0 0 0 All internal blocks are ON. 20/28 STV6413 I²C Bus Selection Figure 5: Volume Control Characteristics 0 -36 ± 0.5 dB 31 18 Step Number ± 0.5 dB + 2 dB -62 dB - 0.5 dB 21/28 Input/Output Groups 4 STV6413 Input/Output Groups Figure 6: Bottom Clamped Video Inputs (Pins 4, 6, 12, 14, 18, 21, 62 and 64) VCC 5 V VCC 5 V Figure 9: Fast Blanking Inputs (Pins 50 and 51) VCCB1 5 V 2 V + VD 15 kW tri tri Protected Pad Protected Pad Figure 7: R/C Clamped Video Inputs (Pins 10 and 60) R/C inputs may be configured either as a bottom clamped input or as an average clamped input. In either case, the simplified input schematic is very close to one of the graphics shown above. Figure 10: Average Clamped Video Inputs (Pin 8) VCC 5 V VCC 5 V IB 25 kW 25 kW 3V tri Protected Pad Figure 8: Fast Blanking Output (Pin 49) VCCB1 5 V Figure 11: Cgate Logical Output (Pin 52) VCC 5 V VCC 5 V VCC 5 V 18 kW 50 W Protected Pad 22/28 Protected Pad STV6413 Input/Output Groups Figure 12: Video Outputs (Pins 38, 40, 42, 44, 46 and 48) VCC 5 V Figure 15: Audio Outputs (Pins 27, 28, 29, 30, 32 and 33) VCCB1,2 ...7 5 V VCCAO 12 V IB 60 W Protected Pad Protected Pad Figure 13: Audio Inputs (Pins 11, 13, 19, 20, 22 and 23) Figure 16: Interrupt Output (Pin 58) VCCA 9 V VDD 5 V 50 kW Float VCC/2 40 W IB Protected Pad Protected Pad Figure 14: Slow Blanking I/O (Pins 59 and 61) Figure 17: I²C Bus (SDA) (Pin 56) VCC 12 V VDD 5 V Float VCC12 12 V Acknowledge 10 kW 25 kW 110 kW 55 kW Protected Pad Protected Pad 23/28 Input/Output Groups STV6413 Figure 18: I²C Bus (SCL) (Pin 55) VDD 5 V Float 10 kW Protected Pad Figure 19: Power Supply Connection VCCB1 VCCB2 VCCB3 VCCB4 VCCB5 VCCA0 VCCA VCC VCC12 VDD 47 45 43 39 37 31 24 1 63 53 12 V 41 GNDP 10 V 25 17 12 V 5 GNDA GNDref GNDV Float 5V 57 GDD These symbols represent some huge diode and Zener-like components used for ESD protection of the device. They are not supposed to be paths for any current in normal operation mode. 24/28 STV6413 5 Application Diagram Application Diagram Figure 20: STV6413 Application Diagram STV6413 Note: For more details refer to STV6412A Application Note. 25/28 Package Mechanical Data 6 STV6413 Package Mechanical Data Figure 21: 64 Pin, Thin Full Plastic Quad Flat Pack (TQFP) 0.10mm .004 seating plane L1 L K mm Inches Dim. Min. Typ. A Max. Min. Typ. 1.60 A1 0.05 A2 1.35 b 0.17 C 0.09 D Max. 0.063 0.15 0.002 1.40 1.45 0.053 0.055 0.057 0.22 0.27 0.007 0.009 0.011 0.20 0.004 12.00 0.006 0.008 0.472 D1 10.00 0.394 E 12.00 0.472 E1 10.00 0.394 e 0.50 0.020 K 0° 3.5° 7° 0° 3.5° 7° L 0.45 0.60 0.75 0.018 0.024 0.030 L1 1.00 0.039 Number of Pins N 26/28 64 ND 16 NE 16 STV6413 7 Revision History Revision History Revision Main Changes Date 1.0 First Issue Sept. 2001 1.1 Pin List updated. Dec. 2001 1.2 STV6413 Product Preview updated to Datasheet. Order codes updated. Note added to Section 2.2: Thermal Data on page 8. Test Conditions updated for Total Harmonic Distortion values in Section : Audio Section on page 9. 1.3 Modification of Note 1 on page 16. March 2002 July 2002 27/28 Revision History STV6413 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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