STV8203 MULTISTANDARD TV SOUND DEMODULATOR . .. . .. .. .. . . . PRELIMINARY DATA PERFORMS FM MONO, FM 2 CARRIERS AND NICAM RECEPTION B/D/G/H/I/K/K1/K2/L/L’ UP TO 500kHz DEVIATION FM DEMODULATOR ALL PRE AND POST-PROCESSING INTEGRATED FILTERS, ALIGNMENT FREE STANDARD RECOGNITION FLAG SINGLE QUARTZ CRYSTAL I2C BUS CONTROLLED AM AND DOUBLE SCART AUDIO MATRIX STAND-BY WITH THRU MODE SINGLE BIT DACS EASY IMPLEMENTATION OF AUTOSTANDARD MODE ADVANCED OPERATING MODE FOR FULL CUSTOMIZATION SIF AGC WITH WIDE RANGE SHRINK42 (Plastic Package) ORDER CODE : STV8203 DESCRIPTION The STV8203 provides all the necessary circuitry for demodulation of all Nicam and German stereo audio transmission. It is very suitable for TV applications as well as for VCR, Personal Computer or Set Top Box applications. Different transmission standardsare automaticallydetected and demodulated without user intervention. The recovered audio signals can be made available in analog form. More, the STV8203 integrates an audio matrix with a THRU mode when the IC is in stand-by. Very flexible applications are possible thanks to 2 smart I C program modes and large choice of appropriate audio processing ICs. TQFP44 (10 x 10 x 1.4mm) (Full Plastic Quad Flat Pack) ORDER CODE : STV8203D January 1999 This is advance information on a new product now in development or undergoing evaluatio n. Details are subject to change without notice. 1/31 STV8203 CAP5 1 42 GND2 SIF1 2 41 DVDD5 CAP6 3 40 REG SIF2 4 39 CAP3 GND3 5 38 NC MOUT 6 37 SCL MIN 7 36 SDA CAP8 8 35 NOT USED LIL1 9 34 XIN LIR1 10 33 XOUT GND4 11 32 GND1 LIL2 12 31 NC LIR2 13 30 NC CAP2 14 29 NC CAP1 15 28 NC AOL1 16 27 NC AOR1 17 26 NC CAP4 18 25 NC AOL2 19 24 NC AOR2 20 23 RESET AV CC 21 22 CAP7 8203-01.EPS SDIP42 PIN CONNECTIONS SIF1 CAP5 GND2 DVDD5 REG CAP3 NC NC 11 10 9 8 7 6 5 4 3 2 1 SIF2 CAP6 GND3 TQFP44 PIN CONNECTIONS MOUT 12 44 SCL MIN 13 43 SDA CAP8 14 42 NOT USED LIL1 15 41 XIN LIR1 16 40 XOUT GND4 17 39 GND1 LIL2 18 38 NC LIR2 19 37 NC CAP2 20 36 NC CAP1 21 35 NC AOL1 22 34 NC 2/31 8203-02.EPS NC NC NC RESET CAP7 AVCC NC AOL2 AOR2 CAP4 AOR1 23 24 25 26 27 28 29 30 31 32 33 STV8203 PIN LIST Name Type CAP5 Analog Decoupling for ADC Supply Regulator Output 8 SIF1 Analog Subcarrier 1 Input 9 CAP6 Analog Decoupling for Input Amplifier Reference 4 10 SIF2 Analog Subcarrier 2 Input 5 11 GND3 Power Ground for Input Amplifier 6 12 MOUT Analog Mono Audio Output 7 13 MIN Analog Mono Audio Input 8 14 CAP8 Analog ADC Vtop Decoupling 9 15 LIL1 Analog Line 1 Left Input (SCART 1) 10 16 LIR1 Analog Line 1 Right Input (SCART 1) 11 17 GND4 Power Audio Ground 12 18 LIL2 Analog Line 2 Left Input (SCART 2) 13 19 LIR2 Analog Line 2 Right Input (SCART 2) 14 20 CAP2 Analog Decoupling for Audio Matrix 15 21 CAP1 Analog Decoupling for Bandgap Reference 16 22 AOL1 Analog Line 1 Left Output (SCART 1) 17 23 AOR1 Analog Line 1 Right Output (SCART 1) 18 24 CAP4 Analog Audio Matrix VDD (5V) 19 25 AOL2 Analog Line 2 Left Output (SCART 2) 20 26 AOR2 Analog Line 2 Right Output (SCART 2) TQFP44 1 7 2 3 Function - 27 NC - 21 28 AVCC Power Audio Matrix Supply Not Connected 22 29 CAP7 Analog Decoupling for Digital Regulator Output 23 30 RESET Input 24 31 NC - Not Connected 25 32 NC - Not Connected 26 33 NC - Not Connected 27 34 NC - Not Connected 28 35 NC - Not Connected 29 36 NC - Not Connected 30 37 NC - Not Connected 31 38 NC - Not Connected 32 39 GND1 Power Digital Ground 33 40 XOUT Analog Crystal Oscillator Output 34 41 XIN Analog Crystal Oscillator Input 35 42 Not used Input 36 43 SDA Bi-directional I2C Serial Data 37 44 SCL Input I2C Serial Clock Power On Reset To be connected to ground - 1 NC - Not Connected 38 2 NC - Not Connected 39 3 CAP3 Analog Decoupling for Digital 3V (regulator output) 40 4 REG Analog Base Drive for External Regulator Transistor 41 5 DVDD5 Power 5V Supply 42 6 GND2 Power Digital Ground 8203-01.TBL Pin Number SDIP42 3/31 STV8203 BLOCK DIAGRAM SIF1 ANALOG SWITCH SIF2 XTAL Sub IN AGC I2C BUS INTERFACE SDA 2 SCART1 OUT L SCL FM / NICAM DEMODULATOR CORE * 2 CRYSTAL OSCILLATOR 2VRMS AUDIO MATRIX SCART1 OUT R 2 2 DVDD5 AVCC SCART2 OUT L 2VRMS 2 SCART2 OUT R Digital POWER SUPPLY REGULATORS Analog L1, R1 (L1 + R1)/2 PRE-SCALING 1VRMS MONO OUT 8203-03.EPS SCART2 IN R SCART2 IN L SCART1 IN R * See Demodulator Core Block Diagram SCART1 IN L MONO IN STV8203 LEVEL * ESTIMATOR SOUND STANDARD MANAGEMENT IDENTIFICATION, CHANNEL CONTROL, MUTE, ... PILOT * RECOGNITION BAND PASS FM DISCRIMINATOR NICAM QPSK AND DECODER * Data also available throught I 2C Bus 4/31 NOISE * ESTIMATION QPSK LOCK * DETECTION BIT ERROR RATE * ONE BIT SIGMA DELTA DAC Channel 1 I2C Bus ONE BIT SIGMA DELTA DAC Channel 2 8203-04.EPS NOISE * ESTIMATION PRE-SCALING FM DISCRIMINATOR PRE-SCALING BAND PASS SIGNAL SHAPING ADC SIGNAL SHAPING Sub IN DIGITAL CHANNEL MATRIX AND AUTOSWITCH DEMODULATOR CORE BLOCK DIAGRAM STV8203 FUNCTIONAL DESCRIPTION As can be seen from the block diagram, the input to the demodulator section is selectable from one of two I.F. sources via the I2C bus. The selected signal is then passed through an AGC block, having a range of 28dB, before being digitised in the ADC unit. A single quartz crystal (suggestedvalue : between 24.712MHzand 27MHz) is used for the all thedigital processing,includingdemodulation,identification, control, filtering. This has the advantage of a singleclock signalsource for the wholeIC which eliminates problems of multiple clock. The single clock can be chosen to minimize interference in the TV IF and RF stages of the tuner system. The demodulatorsystem can identify and demodulate all the standarddescribedin the Table1. Theresult of the recognition is flagged up to the host system via the I2C bus communication system. In the case of NICAM transmissions, in the event of a failure of the received signal or a degradation of the bit error rate (BER) below a prescribed level, the system will automaticallydefault to the reserve sound transmission on mono FM or AM. For FM demodulation, the discriminator can normallyhandle signals having 250kHz deviation.This covers all European standards, and ensure an optimized compromise for the signal to noise ratio in one hand, and overmodulation in the other hand. However, it is possible to extand the deviation range up to 500kHz (I2C programmable) in order to cover requests of some broadcasters. Fully automatic standard recognition and setting can be achieve using simple routines. Appropriate de-emphasis networks in the digital domain are applied to the resulting demodulated signals (50µs, J17), followed by dematrixing if required. The digital datastream is then passed through 2 x 16bits DACs before the audio matrix. All this first section is working at 3.3V thanks to an integrated voltage regulator. In stand-by mode, the voltage regulator pulls the voltage down to zero, ensuring no power dissipation in this part. An audio matrix allows the selection of inputs applied on the outputsSCART1, SCART2 and MONO according to the diagram shown in Figure 1. The ”MOUT” outputs either the signal L1, or R1 or (L1+R1)/2. This allows to record the selected channel in mono mode, for example on the linear channel of a VCR simultanously with the stereo mode. Maximum output swing is 1VRMS. The audio matrix section has its own power supply regulator, allowing to keep this part working even when the rest is in stand-by mode. This achieves a ”THRU” mode from input ”SCART1” to output ”SCART2” andinput”SCART2” to output”SCART1”. The maximum output swing of both SCART1 and SCART2 is 2VRMS. Remark : Circuit operation is possible with only a single 5V supply. In this case, the AVCC supply pin is connected to 5V. Maximum output swing is then limited to 1VRMS and a 6dB attenuationis automatically added to the DAC output. In that case, the resistor shown as R2 = 39Ω in the ApplicationDiagram (between Pin 8 and Pin 21) must be replace by a short circuit to avoid clipping. Figure 1 : Audio Matrix LI2(SCART2) MIN 2 MUTE 2 MUTE L1/R1 S1 L1, R1, (L1 + R1)/2 SELECTOR GAIN ± 6dB S2 LI1(SCART1) 2 2 MUTE AO1(SCART1) MOUT L2/R2 2 8203-05.EPS DAC AO2(SCART2) 5/31 STV8203 FUNCTIONAL DESCRIPTION (continued) Table 1 : Demodulated TV Sound Norms System Sound Type FM Deviation (kHz) Type Carrier 1 Carrier 2 Name (kHz) (kHz) Nom. Max. Over FM mono B/G D/K 5.850 27 50 80 J17 5.742 27 50 80 50µs FM/NICAM 5.5 5.850 27 50 80 J17 40 FM mono 6.5 27 50 80 J17 40 54.6875 6.5 5.850 6.258 50µs 54.6875 FM 2 carriers 6.5 6.742 50µs 54.6875 FM/NICAM 6.0 6.552 FM mono 6.0 A2* NICAM 6.5 (1) FM mono 4.5 (2) 27 50 80 J17 100 50µs 5.850 J17 15 25 50 Notes : 1. STV8203 performs only limited AM demodulation. Report to Application Note. 2. 50µs only, instead of 75µs. 6/31 Pilot Frequency (kHz) 6.5 D/K2 M/N A2 FM/NICAM FM 2 carriers L 40 5.5 5.5 D/K1 I Roll-off 5.5 FM/NICAM FM 2 carriers B/H Deemphasis (2) 40 STV8203 USING STV8203 between stereo or mono signals in the playback mode in case of marginal noise conditions. 1 - Hardware 1.a - Power Supplies (see Figure 2) The IC is using two main power supplies : - DVDD5 supplies all the digital part VNom. = 5V. This power supply can be switched-off in standby mode. - AVCC supplies the audio matrixpart : if VNom. = 8V then the output voltage swing on output pins can reach 2VRMS, if VNom. = 5V then the output voltage swing on output pins can reach 1VRMS. DVDD5 AVCC 41 21 DEMODULATION AND CONTROL PART AUDIO MATRIX Pins 5-32-42 GND 11 GND 1.b - Sound Subcarrier Filters Sound demodulation and decoding are very easy with thisdevice providing all the necessaryfunctions for that purpose, including the channel filters. TheseFIR base-bandfilters give the best selectivity of the desired channeland providesin NICAM mode the correct cosine roll-off response. This implies that no external filters are required (except may be a simple high-pass filter, if the saw filters and sound IF demodulators used in the application create picture interferences). The filters can be automatically set for B/G/H/I/L/L’ standards. They can also be easily tuned through I2C for M, D, K, K1. 1.c - Audio Matrix The mono output (MOUT) can output L1, R1 or (L1+R1)/2 signal. A typical application is the possibility to record a selected channel in mono mode on the lineartrack of a VCR separatelyfrom the recording ofthe stereo signal,providingthe facility to select 8203-06.EPS Figure 2 1.d - Stand-by Stand-by with THRU mode : the analog part of the device has its own power supply (AVCC) allowing this part to keep working even when the digital part, powered by the 5V power supply (DVDD5), is in stand-by. In this case, the audio matrix is put in a special setting : - LIL1 to AOL2, - LIR1 to AOR2, - LIL2 to AOL1, - LIR2 to AOR1, - input gain = 0dB. This allows to achieve a ”THRU” mode from SCART1 input to SCART2 output and SCART2 input to SCART1 output, providing a copy facility from SCARTIN to SCARTOUT. 2 - Software Two modes of operation are available : 2.a - Optimized Program Mode Four standards have default setting stored in order to allow a very easy programmation. Only some registers may have to be programmed (these registers are shown in bold in the Figure 3) but in most cases, the reset values will be sufficient. In Figure 3, CTL and STAT represent registers which are controlled by the ”standard processor”. These registers are located between address 23Hex and 3CHex in the complete list of registers. 2.b - Advanced Operation Mode In that mode, all the read/write registers (as mentionned in the complete list) can be programmed manually and changed from their reset values. The additionnal registers accessible in this mode are shown in bold in Figure 4. This mode can be selected by putting the bits [3:0] of AO-CONTROL register to 0. 7/31 STV8203 USING STV8203 (continued) Figure 3 : Optimized Program Mode AGC ADC CHANNEL FILTER FIR1 LEVEL DETECTOR PRE-LINE-IN AGCC AGCS AO-STAT0 AO-STAT1 AO-STAT2 PLL DEMODULATOR FM DCO FINE CTL CTL AUDIO MATRIX PRE-LINE-IN AUD-MX-CNT CETH1 - SQTH1 CTL DCO COARSE STAT STAT ZWEITON DETECTOR ZWEITON FM PRESCALE CTL AUTO STANDARD STAT CTL CH2 CHANNEL FILTER FIR2 AO-CONTROL AO-TIMEOUT PRE-FM PLL DEMODULATOR FM/QPSK AGC INPUT STAT CETH2 SQTH2 CTL DCO COARSE CTL DCO FINE NICON NICAM DECODER NICAM PRESCALE STAT PRE-NICAM To DAC’s CLOCK CONTROL 8203-07.EPS IF2 INPUT SWITCH SWITCH DE-MATRIX DE-EMPHASIS CH1 IF1 CTL CTL Figure 4 : Advanced Operation Mode STAT(2) AGC PRE-LINE-IN ADC LEVEL DETECTOR AGCC AGCS AO-STAT0 AO-STAT1 AO-STAT2 CHANNEL FILTER FIR1 PLL DEMODULATOR FM DCO FINE COFQ1 FIFQ1 STAT(2) FMDC1/2 ZWEITON IAGCR IAGCC STAT (1), (2) or (3) AUTO STANDARD CTL CH2 CHANNEL FILTER FIR2 AO-CONTROL AO-TIMEOUT FFFIXL FFFIXH FCFIX (1) Bits in AO-STAT0 (2) Bits in AO-STAT1 (3) Bits in AO-STAT2 8/31 ZWEITON DETECTOR PLL DEMODULATOR FM/QPSK CRF2 STAT(3) SRF DCO COARSE COFQ2 DCO FINE FIFQ2 CETH2 SQTH2 ACOEFF2 BCOEFF2 SCOEFF NICAM DECODER NICON STAT(1) FM PRESCALE STAT(2) PRE-FM AGC INPUT IAGCS FIR2CO-7 CLOCK CONTROL AUDIO MATRIX PRE-LINE-IN AUD-MX-CNT CETH1 - SQTH1 ACOEFF1 - BCOEFF1 FIR1CO-7 DCO COARSE CRF1 ERRCOUNT To DAC’s NICAM PRESCALE PRE-NICAM STD-CT-IIS 8203-08.EPS IF2 INPUT SWITCH SWITCH DE-MATRIX DE-EMPHASIS CH1 IF1 STV8203 USING STV8203 (continued) 3 - Example of Applications 3.a - Very Low Cost TV Application Figure 5 I2C Control TUNER 1 QSS I.F. MULTISTANDARD SOUND PROCESSOR STV8203 AUDIO AMPLIFIER TDA7495 2 x 7W SCART1 8203-09.EPS AM DEMODULATOR SCART2 3.b - High-End TV Application Figure 6 I2C Control R TUNER 1 QSS I.F. MULTISTANDARD SOUND PROCESSOR STV8203 TUNER 2 QSS I.F. AUDIO PROCESSOR SURROUND/KARAOKE SRS TDA7466 2 x 25W L AM DEMODULATOR SCART2 8203-10.EPS SCART1 3.c - TV Application in PC Figure 7 I2C Control TUNER 2 QSS I.F. AM DEMODULATOR MULTISTANDARD SOUND PROCESSOR STV8203 I2S Bus AUDIO AMPLIFIER TDA7495 8203-11.EPS TUNER 1 QSS I.F. Analog Audio Out 9/31 STV8203 Symbol Parameter Value Unit 7 V 7 V AV DD5 Analog Supply Voltage DVDD5 Digital Supply Voltage AVCC Scart Interface Supply Voltage 9.5 V P tot Power Total Dissipation 0.8 W Toper Operating Temperature 0, +70 o C Tstg Storage Temperature -20, +150 o C 8203-02.TBL ABSOLUTE MAXIMUM RATINGS Symbol R th (j-p) Parameter Junction to Pins Thermal Resistance Value Unit 55 68 °C/W °C/W Max. SDIP42 TQFP44 8203-03.TBL THERMAL DATA Symbol Parameter AV DD5 Analog VDD DVDD5 Digital VDD AVCC Audio Interface Supply for 2VRMS outputs for 1VRMS outputs Min. Typ. Max. Unit 4.75 5.0 5.25 V 4.75 5.0 5.25 V 7.6 4.75 8.0 5.0 8.4 5.25 V V 8203-04.TBL RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS (Tamb = 25oC, unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit GENERAL IAIN Input Current on AVCC IDIN AVCC = 5V AVCC = 8V 58 75 mA mA DVDD5 = 5V 120 mA IF INPUTS RIN Input Resistance 6 kΩ CIN Input Capacitance 10 pF Switch Isolation f = 10MHz SIF FR Input Frequency Range For FM demodulation VIN (Min.) VIN (Max.) Minimum Input Level Maximum Input Level AGC 10/31 AGC Range 40 4 dB 8 MHz 630 mVRMS mVRMS 25 28 dB 8203-05.TBL SWISO STV8203 ELECTRICAL CHARACTERISTICS (Tamb = 25oC, unless otherwise specified) (continued) Symbol Parameter Test Conditions Min. Typ. Max. Unit +1.0 dB FM DEMODULATION PATH (see Figure 8) fRESP Frequency Response 20Hz - 15kHz -1.0 SNR FM Signal to Noise 100mVRMS, unweighted 20Hz-15kHz, Output 2VRMS @ 1kHz 65 THD FM Total Harmonic Distortion Output signal 1VRMS @ 1kHz, 50kHz FM deviation SEP FM German Stereo Channel Separation AMR VFMOUT dB 0.2 40 AM Rejection SIF = 100mVRMS 30% modulation @ 1kHz Maximum Output Swing % dB 60 dB 2 VRMS NICAM DEMODULATION PATH (see Figure 8) SNR NIC Signal to Noise 100mVRMS, unweighted 20Hz-15kHz, Output 2VRMS @ 1kHz THD NIC Total Harmonic Distortion Output signal 1VRMS @ 1kHz VNICOUT 72 dB 0.07 Maximum Output Swing 2 SEP NIC Channel Separation % VRMS 60 dB AUDIO MATRIX (see Figure 9) Input Resistance VCL Input Clipping Level 30 2 1 AVCC = 8V AVCC = 5V GMAT kΩ -0.5 Prescaling = 0 VIN = 1VRMS, 15Hz to 15kHz VRMS VRMS 0 0.5 dB R OUT Output Resistance All audio output except Mono output Mono output 200 400 Ω Ω SNR Signal to Noise Ratio Preline in = 0, VOUT = 2VRMS, unweighted 20Hz-15kHz 90 dB XLR Audio L to R Channel Crosstalk X12 Audio Crosstalk from Channel 1 to Channel 2 2VRMS @ 1kHz 60 dB 80 dB 8203-06.TBL RIN Figure 8 : SynopticA Analog Switch DAC AOL1 or AOR1 8203-12.EPS DIGITAL DEMODULATATION SIF1 STV8203 Figure 8 : SynopticA AIL1 or 2 or AIR1 or 2 Analog Switch AOL1 or 2 or AOR1 or 2 8203-13.EPS STV8203 11/31 STV8203 PROGRAMMING THE DEVICE 1 - I2C Address and Protocol Write S 80 A SUB-ADDRESS A 80 A SUB-ADDRESS A DATA A DATA 81 A A P Read S P S DATA A DATA N S = Start, A = Acknowledge, P = Stop, N = No acknowledge. Sub-address is the register address pointer ; this value auto-increments for both write and read. 2 - List of Registers Registers not controlled by AUTOSTANDARD, except bits marked ”*” which are controlled Name Addr. (Hex) Reset (Bin) bit 7 bit 6 0 0 0 Register Function /Description bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SWD (Switch, Dematrix & De-emphasis) PRE-FM PRE-NICAM STD-CT-IIS FMDC1 FMDC2 2 3 4 5 6 0001 1101 0001 1101 0001 1000 read only read only 0 0 0 0 0 gain Fm Prescale [4:0] Nicam Prescale [4:0] demoff mute * SWD [2:0] * FM DC level 1 FM DC level 2 PRE-LINE-IN 7 0000 1000 IF Switch AUD-MX-CNT 8 0010 0010 mout1 9 A 0000 0000 read only dif-pol B C D E F read only read only read only 0001 1111 1010 0101 std-det sid1 sid0 aomute fm2-car fm2-sq fm1-car fm1-sq nic-det f-mute LOA mute ov mono ov unmute C4 ov Time 2 setting (1280ms) am-mono SWD [2:0] (monitor) qpsk-lk zw-det zw-st zw-dm Nicam CBI [4:1] n-mute standard check [3:0] Time 1 setting (160ms) 10 1000 1000 Thresh-Sig [3:0] Thresh-ST [3:0] AUDIO MATRIX AGC 0 Switch off S1 o/p select 0 Line Inputs Gain [3:0] mout0 S2 o/p select NICAM NICON ERR-COUNT 0 TSCTRL [1:0] ECT error [7:0] MAE 0 0 AUTOSTANDARD AO-STAT0 AO-STAT1 AO-STAT2 AO-CONTROL AO-TIMEOUT ZWEITON ZWEITON DEMODULATOR AGCC 11 0001 0001 agc-cmd* AGCS 12 0100 00xx 0 IAGCR 14 1000 1000 IAGCC 15 0000 0011 iagc-off* IAGCS 16 read only FFFIXL 17 0000 0000 FFFIXH 18 0110 1110 0 FCFIX 19 0001 0001 0 CRF2 20 0000 0000 CETH2 21 0011 0101 SQTH2 22 0011 1100 Range of Registers Controlled by AUTOSTANDARD CRF1 3D 0000 0000 CETH1 3E 0011 0101 SQTH1 3F 0011 1100 12/31 0 0 agc-ref [2:0] agc-cst[1:0] agc-err [4:0] sig-ovr sig-und Iagc-ref [7:0] 0 0 0 0 Iagc-cst[2:0] Iagc-Ctrl [7:0] Clock Generator Fine Frequency (8 lsb’s) demod mode M2:M0* clock gen fine freq (4 msb’s) 0 Clock Generator Coarse Frequency Channel 2 Carrier Recovery Frequency Channel 2 carrier-th [7:0] Channel 2 squelch-th [7:0] Function (address 23 Hex to 3C Hex) Channel 1 Carrier Recovery Frequency Channel 1 carrier-th [7:0] Channel 1 squelch-th [7:0] STV8203 PROGRAMMING THE DEVICE (continued) Registers controllable by AUTOSTANDARD Name Addr. (Hex) Reset (Bin) Register Function/Description bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 DEMODULATOR CHANNEL 2 FIR2CO 23 0000 0000 FIR2 coefficient 0 FIR2C1 24 0000 0000 FIR2 coefficient 1 FIR2C2 25 0000 0000 FIR2 coefficient 2 FIR2C3 26 0000 0000 FIR2 coefficient 3 FIR2C4 27 1111 1111 FIR2 coefficient 4 FIR2C5 28 0000 0100 FIR2 coefficient 5 FIR2C6 29 0001 0100 FIR2 coefficient 6 FIR2C7 2A 0010 0101 FIR2 coefficient 7 COFQ2 2B 0000 1100 FIFQ2 2C 1100 0100 ACOEFF2 2D 1001 0000 dmd sw2 0 BCOEFF2 2E 1010 1100 sat sw2 0 dco2 gain B2 SCOEFF 2F 0001 1100 dmx-of 0 plf_A plf_B SRF 30 0000 0000 0 0 Channel 2 DCO Coarse Frequency Channel 2 DCO Fine Frequency (8lsb’s) Coarse A2 Sign A2 Fine A2 Symbol Recovery Frequency DEMODULATOR CHANNEL 1 FIR1CO 31 0000 0000 FIR1 coefficient 0 FIR1C1 32 1111 1110 FIR1 coefficient 1 FIR1C2 33 1111 1100 FIR1 coefficient 2 FIR1C3 34 1111 1101 FIR1 coefficient 3 FIR1C4 35 0000 0010 FIR1 coefficient 4 FIR1C5 36 0000 1101 FIR1 coefficient 5 FIR1C6 37 0001 1000 FIR1 coefficient 6 FIR1C7 38 0001 1111 FIR1 coefficient 7 COFQ1 39 0000 1011 FIFQ1 3A 1100 0111 ACOEFF1 3B 0010 0011 dmd sw1 0 BCOEFF1 3C 0001 0010 sat-sw1 0 0 0 Channel 1 DCO Coarse Frequency Channel 1 DCO Fine Frequency (8lsb’s) Coarse A1 Sign A1 Fine A1 dco1 gain B1 Note : This register must be kept to ”0”. RESERVED 1 00000000 0 0 0 0 0 0 0 0 13/31 STV8203 PROGRAMMING THE DEVICE (continued) 3 - Register Description 3.1 - Registers Not Controlled By Autostandard (except some mentioned bits) PRE-FM (Prescale FM Level) Address : 02 Type : R/W Reset : 0001 1101 bit 7 bit 6 bit 5 0 0 0 bit 4 bit 3 bit 2 bit 1 bit 0 FM PRESCALE FM PRESCALE : 00000 0dB 01100 +12dB 10100 -12dB (step size = 1dB, range = ±12dB in 2’s complement) Sets the reference level for an FM signal. Note, this is also dependant on the PLL programming. For example, with default settings for the PLL, an FM deviation of 27kHz will result in a signal 17dB below full scale before de-emphasis. At 1kHz, the internal de-emphasisgain is 14dB giving a level of -3dB. Full scale output from the DAC is 2VRMS corresponding to 0dB. and so for 1VRMS, PRE-FM should be set to -3dB. PRE-NICAM (Prescale NICAM Level) Address : 03 Type : R/W Reset : 0001 1101 bit 7 bit 6 bit 5 0 0 0 bit 4 bit 3 bit 2 bit 1 bit 0 NICAM PRESCALE NICAM PRESCALE : 00000 0dB 01100 +12dB 10100 -12dB (step size = 1dB, range = ±12dB in 2’s complement) Sets the reference level for a NICAM signal. For example, a full scale NICAM signal at 1kHz would be received at -12dB before de-emphasis. Internal de-emphasis gain at this frequency is 9dB so for 1VRMS, pre-nicam should be set to -3dB. 14/31 STV8203 PROGRAMMING THE DEVICE (continued) STD-CT-IIS (SWD Control) Address : 04 Type : R/W Reset : 0001 1000 bit 7 bit 6 bit 5 bit 4 bit 3 0 0 GAIN DEMOFF MUTE GAIN DEMOFF MUTE SWD bit 2 bit 1 bit 0 SWD : which should normally be set to its default value, can be used to change the dematrix gain for CH1 = L+R. dematrix gain : 0 : channel 1 = L/2+R/2, 1 : channel 1 = L+R : bypasses the FM or Nicam de-emphasis : 1 = de-emphasis off : mutes the DAC (FM or Nicam) : 1 = DAC muted (only effective if the AUTOSTANDARD function is off) : Bits allow control of the mode of the switch/dematrix function as shown below. (only effective if the AUTOSTANDARD function is off) [2:0] 000 001 010 De-emphasis 50µs 011 100 101 110 Description FM CH1 mono Zweiton mono Zweiton dual mono Zweiton stereo Nicam mono J17 111 Nicam dual mono Nicam stereo NICON[1:0] X X 00 01 10 11 X not used X 00 01 10 11 X Left D1 D1 D1 D2 D1 D2 DSL Right D1 D1 D2 D2 D1 D1 DSR N1 N1 N2 N1 N2 NSL N1 N2 N2 N1 N1 NSR D1 = FM audio from CH1, D2 = FM audio from CH2, DS = dematrixed Zweiton stereo. N1 = Nicam M1, N2 = Nicam M2, NS = Nicam stereo. These bits are controlled by AUTOSTANDARD when this function is activated. FMDC1, FMDC2 (FM DC Level) Address : 05-06 Type : R bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FM DC LEVEL 1 OR FM DC LEVEL 2 FM Frequency offset (dependent on the PLL coefficients). This value (2’s complement) is proportional to the DC offset, measured below 20Hz, of an FM signal. It could be used to implement an AFC for FM signals. 15/31 STV8203 PROGRAMMING THE DEVICE (continued) PRE-LINE-IN (IF Input Selection and Audio Matrix Gain Control) Address : 07 Type : R/W Reset : 0000 1000 bit 7 bit 6 bit 5 bit 4 IF SWITCH AGC SWITCH OFF 0 0 bit 3 bit 2 bit 1 bit 0 LINE INPUTS GAIN IF SWITCH : IF Input Switch controls the IF input selection (0 = IF1). AGC SWITCH OFF : can be used to switch-off the AGC amplifier.. LINE INPUTS GAIN : allow the levels of the analog line inputs (SCART1, SCART2 and MONO) to be adjusted simultaneously. 1000 0dB (default setting) 0010 -6dB 1110 +6dB (step size = 1dB, range = ±6dB) AUD-MX-CNT (Audio Matrix Control) Address : 08 Type : R/W Reset : 0010 0010 bit 7 bit 6 MOUT1 bit 5 bit 4 S1 O/P SELECT bit 3 bit 2 MOUT0 bit 1 bit 0 S2 O/P SELECT These 8 bits are used to control the audio matrix configuration (see Figure 1). 7 X X X X X X X X X X X X X X X X 0 0 1 1 16/31 6 X X X X X X X X 0 0 0 0 1 1 1 1 X X X X 5 X X X X X X X X 0 0 1 1 0 0 1 1 X X X X Data bits 4 3 X X X X X X X X X X X X X X X X 0 X 1 X 0 X 1 X 0 X 1 X 0 X 1 X X 0 X 1 X 0 X 1 2 0 0 0 0 1 1 1 1 X X X X X X X X X X X X 1 0 0 1 1 0 0 1 1 X X X X X X X X X X X X 0 0 1 0 1 0 1 0 1 X X X X X X X X X X X X Actual Function Selected Reset : AO1 and AO2 = DAC and MOUT = (L1+R1)/2 AO2 = Muted AO2 = Muted AO2 = AO1 (reset state) AO2 = LI1 (Scart 1 input) AO2 = Muted AO2 = Muted AO2 = Muted AO2 = Muted AO1 = Muted AO1 = MIN AO1 = DAC (reset state) AO1 = Muted AO1 = LI2 (Scart 2 input) AO1 = Muted AO1 = Muted AO1 = Muted MOUT = (L1+R1)/2 (reset state) MOUT = R1 MOUT = L1 Not used STV8203 PROGRAMMING THE DEVICE (continued) NICON (NICAM Control) Address : 09 Type : R/W Reset : 0000 0000 bit 7 bit 6 DIF-POL 0 bit 5 bit 4 TSCTRL bit 3 bit 2 bit 1 bit 0 ECT MAE 0 0 DIF-POL : controls the polarity of the Q channel in the DQPSK decoder. Its default value is correct for Nicam B/G/L and so does not need to be changed. TSCTRL : These two bits are programmed to chose the decision mode for the zweiton detector as following : 00 : 2 decisions with 1024 samples accumulation 01 : 3 decisions with 1024 samples accumulation 10 : 2 decisions with 2048 samples accumulation 11 : 3 decisions with 2048 samples accumulation ECT : bit error rate counting time : 0 = 128ms, 1 = 64ms MAE : max allowed errors : 0 = 511, 1 = 255 Bits 2 and 3 adjust the bit error rate (approximate) at which the Nicam decoder mutes; a fixed hysteresis is provided so that the decoder will unmute only when the BER has dropped to one quarter of that for muting : ECT 0 0 1 1 MAE 0 1 0 1 BER Muting Threshold 1 in 112 1 in 224 1 in 56 1 in 112 ERR-COUNT (Nicam Error Counter) Address : 0A Type : R bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 ERROR Error Signals Count (averaged over time ECT above) The value in this register, updated every 64ms or 128ms, gives an indication of the Nicam bit error rate. It can therefore be used to mute the decoder at an error rate below 1 in 56 (=FF if ECT= 64ms). 17/31 STV8203 PROGRAMMING THE DEVICE (continued) AO-STAT0 (AUTOSTANDARD Status 0) Address : 0B Type : R bit 7 bit 6 bit 5 bit 4 bit 3 STD-DET SID1 SID0 AOMUTE AM-MONO bit 2 STD-DET : Standard Detection : 0 = no standard detected 1 = indicates that an expected standard has been identified. SID [1:0] : Standard Identification of the demodulator input indicate the standard which has been identified : SID[1:0] 00 01 10 11 AOMUTE AM-MONO SWD bit 1 bit 0 SWD (MONITOR) Standard I FM/NICAM B/G FM - Zweiton B/G FM/NICAM L/L’ AM/NICAM : Audio Output Mute indicates that the audio outputs are muted (=1); only when the demodulator is selected as audio source. This would be the case during standard search or no signal found. : AM selected indicates if the AM input (MIN) has been selected (=1); normally used for system L. : Switch Dematrix Mode indicate the setting of the SWD block : SWD[2:0] 000 001 010 011 100 101 110 111 Mode description FM CH1 mono Zweiton mono (CH1) Zweiton dual mono Zweiton stereo Unused NICAM mono NICAM dual mono NICAM stereo De-emphasis 50µs Unused J-17 AO-STAT1 (AUTOSTANDARD Status 1 ; demodulator signal detectors) Address : 0C Type : R bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FM2-CAR FM2-SQ FM1-CAR FM1-SQ QPSK-LK ZW-DET ZW-ST ZW-DM FM2-CAR : FM2 Carrier Detector Lock FM2-SQ : FM2 Squelch Detector Lock FM1-CAR : FM1 Carrier Detector Lock FM1-SQ : FM1 Squelch Detector Lock QPSK-LK : QPSK Lock ZW-DET : Zweiton Pilot Lock ZW-ST : Zweiton Stereo Lock ZW-DM : Zweiton Dual Mono Lock This register allows direct access to the demodulator signal detectors ; 1 = detected. 18/31 STV8203 PROGRAMMING THE DEVICE (continued) AO-STAT2 (AUTOSTANDARD Status 2 ; NICAM) Address : 0D Type : R bit 7 bit 6 bit 5 NIC-DET F-MUTE LOA NIC-DET F-MUTE LOA NICAM CBI bit 3 bit 2 NICAM CBI bit 1 bit 0 N-MUTE : NICAM detected indicates a valid NICAM signal found (1 = detected). : Frame Mute indicates the NICAM decoder is muted because the superframe alignment has been lost. : Loss of frame Alignment word indicates loss of alignment to the frame alignment word in the NICAM decoder; the bit error rate is too high or no signal is present. : indicates the received NICAM control bits with the following interpretation : CBI[4:1] X000 X001 X010 X011 X1XX 0XXX 1XXX N-MUTE bit 4 Nicam Signal Description Stereo ch1 = mono, ch2 = data Dual Mono 704Kbit/s data FM selected during additional coding options Nicam different to FM mono Nicam mono(M1) or stereo = FM mono : NICAM Mute indicates that the NICAM decoder is muted (it may be unmuted by AO-CONTROL bit 5). 19/31 STV8203 PROGRAMMING THE DEVICE (continued) AO-CONTROL (AUTOSTANDARD Control) Address : 0E Type : R/W Reset : 0001 1111 bit 7 MUTE OV bit 6 MONO OV bit 5 UNMUTE bit 4 C4 OV bit 3 bit 2 bit 1 STANDARD CHECK bit 0 AUTOSTANDARD controls the audio matrix when the user has selected the DAC as source (AUD-MXCNT bits[6:4] = 010). In this case it will mute the outputs or select MIN. These functions can be overriden by bits 6 and 7 below. MUTE OV : Mute override, 1 = mute (override AUTOSTANDARD) forces the audio signal to be muted. MONO OV : FM/AM Mono override, 1 = mono (override AUTOSTANDARD) forces can be used to forceto analoguesound. This may be useful in the case of marginal NICAM reception to prevent automatic switching. AUD-MX-CNT bits[6:4] 010 bit 7 0 X 0 1 1 bit 6 0 1 1 1 0 AO1 source DAC MIN (in case of L/L’ standard) FM (in case of B/G or I standard) Muted (in case of B/G or I standard) Muted UNMUTE : Nicam Un-mute, 1 = unmute allows the NICAM decoder to be unmuted if the bit error rate is higher than the preset limit; this overrides the automatic switching to FM or AM which would normally occur. C4 OV : CBI4 override, 1 => CBI[4] forced to 1 internally is used to override the 4th NICAM control bit (reserve sound switch) if required. This bit is transmitted by the broadcaster to indicate that the analogue sound carrier is a backup of the NICAM signal; this is usually the case. If the NICAM signal fails, the STV8203 will automatically switch to backup sound if the received bit was set to 1. If this bit was set to 0 and bit 4 set to 0, the decoder will stay switched to analogue sound. If bit 4 is set to 1, the received CBI4 is ignored. Note that if automatic standard is off, switching between analogue and NICAM audio must be done manually. STANDARD : Controlthechoiceoftransmissionstandardstobesearchedforbytheautomaticstandardfunction CHECK (standardsearchactive whenbit= 1).The morechoices,thelongerthesearch time. Ifthesystem in use can be identified by the characteristics of the video signal, for example by the chroma demodulator,then only a single bit needs to be set. In this case, the AUTOSTANDARD function willprogramthedemodulatorforthechosenstandard.If no bits areset,the AUTOSTANDARD function is disabled andall registers need to be set manually. bit 3 - Run check for standard 3 (L/L’ - AM/NICAM) bit 2 - Run Check for Standard 2 (B/G - FM/NICAM) bit 1 - Run check for standard 1 (B/G - Stereo) bit 0 - Run check for standard 0 (I - FM/NICAM) AO-TIMEOUT (AUTOSTANDARD Timer Adjustment) Address : 0F Type : R/W Reset : 1010 0101 bit 7 bit 6 bit 5 TIME 2 SETTING bit 4 bit 3 bit 2 bit 1 TIME 1 SETTING bit 0 Time 1 is used for NICAM and FM mono validation and time 2 for Zweiton. If the standard is not found within this time limit, the next standard will be tried. Time 1 = decimal [bit 3:0] x 32ms. Time 2 = decimal [bit 7:4] x 128ms. Time 1 default value is 160ms. Time 2 default value is 1280ms. A time of 0ms should not be programmed. 20/31 STV8203 PROGRAMMING THE DEVICE (continued) ZWEITON (Pilot Carrier and Tone Detector Thresholds) Address : 10 Type : R/W Reset : 1000 1000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 THRESH-SIG bit 1 bit 0 THRESH-ST THRESH-SIG : Pilot Carrier Level Threshold Set the sensitivity for the pilot carrier detector. THRESH-ST : Detected Tone Level Threshold Set the detection threshold level for stereo and dual mono (bi-lingual) tones. Power on default values give a detection threshold corresponding to a modulated pilot carrier S/N of 0dB (700Hz BW) and a S/N of 40dB for the recovered audio. AGCC (AGC Control for ADC) Address : 11 Type : R/W Reset : 0001 0001 bit 7 bit 6 bit 5 AGC-CMD 0 0 bit 4 bit 3 bit 2 AGC-REF bit 1 bit 0 AGC-CST AGC-CMD : 1 = manual/forced mode, 0 = automatic mode Normally set to 0 enabling automatic mode. In the case of system L/L’, due to the presence of the AM sound carrier, the AGC should be switched off. In this case, a fixed gain value should be set using the AGCS register (see below). This bit is controlled by AUTOSTANDARD when this function is activated. AGC-REF : Defines the clipping level. Adjust the allowable proportion of samples at the input of the ADC which will be clipped; the AGC tries to maximise the use of the full scale range of the ADC. The default setting gives a ratio of 1/256. AGC-REF [4:2] 000 001 010 011 100 101 110 111 Clipping Ratio 1/16 (single carrier) 1/32 1/64 1/128 1/256 1/512 1/1024 1/2048 (multiple carriers) AGC-CST : AGC time constant between each step of 1.25dB. For a 27MHz XTAL => 00 = 1.21ms, 01 = 2.43ms, 10 = 4.85ms, 11 = 9.7ms. The adjustment is a compromise between settling time and noise immunity. 21/31 STV8203 PROGRAMMING THE DEVICE (continued) AGCS (AGC Control and Status for ADC) Address : 12 Type : R/W Reset : 0100 00XX bit 7 0 bit 6 bit 5 bit 4 AGC-ERR bit 3 bit 2 bit 1 SIG-OVR bit 0 SIG-UND AGC-ERR : Gain Control Signal of amplifier before ADC. There are 32 steps of 1.25dB. AGC-ERR [6:2] 00000 00001 ..... 11110 11111 Gain (dB) 0 1.25 ..... 37.50 38.75 When AGC_CMD = 0, AGC-ERR can be read thus indicating the input level. It can also be written to thus presetting the AGC level which will then adjust itself to the final value. When AGC_CMD = 1, the AGC is off and thus writing to AGC-ERR directly controls the AGC amplifier gain. Reading AGC_ERR just confirms the fixed value. SIG-OVR : 1 = agc overloaded - signal too BIG SIG-UND 1 = agc under loaded - signal too SMALL When the AGC is in automatic mode (agc_cmd=0), bit 0 indicates if the input signal is too small and bit 1 if the AGC is too big. These bits could be used when setting the input level to the STV8203. IAGCR (Internal AGC Reference for QPSK) Address : 14 Type : R/W Reset : 1000 1000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 IAGC-REF Sets the mean value of the internal AGC, used for QPSK demodulation. The default setting corresponds to half full scale amplitude at the PLL input. IAGCC (Internal AGC Time Constant for QPSK) Address : 15 Type : R/W Reset : 0000 0011 bit 7 IAGC-OFF bit 6 0 bit 5 0 bit 4 0 bit 3 0 bit 2 bit 1 IAGC-CST bit 0 IAGC-OFF : 1 = Internal agc = off Only enabled when AUTOSTANDARD is off. Normally , the internal AGC should be OFF for FM and ON for QPSK. This bit is controlled by AUTOSTANDARD when this function is activated. IAGC-CST : Internal AGC Programmable Step Constant. Set the internal AGC time constant; the compromise is between fast settling time (for the quickest Nicam identification) and noise immunity. The control range is about 45dB divided into 0.2dB steps. These bits control the time per step (values given for QPSK mode) : AGC-CST [2:0] 000 001 ..... 111 22/31 Step time (µs) 703 352 ..... 5.5 Time Response (ms) 105 53 ..... 0.82 STV8203 PROGRAMMING THE DEVICE (continued) IAGCS (Internal AGC Control Value) Address : 16 Type : R bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 IAGC-CTRL Indicates the value of the internal AGC control signal. Normally, the mean value should equal the value set in the IAGCR register when a signal is being demodulated. FFFIXL (Clock Generator Fine frequency) Address : 17 Type : R/W Reset : 0000 0000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 bit 1 bit 0 CLOCK GENERATOR FINE FREQUENCY (8 LSB’s) See FCFIX register for explanation. FFFIXH (Clock Generator and Fine Frequency Control) Address : 18 Type : R/W Reset : 0110 1110 bit 7 bit 6 0 bit 5 bit 4 bit 3 DEMOD MODE M2:M0 DEMOD MODE M2:M0 bit 2 CLOCK GEN FINE FREQ (4 MSB’s) : Controls the demodulator mode (only when register Ehex bits[3:0] = 0000) : MODE[6:4] X00 X01 010 011 110 111 CH1 FM Normal Wide Normal Wide Normal Wide CH2 FM/QPSK FM Normal FM Wide QPSK System B/G/L QPSK System B/G/L QPSK System I QPSK System I The FM discriminator modulation full range can be set at : - narrow mode : 250kHz (± 125kHz), - wide mode : 500kHz (± 250kHz). CLOCK GEN FINE FREQ : Clock generator fine frequency (4 MSB’s) ( see FCFIX for explanation). FCFIX (Clock Generator Coarse Frequency) Address : 19 Type : R/W Reset : 0001 0001 bit 7 bit 6 0 0 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CLOCK GENERATOR COARSE FREQUENCY The bits [5:0] together with FFFIXH bits [3:0] and FFFIXL bits [7:0] can be used to programme the internal clock generator for different quartz crystal frequencies ; the default value is for 27MHz. Fref P = 182 ⋅ − 193 with Fref = crystal frequency, Fqpsk = 32 x 728kHz = 23.296MHz. Fqpsk FCFIX = INT(P) (INT: integer part) FFFIX = 256 x (16 x REM(P) - 1) (REM: fractional remainder) Note that 0 ≤ FFFIX <3840 so there is a small range of frequencies which cannot be used. Example : Fref = 27MHz, FCFIX = 17, FFFIX = 3584. 23/31 STV8203 PROGRAMMING THE DEVICE (continued) CRF2 - CRF1 (FM/QPSK PLL Demodulator Offset) Address : 20-3D Type : R/W Reset : 0000 0000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 CARRIER RECOVERY FREQUENCY This register provides access to the instantaneousfrequency of the PLL (2’s complement). If written to, it will preset the DCO frequency; if read it provides the instantaneousfrequencyoffset of the PLL’s and could be used for an AFC function. CETH2 - CETH1 (FM Carrier Level Threshold) Address : 21-3E Type : R/W Reset : 0011 0101 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 CARRIER-THRESHOLD These registers, which perform the same function in channel 1 and channel 2, compare the carrier level in the channel against the threshold value. This level is measured after the channel filter and is relative to the full scale reference level (0dB). This is used as part of the validation of an FM signal, if the carrier level is below the threshold, the signal is considered to be non-valid. CETH 255 128 64 32 .... 0 Threshold (dB) -6 -12 -18 -24 .... OFF If CETH is OFF, any carrier level will be accepted. The reset value is 53, it means a threshold of -20dB. SQTH2- SQTH1 (FM Squelch Threshold) Address : 22-3F Type : R/W Reset : 0011 1100 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 SQUELCH-THRESHOLD The squelch detector measures the level of high frequencynoise (>40kHz) and comparesit to the threshold SQTH. If the level is below this value, the S/N of the FM signal is considered to be acceptable. Values are given for FM with ±50kHz deviation : SQTH 250 119 60 35 22 The reset value is 60, it means a SNR of 15dB. 24/31 S/N (dB) 0 10 15 20 25 STV8203 PROGRAMMING THE DEVICE (continued) 3.2 - Registers Controllable by Autostandard FIR2C - FIR1C (FIR Coefficients) Address : 23-24-25-26-27-28-29-2A & 31-32-33-34-35-36-37-38 Type : R/W bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FIR2 or FIR1 COEFFICIENT 0 FIR2 or FIR1 COEFFICIENT 1 FIR2 or FIR1 COEFFICIENT 2 FIR2 or FIR1 COEFFICIENT 3 FIR2 or FIR1 COEFFICIENT 4 FIR2 or FIR1 COEFFICIENT 5 FIR2 or FIR1 COEFFICIENT 6 FIR2 or FIR1 COEFFICIENT 7 Each demodulator channel implements a 16 tap symetric FIR filter, each with 8 coefficients. The following table gives the default values provided by the AUTOSTANDARD function (∆F = 50kHz in FM mode). Tap Number 0 1 2 3 4 5 6 7 System I FM/NICAM CH1 CH2 0 0 -2 0 -4 0 -3 0 2 -1 13 4 24 20 31 37 System B/G Zweiton CH1 CH2 0 0 -2 -2 -4 -4 -3 -3 2 2 13 13 24 24 31 31 System B/G FM/NICAM CH1 CH2 0 0 -2 0 -4 -1 -3 3 2 0 13 -12 24 10 31 61 System L/L’ AM/NICAM CH1 CH2 0 0 -2 0 -4 -1 -3 3 2 0 13 -12 24 10 31 61 COFQ2 - COFQ1 (DCO Coarse Frequency) Address : 2B-39 Type : R/W Reset : 0000 1100 for COFQ2 - 0000 1011 for COFQ1 bit 7 bit 6 0 0 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANEL 1 DCO COARSE FREQUENCY See FIFQ1/2 below for explanation. 25/31 STV8203 PROGRAMMING THE DEVICE (continued) FIFQ2 - FIFQ1 (DCO Fine Frequency) Address : 2C-3A Type : R/W Reset : 1100 0100 for FIFQ2 - 1100 0111 for FIFQ1 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 CHANNEL 2 or CHANNEL 1 DCO FINE FREQUENCY (8LSB’s) The DCO’s, which are set to the carrier frequencyto be demodulated,are adjusted in two parts as follows : Fc C= ⋅ 48, where Fc is the carrier frequency, Fs is the crystal frequency Fs Take the nearest integer, Ci, for the 6 bits of the COFQ register 29 F = (C − Ci) ⋅ 3 Take the nearest integer, Fi, for the 8 bits of the FIFQ register. Common frequencies with Fs = 27MHz : Ci Fc (MHz) decimal 10 10 10 11 12 5.5 5.74 5.85 6.0 6.552 ACOEFF2 Address Type Reset Fi binary 001010 001010 001010 001011 001100 decimal -38 35 68 -57 -60 binary 11011010 00100011 01000100 11000111 11000100 ACOEFF1 (PLL Loop Filter Proportional Coefficient) : 2D-3B : R/W : 10010000 for ACOEFF2 - 0010 0011 for ACOEFF1 bit 7 bit 6 DMD SW2 or 1 0 bit 5 bit 4 COARSE A2 or A1 bit 3 SIGN A2 or A1 bit 2 bit 1 bit 0 FINE A2 or A1 DMD SW : Mode switch : 0 = FM, 1 = QPSK COARSE A, : Program the PLL (FM/QPSK carrier recovery) loop filter proportional coefficient A : SIGNA, FINE A A coefficient = coarse + (sign x fine) 26/31 COARSE 00 01 10 11 Value 0 1 1/2 1/4 SIGN 0 1 + - FINE 000 001 010 011 100 101 110 111 Value 0 1/2 1/4 1/8 1/16 1/32 1/64 Not used STV8203 PROGRAMMING THE DEVICE (continued) BCOEFF2 - BCOEFF1 (PLL Loop Filter Integral Coefficient and DCO Gain) Address : 2E-3C Type : R/W Reset : 1010 1100 for BCOEFF2 - 0001 0010 for BCOEFF1 bit 7 bit 6 SAT SW2 or 1 0 bit 5 bit 4 DCO 2 or 1 GAIN SAT SW : Saturation Switch : 0 = FM, 1 = QPSK DCO GAIN : Programme the gain coefficient (K0) : DCO [5:3] 000 001 010 011 100 101 110 111 B bit 3 bit 2 bit 1 bit 0 B2 or B1 Value 0 1 1/2 1/4 1/8 1/16 1/32 Not used : Programme the PLL (FM/QPSK carrier recovery) loop filter integral coefficient B : B [2:0] 000 001 010 011 100 101 11X Value 0 1/4 1/8 1/16 1/32 1/64 Not used 27/31 STV8203 PROGRAMMING THE DEVICE (continued) SCOEFF (Symbol Tracking Loop Filter Coefficients) Address : 2F Type : R/W Reset : 0001 1100 bit 7 bit 6 DMX-OF 0 bit 5 bit 4 bit 3 bit 2 bit 1 PLF_A bit 0 PLF_B DMX-OF : Symbol tracking control : 0 = QPSK, 1 = FM. In QPSK mode, the symbol tracking loop is closed. PLF_A : A coefficient (proportional) Programme the symbol tracking loop filter proportional coefficient A : PLF_A [5:3] 000 001 010 011 100 101 110 111 PLF_B Value 0 1 2 4 8 16 32 Not used : B coefficient (integral) Program the symbol tracking loop filter integral coefficient B : PLF_B [2:0] 000 001 010 011 100 101 110 111 Value 0 1/16 1/32 1/64 1/128 1/256 1/512 1/1024 SRF (Symbol Tracking Loop Frequency) Address : 30 Type : R/W Reset : 0000 0000 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 SYMBOL RECOVERY FREQUENCY This register provides access to the control signal for the symbol tracking loop (2’s complement). If read, it indicates a value proportional to the symbol tracking frequency error. If written to, it will preset the frequency error. SRF [7:0] Approx. Error (kHz) 10000000 -8 00000000 0 01111111 +8 RESET After a reset sequence, all the registers controllable by AUTOSTANDARD function (FIR, COFQ, FIFQ, ACOEFF, BCOEFF, SCOEFF, SRF) are adjusted for the standard I configuration (channel 1 to FM mono mode and channel 2 to QPSK mode). 28/31 STV8203 APPLICATION DIAGRAM (SDIP42 PACKAGE) U1 C1 10µF 100pF 1 CAP5 GND2 42 2 SIF1 DVDD5 41 C3 10nF SIF1 560Ω STV8203 C2 10nF C4 10nF L1 10µH CAP6 REG 40 4 SIF2 CAP3 39 3 GND3 NC 38 6 MOUT SCL 37 7 MIN SDA 36 8 CAP8 3 100pF C26 220nF Q1 BC557B C4 10nF C5 10nF SIF2 L2 10µH C28 10µF MONO OUT 2 3 SCL SDA C7 1µF MONO IN 5V C8 220nF NOT USED 35 C10 22pF C9 1µF LIL1 XIN 34 10 LIR1 XOUT 33 11 GND4 GND1 32 9 LIL1 IN C11 1µF LIR1 IN R3 22kΩ 39kΩ XTAL (24.712MHz to 27MHz C12 22pF C13 1µF LIL2 IN 12 LIL2 NC 31 13 LIR2 NC 30 14 CAP2 NC 29 15 CAP1 NC 28 16 AOL1 NC 27 17 AOR1 NC 26 18 CAP4 NC 25 19 AOL2 NC 24 20 AOR2 RESET 23 C14 1µF LIR2 IN C27 10pF C15 10µF C16 10µF AOL1 C17 10µF AOR1 C18 1nF C19 10µF R1 220kΩ C20 10µF AOR2 C21 100nF 5V C22 10µF R2 39Ω (*) 21 AVCC 8V C23 10µF CAP7 22 C24 220nF C25 10µF 8203-14.EPS AOL2 (*) Note : Resistor R2 should be short-circuited in case of 5V only supply voltage application. 29/31 STV8203 PACKAGE MECHANICAL DATA 42 PINS - PLASTIC SHRINK DIP E A2 A L A1 E1 B B1 e e1 e2 D c E 42 22 .015 0,38 e3 21 e2 SDIP42 Dimensions A A1 A2 B B1 c D E E1 e e1 e2 e3 L 30/31 Min. 0.51 3.05 0.36 0.76 0.23 37.85 15.24 12.70 2.54 Millimeters Typ. 3.81 0.46 1.02 0.25 38.10 13.72 1.778 15.24 3.30 Max. 5.08 4.57 0.56 1.14 0.38 38.35 16.00 14.48 18.54 1.52 3.56 Min. 0.020 0.120 0.0142 0.030 0.0090 1.490 0.60 0.50 0.10 Inches Typ. 0.150 0.0181 0.040 0.0098 1.5 0.540 0.070 0.60 0.130 Max. 0.200 0.180 0.0220 0.045 0.0150 1.510 0.629 0.570 0.730 0.060 0.140 SDIP42.TBL 1 PMSDIP42.EPS Gage Plane STV8203 PACKAGE MECHANICAL DATA 44 PINS - FULL PLASTIC QUAD FLAT PACK (TQFP) (THIN) A A2 e 44 A1 34 0,10 mm .004 inch 33 11 23 SEATING PLANE E3 E1 E B 1 c 22 Dimensions A A1 A2 B C D D1 D3 e E E1 E3 L L1 K Min. 0.05 1.35 0.30 0.09 0.45 Millimeters Typ. 1.40 0.37 12.00 10.00 8.00 0.80 12.00 10.00 8.00 0.60 1.00 Max. 1.60 0.15 1.45 0.40 0.20 0.75 PM-4Y.EPS K 0,25 mm .010 inch GAGE PLANE Min. 0.002 0.053 0.012 0.004 0.018 Inches Typ. 0.055 0.015 0.472 0.394 0.315 0.031 0.472 0.394 0.315 0.024 0.039 Max. 0.063 0.006 0.057 0.016 0.008 0.030 4Y.TBL L D3 D1 D L1 12 0o (Min.), 7o (Max.) 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