STW20NM50FD N-CHANNEL 500V - 0.22Ω - 20A TO-247 FDmesh™ Power MOSFET (with FAST DIODE) TYPE STW20NM50FD ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID 500V <0.25Ω 20 A TYPICAL RDS(on) = 0.22Ω HIGH dv/dt AND AVALANCHE CAPABILITIES 100% AVALANCHE TESTED LOW INPUT CAPACITANCE AND GATE CHARGE LOW GATE INPUT RESISTANCE TIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS DESCRIPTION The FDmesh™ associates all advantages of reduced on-resistance and fast switching with an intrinsic fastrecovery body diode. It is therefore strongly recommended for bridge topologies, in particular ZVS phaseshift converters. 3 2 1 TO-247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ ZVS PHASE-SHIFT FULL BRIDGE CONVERTERS FOR SMPS AND WELDING EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 500 V Drain-gate Voltage (RGS = 20 kΩ) 500 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 20 A ID Drain Current (continuos) at TC = 100°C 14 A Drain Current (pulsed) 80 A Total Dissipation at TC = 25°C 214 W Derating Factor 1.42 W/°C 20 V/ns –65 to 150 °C 150 °C IDM (●) PTOT dv/dt(1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area June 2002 (1)ISD ≤20A, di/dt ≤400A/µs, V DD ≤ V(BR)DSS, Tj ≤ TJMAX. (*)Limited only by maximum temperature allowed 1/8 STW20NM50FD THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.585 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 30 °C/W 300 °C Tl Maximum Lead Temperature For Soldering Purpose AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 10 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 35 V) 700 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V V(BR)DSS Min. Typ. Max. 500 Unit V VDS = Max Rating, TC = 125 °C 1 µA 10 µA ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 10A Min. Typ. Max. Unit 3 4 5 V 0.22 0.25 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 10A VDS = 25V, f = 1 MHz, VGS = 0 Min. 9 S 1380 pF Ciss Input Capacitance Coss Output Capacitance 290 pF Crss Reverse Transfer Capacitance 40 pF Coss eq. (2) Equivalent Output Capacitance VGS = 0V, VDS = 0V to 400V 130 pF Gate Input Resistance f=1 MHz Gate DC Bias=0 Test Signal Level=20mV Open Drain 2.8 Ω Rg 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 2/8 STW20NM50FD ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 250V, ID = 10 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 400V, ID = 20A, VGS = 10V Typ. Max. Unit 22 ns 20 ns 38 53 nC 18 nC 10 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 400V, ID = 20 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. Unit 6 ns 15 ns 30 ns SOURCE DRAIN DIODE Symbol Max. Unit Source-drain Current 20 A ISDM (2) Source-drain Current (pulsed) 80 A VSD (1) Forward On Voltage ISD = 20 A, VGS = 0 1.5 V ISD = 20 A, di/dt = 100A/µs, VDD = 60V, Tj = 150°C (see test circuit, Figure 5) ISD Parameter trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current Test Conditions Min. Typ. 245 ns 2 µC 16 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STW20NM50FD Output Characteristics Transconductance Gate Charge vs Gate-source Voltage 4/8 Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STW20NM50FD Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STW20NM50FD Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STW20NM50FD TO-247 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. 0.19 TYP. MAX. A 4.85 5.15 0.20 D 2.20 2.60 0.08 0.10 E 0.40 0.80 0.015 0.03 F 1 1.40 0.04 0.05 F1 3 0.11 F2 2 0.07 F3 2 2.40 0.07 0.09 F4 3 3.40 0.11 0.13 G 10.90 0.43 H 15.45 15.75 0.60 0.62 L 19.85 20.15 0.78 0.79 L1 3.70 4.30 0.14 L2 L3 18.50 14.20 0.17 0.72 14.80 0.56 0.58 L4 34.60 1.36 L5 5.50 0.21 M 2 3 0.07 0.11 V 5º 5º V2 60º 60º Dia 3.55 3.65 0.14 0.143 7/8 STW20NM50FD Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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