STMICROELECTRONICS STW21NM50N

STP21NM50N-STF21NM50N-STW21NM50N
STB21NM50N - STB21NM50N-1
N-CHANNEL 500V - 0.15Ω - 18A TO-220/FP/D2/I2PAK/TO-247
SECOND GENERATION MDmesh™ MOSFET
Table 1: General Features
TYPE
VDSS
(@Tjmax)
STB21NM50N
STB21NM50N-1
STF21NM50N
STP21NM50N
STW21NM50N
■
■
■
550
550
550
550
550
V
V
V
V
V
Figure 1: Package
RDS(on)
<
<
<
<
<
0.19
0.19
0.19
0.19
0.19
Ω
Ω
Ω
Ω
Ω
ID
18 A
18 A
18 A (*)
18 A
18 A
3
1
3
3
1
2
TO-220
1
D2PAK
2
TO-220FP
100% AVALANCHE TESTED
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
DESCRIPTION
The STx21NM50N is realized with the second
generation of MDmesh Technology. This revolutionary MOSFET associates a new vertical structure to the Company's strip layout to yield one of
the world's lowest on-resistance and gate charge.
It is therefore suitable for the most demanding high
efficiency converters
3
12
3
I2PAK
2
1
TO-247
Figure 2: Internal Schematic Diagram
APPLICATIONS
The MDmesh™ II family is very suitable for increasing power density of high voltage converters
allowing system miniaturization and higher efficiencies.
Table 2: Order Codes
SALES TYPE
MARKING
PACKAGE
PACKAGING
STB21NM50N
B21NM50N
D2PAK
TAPE & REEL
STB21NM50N-1
B21NM50N
I2PAK
TUBE
STF21NM50N
F21NM50N
TO-220FP
TUBE
STP21NM50N
P21NM50N
TO-220
TUBE
STW21NM50N
W21NM50N
TO-247
TUBE
Rev. 3
October 2005
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Table 3: Absolute Maximum ratings
Symbol
Parameter
Value
TO-220 / D2PAK / I2PAK
/ TO-247
VDS
VDGR
VGS
Unit
TO-220FP
Drain-source Voltage (VGS = 0)
500
V
Drain-gate Voltage (RGS = 20 kΩ)
500
V
Gate- source Voltage
±25
V
ID
Drain Current (continuous) at TC = 25°C
18
18 (*)
A
ID
Drain Current (continuous) at TC = 100°C
11
11 (*)
A
Drain Current (pulsed)
72
72 (*)
A
Total Dissipation at TC = 25°C
140
30
W
Derating Factor
1.12
0.23
W/°C
IDM ( )
PTOT
dv/dt(1)
Peak Diode Recovery voltage slope
Viso
Insulation Winthstand Voltage (DC)
Tstg
Storage Temperature
Tj
15
--
V/ns
2500
–55 to 150
150
Max. Operating Junction Temperature
V
°C
( ) Pulse width limited by safe operating area
(*) Limited only by maximum temperature allowed
(1) ISD ≤ 18 A, di/dt ≤ 400 A/µs, VDD =80% V(BR)DSS
Table 4: Thermal Data
TO-220 / D²PAK / I²PAK
/ TO-247
TO-220FP
0.89
4.21
Rthj-case
Thermal Resistance Junction-case Max
°C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
°C/W
Tl
Maximum Lead Temperature For Soldering
Purpose
300
°C
Table 5: Avalanche Characteristics
Symbol
2/16
Parameter
IAS
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
Unit
9
A
480
mJ
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Symbol
Parameter
Test Conditions
Value
Min.
V(BR)DSS
Drain-source
Breakdown Voltage
ID = 1mA, VGS = 0
dv/dt(2)
Drain Source Voltage
Slope
Vdd=400V, Id=25A, Vgs=10V
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating
TC = 125 °C
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 9 A
Typ.
Unit
Max.
500
V
44
2
V/ns
1
10
µA
µA
100
nA
3
4
V
0.150
0.190
Ω
Typ.
Max.
(2) Characteristic value at turn off on inductive load
Table 7: Dynamic
Symbol
gfs (1)
Ciss
Coss
Crss
Coss eq. (*)
Parameter
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Test Conditions
Min.
VDS = 15 V, ID = 9 A
VDS = 25V, f = 1 MHz, VGS = 0
Unit
12
S
1950
420
60
pF
pF
pF
Equivalent Output
Capacitance
VGS = 0V, VDS = 0V to 400V
270
pF
td(on)
tr
td(off)
tf
Turn-on Delay Time
Rise Time
Off-voltageRise Time
Fall Time
VDD =250 V, ID = 9 A
RG = 4.7Ω VGS = 10 V
(see Figure 18)
22
18
90
30
ns
ns
ns
ns
Qg
Qgs
Qgd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
VDD = 400V, ID = 18 A,
VGS = 10V,
(see Figure 21)
65
10
30
nC
nC
nC
Rg
Gate Input Resistance
f=1MHz Gate DC Bias=0
Test Signal Level=20mV
Open Drain
1.6
Ω
(*) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Table 8: Source Drain Diode
Symbol
Parameter
ISD
ISDM
Source-drain Current
Source-drain Current (pulsed)
VSD (1)
trr
Qrr
IRRM
trr
Qrr
IRRM
Test Conditions
Min.
Typ.
Max.
Unit
18
72
A
A
1.5
V
Forward On Voltage
ISD = 18 A, VGS = 0
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 18 A, di/dt = 100 A/µs
VDD = 100 V, Tj = 25°C
(see Figure 19)
360
5
27
ns
µC
A
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 18A, di/dt = 100 A/µs
VDD = 100 V, Tj = 150°C
(see Figure 19)
640
6.5
27
ns
µC
A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Figure 3: Safe Operating Area For TO-220
Figure 6: Thermal Impedance For TO-220
Figure 4: Safe Operating Area For TO-220FP
Figure 7: Thermal Impedance For TO-220FP
Figure 5: Output Characteristics
Figure 8: Transfer Characteristics
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Figure 9: Transconductance
Figure 12: Static Drain-source On Resistance
Figure 10: Gate Charge vs Gate-source Voltage
Figure 13: Capacitance Variations
Figure 11: Normalized Gate Threshold Voltage
vs Temperature
Figure 14: Normalized On Resistance vs Temperature
5/16
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Figure 15: Source-Drain Forward Characteristics
6/16
Figure 16: Normalized BVdss vs Temperature
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Figure 17: Unclamped Inductive Load Test Circuit
Figure 20: Unclamped Inductive Wafeform
Figure 18: Switching Times Test Circuit For
Resistive Load
Figure 21: Gate Charge Test Circuit
Figure 19: Test Circuit For Inductive Load
Switching and Diode Recovery Times
7/16
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
D2PAK FOOTPRINT
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
DIM.
mm
inch
MIN.
MAX.
MIN.
A0
10.5
10.7
0.413 0.421
B0
15.7
15.9
0.618 0.626
MIN.
330
1.5
C
12.8
D
20.2
G
24.4
N
100
T
TAPE MECHANICAL DATA
inch
MAX.
MAX.
12.992
0.059
13.2
0.504 0.520
26.4
0.960 1.039
0795
3.937
30.4
1.197
BASE QTY
BULK QTY
1000
1000
MAX.
D
1.5
1.6
0.059 0.063
D1
1.59
1.61
0.062 0.063
E
1.65
1.85
0.065 0.073
F
11.4
11.6
0.449 0.456
K0
4.8
5.0
0.189 0.197
0.153 0.161
P0
3.9
4.1
P1
11.9
12.1
0.468 0.476
P2
1.9
2.1
0.075 0.082
R
50
1.574
T
0.25
0.35 0.0098 0.0137
W
23.7
24.3
0.933 0.956
* on sales type
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
D2PAK MECHANICAL DATA
TO-247 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.4
4.6
0.173
0.181
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
0.368
D1
E
8
10
E1
0.315
10.4
0.393
8.5
0.334
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
0.126
R
0.4
0º
0.015
4º
3
V2
1
10/16
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
TO-262 (I2PAK) MECHANICAL DATA
mm.
inch
DIM.
MAX.
MIN.
A
4.40
MIN.
TYP
4.60
0.173
TYP.
0.181
MAX.
A1
2.40
2.72
0.094
0.107
b
0.61
0.88
0.024
0.034
b1
1.14
1.70
0.044
0.066
c
0.49
0.70
0.019
0.027
c2
1.23
1.32
0.048
0.052
D
8.95
9.35
0.352
0.368
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
E
10
10.40
0.393
0.410
L
13
14
0.511
0.551
L1
3.50
3.93
0.137
0.154
L2
1.27
1.40
0.050
0.055
11/16
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
TO-220 MECHANICAL DATA
DIM.
mm.
MIN.
inch
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
0.551
L
13
14
0.511
L1
3.50
3.93
0.137
L20
16.40
L30
12/16
TYP
0.154
0.645
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
TO-220FP MECHANICAL DATA
mm.
DIM.
MIN.
A
4.4
inch
TYP
MAX.
MIN.
TYP.
4.6
0.173
0.181
MAX.
0.106
B
2.5
2.7
0.098
D
2.5
2.75
0.098
0.108
E
0.45
0.7
0.017
0.027
F
0.75
1
0.030
0.039
F1
1.15
1.7
0.045
0.067
F2
1.15
1.7
0.045
0.067
G
4.95
5.2
0.195
0.204
G1
2.4
2.7
0.094
0.106
H
10
10.4
0.393
0.409
L2
16
0.630
L3
28.6
30.6
1.126
1.204
L4
9.8
10.6
.0385
0.417
L5
2.9
3.6
0.114
0.141
L6
15.9
16.4
0.626
0.645
9
9.3
0.354
0.366
Ø
3
3.2
0.118
0.126
B
D
A
E
L7
L3
L6
F2
H
G
G1
F
F1
L7
L2
L5
1 2 3
L4
13/16
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
TO-247 MECHANICAL DATA
DIM.
mm.
MIN.
inch
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
A1
2.20
2.60
0.086
0.102
b
1.0
1.40
0.039
0.055
b1
2.0
2.40
0.079
0.094
b2
3.0
3.40
0.118
0.134
c
0.40
0.80
0.015
0.03
D
19.85
20.15
0.781
0.793
E
15.45
15.75
0.608
e
5.45
0.620
0.214
L
14.20
14.80
0.560
L1
3.70
4.30
0.14
L2
18.50
0.582
0.17
0.728
øP
3.55
3.65
0.140
0.143
øR
4.50
5.50
0.177
0.216
S
14/16
TYP
5.50
0.216
STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
Table 9: Revision History
Date
Revision
07-Sep-2005
28-Sep-2005
14-Oct-2005
1
2
3
Description of Changes
First Release.
Symbol changed in Table 5
Modified curves 5,8
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STP21NM50N - STF21NM50N - STB21NM50N - STB21NM50N-1 - STW21NM50N
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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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© 2005 STMicroelectronics - All Rights Reserved
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